| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * wm8940.h -- WM8940 Soc Audio driver |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _WM8940_H |
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| 7 | #define _WM8940_H |
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| 8 | |
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| 9 | struct wm8940_setup_data { |
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| 10 | /* Vref to analogue output resistance */ |
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| 11 | #define WM8940_VROI_1K 0 |
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| 12 | #define WM8940_VROI_30K 1 |
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| 13 | unsigned int vroi:1; |
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| 14 | }; |
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| 15 | |
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| 16 | /* WM8940 register space */ |
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| 17 | #define WM8940_SOFTRESET 0x00 |
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| 18 | #define WM8940_POWER1 0x01 |
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| 19 | #define WM8940_POWER2 0x02 |
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| 20 | #define WM8940_POWER3 0x03 |
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| 21 | #define WM8940_IFACE 0x04 |
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| 22 | #define WM8940_COMPANDINGCTL 0x05 |
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| 23 | #define WM8940_CLOCK 0x06 |
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| 24 | #define WM8940_ADDCNTRL 0x07 |
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| 25 | #define WM8940_GPIO 0x08 |
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| 26 | #define WM8940_CTLINT 0x09 |
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| 27 | #define WM8940_DAC 0x0A |
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| 28 | #define WM8940_DACVOL 0x0B |
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| 29 | |
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| 30 | #define WM8940_ADC 0x0E |
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| 31 | #define WM8940_ADCVOL 0x0F |
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| 32 | #define WM8940_NOTCH1 0x10 |
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| 33 | #define WM8940_NOTCH2 0x11 |
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| 34 | #define WM8940_NOTCH3 0x12 |
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| 35 | #define WM8940_NOTCH4 0x13 |
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| 36 | #define WM8940_NOTCH5 0x14 |
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| 37 | #define WM8940_NOTCH6 0x15 |
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| 38 | #define WM8940_NOTCH7 0x16 |
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| 39 | #define WM8940_NOTCH8 0x17 |
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| 40 | #define WM8940_DACLIM1 0x18 |
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| 41 | #define WM8940_DACLIM2 0x19 |
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| 42 | |
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| 43 | #define WM8940_ALC1 0x20 |
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| 44 | #define WM8940_ALC2 0x21 |
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| 45 | #define WM8940_ALC3 0x22 |
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| 46 | #define WM8940_NOISEGATE 0x23 |
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| 47 | #define WM8940_PLLN 0x24 |
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| 48 | #define WM8940_PLLK1 0x25 |
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| 49 | #define WM8940_PLLK2 0x26 |
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| 50 | #define WM8940_PLLK3 0x27 |
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| 51 | |
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| 52 | #define WM8940_ALC4 0x2A |
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| 53 | |
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| 54 | #define WM8940_INPUTCTL 0x2C |
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| 55 | #define WM8940_PGAGAIN 0x2D |
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| 56 | |
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| 57 | #define WM8940_ADCBOOST 0x2F |
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| 58 | |
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| 59 | #define WM8940_OUTPUTCTL 0x31 |
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| 60 | #define WM8940_SPKMIX 0x32 |
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| 61 | |
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| 62 | #define WM8940_SPKVOL 0x36 |
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| 63 | |
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| 64 | #define WM8940_MONOMIX 0x38 |
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| 65 | |
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| 66 | #define WM8940_CACHEREGNUM 0x57 |
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| 67 | |
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| 68 | |
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| 69 | /* Clock divider Id's */ |
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| 70 | #define WM8940_BCLKDIV 0 |
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| 71 | #define WM8940_MCLKDIV 1 |
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| 72 | #define WM8940_OPCLKDIV 2 |
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| 73 | |
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| 74 | /* MCLK clock dividers */ |
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| 75 | #define WM8940_MCLKDIV_1 0 |
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| 76 | #define WM8940_MCLKDIV_1_5 1 |
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| 77 | #define WM8940_MCLKDIV_2 2 |
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| 78 | #define WM8940_MCLKDIV_3 3 |
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| 79 | #define WM8940_MCLKDIV_4 4 |
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| 80 | #define WM8940_MCLKDIV_6 5 |
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| 81 | #define WM8940_MCLKDIV_8 6 |
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| 82 | #define WM8940_MCLKDIV_12 7 |
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| 83 | |
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| 84 | /* BCLK clock dividers */ |
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| 85 | #define WM8940_BCLKDIV_1 0 |
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| 86 | #define WM8940_BCLKDIV_2 1 |
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| 87 | #define WM8940_BCLKDIV_4 2 |
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| 88 | #define WM8940_BCLKDIV_8 3 |
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| 89 | #define WM8940_BCLKDIV_16 4 |
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| 90 | #define WM8940_BCLKDIV_32 5 |
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| 91 | |
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| 92 | /* PLL Out Dividers */ |
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| 93 | #define WM8940_OPCLKDIV_1 0 |
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| 94 | #define WM8940_OPCLKDIV_2 1 |
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| 95 | #define WM8940_OPCLKDIV_3 2 |
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| 96 | #define WM8940_OPCLKDIV_4 3 |
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| 97 | |
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| 98 | /* Chip ID */ |
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| 99 | #define WM8940_CHIP_ID 0x8940 |
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| 100 | |
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| 101 | #endif /* _WM8940_H */ |
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| 102 | |
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| 103 | |
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