| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * wm8960.h -- WM8960 Soc Audio driver |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _WM8960_H |
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| 7 | #define _WM8960_H |
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| 8 | |
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| 9 | /* WM8960 register space */ |
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| 10 | |
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| 11 | |
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| 12 | #define WM8960_CACHEREGNUM 56 |
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| 13 | |
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| 14 | #define WM8960_LINVOL 0x0 |
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| 15 | #define WM8960_RINVOL 0x1 |
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| 16 | #define WM8960_LOUT1 0x2 |
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| 17 | #define WM8960_ROUT1 0x3 |
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| 18 | #define WM8960_CLOCK1 0x4 |
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| 19 | #define WM8960_DACCTL1 0x5 |
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| 20 | #define WM8960_DACCTL2 0x6 |
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| 21 | #define WM8960_IFACE1 0x7 |
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| 22 | #define WM8960_CLOCK2 0x8 |
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| 23 | #define WM8960_IFACE2 0x9 |
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| 24 | #define WM8960_LDAC 0xa |
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| 25 | #define WM8960_RDAC 0xb |
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| 26 | |
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| 27 | #define WM8960_RESET 0xf |
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| 28 | #define WM8960_3D 0x10 |
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| 29 | #define WM8960_ALC1 0x11 |
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| 30 | #define WM8960_ALC2 0x12 |
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| 31 | #define WM8960_ALC3 0x13 |
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| 32 | #define WM8960_NOISEG 0x14 |
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| 33 | #define WM8960_LADC 0x15 |
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| 34 | #define WM8960_RADC 0x16 |
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| 35 | #define WM8960_ADDCTL1 0x17 |
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| 36 | #define WM8960_ADDCTL2 0x18 |
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| 37 | #define WM8960_POWER1 0x19 |
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| 38 | #define WM8960_POWER2 0x1a |
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| 39 | #define WM8960_ADDCTL3 0x1b |
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| 40 | #define WM8960_APOP1 0x1c |
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| 41 | #define WM8960_APOP2 0x1d |
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| 42 | |
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| 43 | #define WM8960_LINPATH 0x20 |
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| 44 | #define WM8960_RINPATH 0x21 |
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| 45 | #define WM8960_LOUTMIX 0x22 |
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| 46 | |
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| 47 | #define WM8960_ROUTMIX 0x25 |
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| 48 | #define WM8960_MONOMIX1 0x26 |
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| 49 | #define WM8960_MONOMIX2 0x27 |
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| 50 | #define WM8960_LOUT2 0x28 |
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| 51 | #define WM8960_ROUT2 0x29 |
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| 52 | #define WM8960_MONO 0x2a |
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| 53 | #define WM8960_INBMIX1 0x2b |
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| 54 | #define WM8960_INBMIX2 0x2c |
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| 55 | #define WM8960_BYPASS1 0x2d |
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| 56 | #define WM8960_BYPASS2 0x2e |
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| 57 | #define WM8960_POWER3 0x2f |
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| 58 | #define WM8960_ADDCTL4 0x30 |
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| 59 | #define WM8960_CLASSD1 0x31 |
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| 60 | |
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| 61 | #define WM8960_CLASSD3 0x33 |
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| 62 | #define WM8960_PLL1 0x34 |
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| 63 | #define WM8960_PLL2 0x35 |
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| 64 | #define WM8960_PLL3 0x36 |
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| 65 | #define WM8960_PLL4 0x37 |
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| 66 | |
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| 67 | |
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| 68 | /* |
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| 69 | * WM8960 Clock dividers |
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| 70 | */ |
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| 71 | #define WM8960_SYSCLKDIV 0 |
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| 72 | #define WM8960_DACDIV 1 |
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| 73 | #define WM8960_OPCLKDIV 2 |
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| 74 | #define WM8960_DCLKDIV 3 |
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| 75 | #define WM8960_TOCLKSEL 4 |
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| 76 | |
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| 77 | #define WM8960_SYSCLK_DIV_1 (0 << 1) |
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| 78 | #define WM8960_SYSCLK_DIV_2 (2 << 1) |
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| 79 | |
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| 80 | #define WM8960_SYSCLK_AUTO (0 << 0) |
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| 81 | #define WM8960_SYSCLK_PLL (1 << 0) |
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| 82 | #define WM8960_SYSCLK_MCLK (2 << 0) |
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| 83 | |
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| 84 | #define WM8960_DAC_DIV_1 (0 << 3) |
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| 85 | #define WM8960_DAC_DIV_1_5 (1 << 3) |
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| 86 | #define WM8960_DAC_DIV_2 (2 << 3) |
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| 87 | #define WM8960_DAC_DIV_3 (3 << 3) |
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| 88 | #define WM8960_DAC_DIV_4 (4 << 3) |
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| 89 | #define WM8960_DAC_DIV_5_5 (5 << 3) |
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| 90 | #define WM8960_DAC_DIV_6 (6 << 3) |
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| 91 | |
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| 92 | #define WM8960_DCLK_DIV_1_5 (0 << 6) |
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| 93 | #define WM8960_DCLK_DIV_2 (1 << 6) |
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| 94 | #define WM8960_DCLK_DIV_3 (2 << 6) |
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| 95 | #define WM8960_DCLK_DIV_4 (3 << 6) |
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| 96 | #define WM8960_DCLK_DIV_6 (4 << 6) |
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| 97 | #define WM8960_DCLK_DIV_8 (5 << 6) |
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| 98 | #define WM8960_DCLK_DIV_12 (6 << 6) |
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| 99 | #define WM8960_DCLK_DIV_16 (7 << 6) |
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| 100 | |
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| 101 | #define WM8960_TOCLK_F19 (0 << 1) |
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| 102 | #define WM8960_TOCLK_F21 (1 << 1) |
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| 103 | |
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| 104 | #define WM8960_OPCLK_DIV_1 (0 << 0) |
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| 105 | #define WM8960_OPCLK_DIV_2 (1 << 0) |
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| 106 | #define WM8960_OPCLK_DIV_3 (2 << 0) |
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| 107 | #define WM8960_OPCLK_DIV_4 (3 << 0) |
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| 108 | #define WM8960_OPCLK_DIV_5_5 (4 << 0) |
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| 109 | #define WM8960_OPCLK_DIV_6 (5 << 0) |
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| 110 | |
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| 111 | #endif |
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| 112 | |
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