| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * wm8990.h -- audio driver for WM8990 |
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| 4 | * |
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| 5 | * Copyright 2007 Wolfson Microelectronics PLC. |
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| 6 | * Author: Graeme Gregory |
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| 7 | * graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com |
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| 8 | */ |
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| 9 | |
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| 10 | #ifndef __WM8990REGISTERDEFS_H__ |
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| 11 | #define __WM8990REGISTERDEFS_H__ |
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| 12 | |
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| 13 | /* |
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| 14 | * Register values. |
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| 15 | */ |
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| 16 | #define WM8990_RESET 0x00 |
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| 17 | #define WM8990_POWER_MANAGEMENT_1 0x01 |
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| 18 | #define WM8990_POWER_MANAGEMENT_2 0x02 |
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| 19 | #define WM8990_POWER_MANAGEMENT_3 0x03 |
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| 20 | #define WM8990_AUDIO_INTERFACE_1 0x04 |
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| 21 | #define WM8990_AUDIO_INTERFACE_2 0x05 |
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| 22 | #define WM8990_CLOCKING_1 0x06 |
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| 23 | #define WM8990_CLOCKING_2 0x07 |
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| 24 | #define WM8990_AUDIO_INTERFACE_3 0x08 |
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| 25 | #define WM8990_AUDIO_INTERFACE_4 0x09 |
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| 26 | #define WM8990_DAC_CTRL 0x0A |
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| 27 | #define WM8990_LEFT_DAC_DIGITAL_VOLUME 0x0B |
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| 28 | #define WM8990_RIGHT_DAC_DIGITAL_VOLUME 0x0C |
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| 29 | #define WM8990_DIGITAL_SIDE_TONE 0x0D |
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| 30 | #define WM8990_ADC_CTRL 0x0E |
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| 31 | #define WM8990_LEFT_ADC_DIGITAL_VOLUME 0x0F |
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| 32 | #define WM8990_RIGHT_ADC_DIGITAL_VOLUME 0x10 |
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| 33 | #define WM8990_GPIO_CTRL_1 0x12 |
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| 34 | #define WM8990_GPIO1_GPIO2 0x13 |
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| 35 | #define WM8990_GPIO3_GPIO4 0x14 |
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| 36 | #define WM8990_GPIO5_GPIO6 0x15 |
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| 37 | #define WM8990_GPIOCTRL_2 0x16 |
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| 38 | #define WM8990_GPIO_POL 0x17 |
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| 39 | #define WM8990_LEFT_LINE_INPUT_1_2_VOLUME 0x18 |
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| 40 | #define WM8990_LEFT_LINE_INPUT_3_4_VOLUME 0x19 |
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| 41 | #define WM8990_RIGHT_LINE_INPUT_1_2_VOLUME 0x1A |
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| 42 | #define WM8990_RIGHT_LINE_INPUT_3_4_VOLUME 0x1B |
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| 43 | #define WM8990_LEFT_OUTPUT_VOLUME 0x1C |
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| 44 | #define WM8990_RIGHT_OUTPUT_VOLUME 0x1D |
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| 45 | #define WM8990_LINE_OUTPUTS_VOLUME 0x1E |
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| 46 | #define WM8990_OUT3_4_VOLUME 0x1F |
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| 47 | #define WM8990_LEFT_OPGA_VOLUME 0x20 |
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| 48 | #define WM8990_RIGHT_OPGA_VOLUME 0x21 |
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| 49 | #define WM8990_SPEAKER_VOLUME 0x22 |
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| 50 | #define WM8990_CLASSD1 0x23 |
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| 51 | #define WM8990_CLASSD3 0x25 |
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| 52 | #define WM8990_CLASSD4 0x26 |
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| 53 | #define WM8990_INPUT_MIXER1 0x27 |
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| 54 | #define WM8990_INPUT_MIXER2 0x28 |
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| 55 | #define WM8990_INPUT_MIXER3 0x29 |
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| 56 | #define WM8990_INPUT_MIXER4 0x2A |
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| 57 | #define WM8990_INPUT_MIXER5 0x2B |
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| 58 | #define WM8990_INPUT_MIXER6 0x2C |
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| 59 | #define WM8990_OUTPUT_MIXER1 0x2D |
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| 60 | #define WM8990_OUTPUT_MIXER2 0x2E |
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| 61 | #define WM8990_OUTPUT_MIXER3 0x2F |
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| 62 | #define WM8990_OUTPUT_MIXER4 0x30 |
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| 63 | #define WM8990_OUTPUT_MIXER5 0x31 |
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| 64 | #define WM8990_OUTPUT_MIXER6 0x32 |
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| 65 | #define WM8990_OUT3_4_MIXER 0x33 |
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| 66 | #define WM8990_LINE_MIXER1 0x34 |
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| 67 | #define WM8990_LINE_MIXER2 0x35 |
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| 68 | #define WM8990_SPEAKER_MIXER 0x36 |
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| 69 | #define WM8990_ADDITIONAL_CONTROL 0x37 |
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| 70 | #define WM8990_ANTIPOP1 0x38 |
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| 71 | #define WM8990_ANTIPOP2 0x39 |
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| 72 | #define WM8990_MICBIAS 0x3A |
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| 73 | #define WM8990_PLL1 0x3C |
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| 74 | #define WM8990_PLL2 0x3D |
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| 75 | #define WM8990_PLL3 0x3E |
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| 76 | |
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| 77 | #define WM8990_EXT_ACCESS_ENA 0x75 |
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| 78 | #define WM8990_EXT_CTL1 0x7a |
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| 79 | |
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| 80 | /* |
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| 81 | * Field Definitions. |
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| 82 | */ |
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| 83 | |
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| 84 | /* |
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| 85 | * R0 (0x00) - Reset |
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| 86 | */ |
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| 87 | #define WM8990_SW_RESET_CHIP_ID_MASK 0xFFFF /* SW_RESET_CHIP_ID */ |
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| 88 | |
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| 89 | /* |
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| 90 | * R1 (0x01) - Power Management (1) |
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| 91 | */ |
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| 92 | #define WM8990_SPK_ENA 0x1000 /* SPK_ENA */ |
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| 93 | #define WM8990_SPK_ENA_BIT 12 |
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| 94 | #define WM8990_OUT3_ENA 0x0800 /* OUT3_ENA */ |
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| 95 | #define WM8990_OUT3_ENA_BIT 11 |
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| 96 | #define WM8990_OUT4_ENA 0x0400 /* OUT4_ENA */ |
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| 97 | #define WM8990_OUT4_ENA_BIT 10 |
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| 98 | #define WM8990_LOUT_ENA 0x0200 /* LOUT_ENA */ |
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| 99 | #define WM8990_LOUT_ENA_BIT 9 |
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| 100 | #define WM8990_ROUT_ENA 0x0100 /* ROUT_ENA */ |
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| 101 | #define WM8990_ROUT_ENA_BIT 8 |
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| 102 | #define WM8990_MICBIAS_ENA 0x0010 /* MICBIAS_ENA */ |
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| 103 | #define WM8990_MICBIAS_ENA_BIT 4 |
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| 104 | #define WM8990_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */ |
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| 105 | #define WM8990_VREF_ENA 0x0001 /* VREF_ENA */ |
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| 106 | #define WM8990_VREF_ENA_BIT 0 |
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| 107 | |
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| 108 | /* |
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| 109 | * R2 (0x02) - Power Management (2) |
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| 110 | */ |
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| 111 | #define WM8990_PLL_ENA 0x8000 /* PLL_ENA */ |
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| 112 | #define WM8990_PLL_ENA_BIT 15 |
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| 113 | #define WM8990_TSHUT_ENA 0x4000 /* TSHUT_ENA */ |
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| 114 | #define WM8990_TSHUT_ENA_BIT 14 |
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| 115 | #define WM8990_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */ |
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| 116 | #define WM8990_TSHUT_OPDIS_BIT 13 |
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| 117 | #define WM8990_OPCLK_ENA 0x0800 /* OPCLK_ENA */ |
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| 118 | #define WM8990_OPCLK_ENA_BIT 11 |
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| 119 | #define WM8990_AINL_ENA 0x0200 /* AINL_ENA */ |
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| 120 | #define WM8990_AINL_ENA_BIT 9 |
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| 121 | #define WM8990_AINR_ENA 0x0100 /* AINR_ENA */ |
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| 122 | #define WM8990_AINR_ENA_BIT 8 |
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| 123 | #define WM8990_LIN34_ENA 0x0080 /* LIN34_ENA */ |
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| 124 | #define WM8990_LIN34_ENA_BIT 7 |
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| 125 | #define WM8990_LIN12_ENA 0x0040 /* LIN12_ENA */ |
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| 126 | #define WM8990_LIN12_ENA_BIT 6 |
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| 127 | #define WM8990_RIN34_ENA 0x0020 /* RIN34_ENA */ |
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| 128 | #define WM8990_RIN34_ENA_BIT 5 |
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| 129 | #define WM8990_RIN12_ENA 0x0010 /* RIN12_ENA */ |
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| 130 | #define WM8990_RIN12_ENA_BIT 4 |
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| 131 | #define WM8990_ADCL_ENA 0x0002 /* ADCL_ENA */ |
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| 132 | #define WM8990_ADCL_ENA_BIT 1 |
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| 133 | #define WM8990_ADCR_ENA 0x0001 /* ADCR_ENA */ |
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| 134 | #define WM8990_ADCR_ENA_BIT 0 |
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| 135 | |
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| 136 | /* |
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| 137 | * R3 (0x03) - Power Management (3) |
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| 138 | */ |
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| 139 | #define WM8990_LON_ENA 0x2000 /* LON_ENA */ |
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| 140 | #define WM8990_LON_ENA_BIT 13 |
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| 141 | #define WM8990_LOP_ENA 0x1000 /* LOP_ENA */ |
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| 142 | #define WM8990_LOP_ENA_BIT 12 |
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| 143 | #define WM8990_RON_ENA 0x0800 /* RON_ENA */ |
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| 144 | #define WM8990_RON_ENA_BIT 11 |
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| 145 | #define WM8990_ROP_ENA 0x0400 /* ROP_ENA */ |
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| 146 | #define WM8990_ROP_ENA_BIT 10 |
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| 147 | #define WM8990_LOPGA_ENA 0x0080 /* LOPGA_ENA */ |
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| 148 | #define WM8990_LOPGA_ENA_BIT 7 |
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| 149 | #define WM8990_ROPGA_ENA 0x0040 /* ROPGA_ENA */ |
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| 150 | #define WM8990_ROPGA_ENA_BIT 6 |
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| 151 | #define WM8990_LOMIX_ENA 0x0020 /* LOMIX_ENA */ |
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| 152 | #define WM8990_LOMIX_ENA_BIT 5 |
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| 153 | #define WM8990_ROMIX_ENA 0x0010 /* ROMIX_ENA */ |
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| 154 | #define WM8990_ROMIX_ENA_BIT 4 |
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| 155 | #define WM8990_DACL_ENA 0x0002 /* DACL_ENA */ |
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| 156 | #define WM8990_DACL_ENA_BIT 1 |
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| 157 | #define WM8990_DACR_ENA 0x0001 /* DACR_ENA */ |
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| 158 | #define WM8990_DACR_ENA_BIT 0 |
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| 159 | |
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| 160 | /* |
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| 161 | * R4 (0x04) - Audio Interface (1) |
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| 162 | */ |
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| 163 | #define WM8990_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */ |
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| 164 | #define WM8990_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */ |
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| 165 | #define WM8990_AIFADC_TDM 0x2000 /* AIFADC_TDM */ |
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| 166 | #define WM8990_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */ |
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| 167 | #define WM8990_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */ |
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| 168 | #define WM8990_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */ |
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| 169 | #define WM8990_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */ |
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| 170 | #define WM8990_AIF_WL_16BITS (0 << 5) |
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| 171 | #define WM8990_AIF_WL_20BITS (1 << 5) |
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| 172 | #define WM8990_AIF_WL_24BITS (2 << 5) |
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| 173 | #define WM8990_AIF_WL_32BITS (3 << 5) |
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| 174 | #define WM8990_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */ |
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| 175 | #define WM8990_AIF_TMF_RIGHTJ (0 << 3) |
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| 176 | #define WM8990_AIF_TMF_LEFTJ (1 << 3) |
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| 177 | #define WM8990_AIF_TMF_I2S (2 << 3) |
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| 178 | #define WM8990_AIF_TMF_DSP (3 << 3) |
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| 179 | |
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| 180 | /* |
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| 181 | * R5 (0x05) - Audio Interface (2) |
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| 182 | */ |
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| 183 | #define WM8990_DACL_SRC 0x8000 /* DACL_SRC */ |
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| 184 | #define WM8990_DACR_SRC 0x4000 /* DACR_SRC */ |
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| 185 | #define WM8990_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */ |
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| 186 | #define WM8990_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */ |
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| 187 | #define WM8990_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST */ |
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| 188 | #define WM8990_DAC_COMP 0x0010 /* DAC_COMP */ |
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| 189 | #define WM8990_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */ |
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| 190 | #define WM8990_ADC_COMP 0x0004 /* ADC_COMP */ |
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| 191 | #define WM8990_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */ |
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| 192 | #define WM8990_LOOPBACK 0x0001 /* LOOPBACK */ |
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| 193 | |
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| 194 | /* |
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| 195 | * R6 (0x06) - Clocking (1) |
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| 196 | */ |
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| 197 | #define WM8990_TOCLK_RATE 0x8000 /* TOCLK_RATE */ |
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| 198 | #define WM8990_TOCLK_ENA 0x4000 /* TOCLK_ENA */ |
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| 199 | #define WM8990_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */ |
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| 200 | #define WM8990_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */ |
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| 201 | #define WM8990_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */ |
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| 202 | #define WM8990_BCLK_DIV_1 (0x0 << 1) |
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| 203 | #define WM8990_BCLK_DIV_1_5 (0x1 << 1) |
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| 204 | #define WM8990_BCLK_DIV_2 (0x2 << 1) |
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| 205 | #define WM8990_BCLK_DIV_3 (0x3 << 1) |
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| 206 | #define WM8990_BCLK_DIV_4 (0x4 << 1) |
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| 207 | #define WM8990_BCLK_DIV_5_5 (0x5 << 1) |
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| 208 | #define WM8990_BCLK_DIV_6 (0x6 << 1) |
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| 209 | #define WM8990_BCLK_DIV_8 (0x7 << 1) |
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| 210 | #define WM8990_BCLK_DIV_11 (0x8 << 1) |
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| 211 | #define WM8990_BCLK_DIV_12 (0x9 << 1) |
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| 212 | #define WM8990_BCLK_DIV_16 (0xA << 1) |
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| 213 | #define WM8990_BCLK_DIV_22 (0xB << 1) |
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| 214 | #define WM8990_BCLK_DIV_24 (0xC << 1) |
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| 215 | #define WM8990_BCLK_DIV_32 (0xD << 1) |
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| 216 | #define WM8990_BCLK_DIV_44 (0xE << 1) |
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| 217 | #define WM8990_BCLK_DIV_48 (0xF << 1) |
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| 218 | |
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| 219 | /* |
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| 220 | * R7 (0x07) - Clocking (2) |
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| 221 | */ |
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| 222 | #define WM8990_MCLK_SRC 0x8000 /* MCLK_SRC */ |
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| 223 | #define WM8990_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */ |
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| 224 | #define WM8990_CLK_FORCE 0x2000 /* CLK_FORCE */ |
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| 225 | #define WM8990_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */ |
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| 226 | #define WM8990_MCLK_DIV_1 (0 << 11) |
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| 227 | #define WM8990_MCLK_DIV_2 (2 << 11) |
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| 228 | #define WM8990_MCLK_INV 0x0400 /* MCLK_INV */ |
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| 229 | #define WM8990_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV */ |
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| 230 | #define WM8990_ADC_CLKDIV_1 (0 << 5) |
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| 231 | #define WM8990_ADC_CLKDIV_1_5 (1 << 5) |
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| 232 | #define WM8990_ADC_CLKDIV_2 (2 << 5) |
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| 233 | #define WM8990_ADC_CLKDIV_3 (3 << 5) |
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| 234 | #define WM8990_ADC_CLKDIV_4 (4 << 5) |
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| 235 | #define WM8990_ADC_CLKDIV_5_5 (5 << 5) |
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| 236 | #define WM8990_ADC_CLKDIV_6 (6 << 5) |
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| 237 | #define WM8990_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */ |
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| 238 | #define WM8990_DAC_CLKDIV_1 (0 << 2) |
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| 239 | #define WM8990_DAC_CLKDIV_1_5 (1 << 2) |
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| 240 | #define WM8990_DAC_CLKDIV_2 (2 << 2) |
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| 241 | #define WM8990_DAC_CLKDIV_3 (3 << 2) |
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| 242 | #define WM8990_DAC_CLKDIV_4 (4 << 2) |
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| 243 | #define WM8990_DAC_CLKDIV_5_5 (5 << 2) |
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| 244 | #define WM8990_DAC_CLKDIV_6 (6 << 2) |
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| 245 | |
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| 246 | /* |
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| 247 | * R8 (0x08) - Audio Interface (3) |
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| 248 | */ |
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| 249 | #define WM8990_AIF_MSTR1 0x8000 /* AIF_MSTR1 */ |
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| 250 | #define WM8990_AIF_MSTR2 0x4000 /* AIF_MSTR2 */ |
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| 251 | #define WM8990_AIF_SEL 0x2000 /* AIF_SEL */ |
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| 252 | #define WM8990_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */ |
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| 253 | #define WM8990_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE */ |
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| 254 | |
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| 255 | /* |
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| 256 | * R9 (0x09) - Audio Interface (4) |
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| 257 | */ |
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| 258 | #define WM8990_ALRCGPIO1 0x8000 /* ALRCGPIO1 */ |
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| 259 | #define WM8990_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */ |
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| 260 | #define WM8990_AIF_TRIS 0x2000 /* AIF_TRIS */ |
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| 261 | #define WM8990_DACLRC_DIR 0x0800 /* DACLRC_DIR */ |
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| 262 | #define WM8990_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE */ |
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| 263 | |
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| 264 | /* |
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| 265 | * R10 (0x0A) - DAC CTRL |
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| 266 | */ |
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| 267 | #define WM8990_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */ |
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| 268 | #define WM8990_DAC_MONO 0x0200 /* DAC_MONO */ |
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| 269 | #define WM8990_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */ |
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| 270 | #define WM8990_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */ |
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| 271 | #define WM8990_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */ |
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| 272 | #define WM8990_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */ |
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| 273 | #define WM8990_DAC_MUTE 0x0004 /* DAC_MUTE */ |
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| 274 | #define WM8990_DACL_DATINV 0x0002 /* DACL_DATINV */ |
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| 275 | #define WM8990_DACR_DATINV 0x0001 /* DACR_DATINV */ |
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| 276 | |
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| 277 | /* |
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| 278 | * R11 (0x0B) - Left DAC Digital Volume |
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| 279 | */ |
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| 280 | #define WM8990_DAC_VU 0x0100 /* DAC_VU */ |
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| 281 | #define WM8990_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */ |
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| 282 | #define WM8990_DACL_VOL_SHIFT 0 |
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| 283 | /* |
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| 284 | * R12 (0x0C) - Right DAC Digital Volume |
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| 285 | */ |
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| 286 | #define WM8990_DAC_VU 0x0100 /* DAC_VU */ |
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| 287 | #define WM8990_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */ |
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| 288 | #define WM8990_DACR_VOL_SHIFT 0 |
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| 289 | /* |
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| 290 | * R13 (0x0D) - Digital Side Tone |
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| 291 | */ |
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| 292 | #define WM8990_ADCL_DAC_SVOL_MASK 0x0F /* ADCL_DAC_SVOL */ |
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| 293 | #define WM8990_ADCL_DAC_SVOL_SHIFT 9 |
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| 294 | #define WM8990_ADCR_DAC_SVOL_MASK 0x0F /* ADCR_DAC_SVOL */ |
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| 295 | #define WM8990_ADCR_DAC_SVOL_SHIFT 5 |
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| 296 | #define WM8990_ADC_TO_DACL_MASK 0x03 /* ADC_TO_DACL - [3:2] */ |
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| 297 | #define WM8990_ADC_TO_DACL_SHIFT 2 |
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| 298 | #define WM8990_ADC_TO_DACR_MASK 0x03 /* ADC_TO_DACR - [1:0] */ |
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| 299 | #define WM8990_ADC_TO_DACR_SHIFT 0 |
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| 300 | |
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| 301 | /* |
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| 302 | * R14 (0x0E) - ADC CTRL |
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| 303 | */ |
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| 304 | #define WM8990_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */ |
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| 305 | #define WM8990_ADC_HPF_ENA_BIT 8 |
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| 306 | #define WM8990_ADC_HPF_CUT_MASK 0x03 /* ADC_HPF_CUT - [6:5] */ |
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| 307 | #define WM8990_ADC_HPF_CUT_SHIFT 5 |
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| 308 | #define WM8990_ADCL_DATINV 0x0002 /* ADCL_DATINV */ |
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| 309 | #define WM8990_ADCL_DATINV_BIT 1 |
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| 310 | #define WM8990_ADCR_DATINV 0x0001 /* ADCR_DATINV */ |
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| 311 | #define WM8990_ADCR_DATINV_BIT 0 |
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| 312 | |
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| 313 | /* |
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| 314 | * R15 (0x0F) - Left ADC Digital Volume |
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| 315 | */ |
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| 316 | #define WM8990_ADC_VU 0x0100 /* ADC_VU */ |
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| 317 | #define WM8990_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */ |
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| 318 | #define WM8990_ADCL_VOL_SHIFT 0 |
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| 319 | |
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| 320 | /* |
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| 321 | * R16 (0x10) - Right ADC Digital Volume |
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| 322 | */ |
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| 323 | #define WM8990_ADC_VU 0x0100 /* ADC_VU */ |
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| 324 | #define WM8990_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */ |
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| 325 | #define WM8990_ADCR_VOL_SHIFT 0 |
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| 326 | |
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| 327 | /* |
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| 328 | * R18 (0x12) - GPIO CTRL 1 |
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| 329 | */ |
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| 330 | #define WM8990_IRQ 0x1000 /* IRQ */ |
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| 331 | #define WM8990_TEMPOK 0x0800 /* TEMPOK */ |
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| 332 | #define WM8990_MICSHRT 0x0400 /* MICSHRT */ |
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| 333 | #define WM8990_MICDET 0x0200 /* MICDET */ |
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| 334 | #define WM8990_PLL_LCK 0x0100 /* PLL_LCK */ |
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| 335 | #define WM8990_GPI8_STATUS 0x0080 /* GPI8_STATUS */ |
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| 336 | #define WM8990_GPI7_STATUS 0x0040 /* GPI7_STATUS */ |
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| 337 | #define WM8990_GPIO6_STATUS 0x0020 /* GPIO6_STATUS */ |
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| 338 | #define WM8990_GPIO5_STATUS 0x0010 /* GPIO5_STATUS */ |
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| 339 | #define WM8990_GPIO4_STATUS 0x0008 /* GPIO4_STATUS */ |
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| 340 | #define WM8990_GPIO3_STATUS 0x0004 /* GPIO3_STATUS */ |
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| 341 | #define WM8990_GPIO2_STATUS 0x0002 /* GPIO2_STATUS */ |
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| 342 | #define WM8990_GPIO1_STATUS 0x0001 /* GPIO1_STATUS */ |
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| 343 | |
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| 344 | /* |
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| 345 | * R19 (0x13) - GPIO1 & GPIO2 |
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| 346 | */ |
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| 347 | #define WM8990_GPIO2_DEB_ENA 0x8000 /* GPIO2_DEB_ENA */ |
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| 348 | #define WM8990_GPIO2_IRQ_ENA 0x4000 /* GPIO2_IRQ_ENA */ |
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| 349 | #define WM8990_GPIO2_PU 0x2000 /* GPIO2_PU */ |
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| 350 | #define WM8990_GPIO2_PD 0x1000 /* GPIO2_PD */ |
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| 351 | #define WM8990_GPIO2_SEL_MASK 0x0F00 /* GPIO2_SEL - [11:8] */ |
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| 352 | #define WM8990_GPIO1_DEB_ENA 0x0080 /* GPIO1_DEB_ENA */ |
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| 353 | #define WM8990_GPIO1_IRQ_ENA 0x0040 /* GPIO1_IRQ_ENA */ |
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| 354 | #define WM8990_GPIO1_PU 0x0020 /* GPIO1_PU */ |
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| 355 | #define WM8990_GPIO1_PD 0x0010 /* GPIO1_PD */ |
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| 356 | #define WM8990_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */ |
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| 357 | |
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| 358 | /* |
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| 359 | * R20 (0x14) - GPIO3 & GPIO4 |
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| 360 | */ |
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| 361 | #define WM8990_GPIO4_DEB_ENA 0x8000 /* GPIO4_DEB_ENA */ |
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| 362 | #define WM8990_GPIO4_IRQ_ENA 0x4000 /* GPIO4_IRQ_ENA */ |
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| 363 | #define WM8990_GPIO4_PU 0x2000 /* GPIO4_PU */ |
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| 364 | #define WM8990_GPIO4_PD 0x1000 /* GPIO4_PD */ |
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| 365 | #define WM8990_GPIO4_SEL_MASK 0x0F00 /* GPIO4_SEL - [11:8] */ |
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| 366 | #define WM8990_GPIO3_DEB_ENA 0x0080 /* GPIO3_DEB_ENA */ |
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| 367 | #define WM8990_GPIO3_IRQ_ENA 0x0040 /* GPIO3_IRQ_ENA */ |
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| 368 | #define WM8990_GPIO3_PU 0x0020 /* GPIO3_PU */ |
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| 369 | #define WM8990_GPIO3_PD 0x0010 /* GPIO3_PD */ |
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| 370 | #define WM8990_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */ |
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| 371 | |
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| 372 | /* |
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| 373 | * R21 (0x15) - GPIO5 & GPIO6 |
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| 374 | */ |
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| 375 | #define WM8990_GPIO6_DEB_ENA 0x8000 /* GPIO6_DEB_ENA */ |
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| 376 | #define WM8990_GPIO6_IRQ_ENA 0x4000 /* GPIO6_IRQ_ENA */ |
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| 377 | #define WM8990_GPIO6_PU 0x2000 /* GPIO6_PU */ |
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| 378 | #define WM8990_GPIO6_PD 0x1000 /* GPIO6_PD */ |
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| 379 | #define WM8990_GPIO6_SEL_MASK 0x0F00 /* GPIO6_SEL - [11:8] */ |
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| 380 | #define WM8990_GPIO5_DEB_ENA 0x0080 /* GPIO5_DEB_ENA */ |
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| 381 | #define WM8990_GPIO5_IRQ_ENA 0x0040 /* GPIO5_IRQ_ENA */ |
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| 382 | #define WM8990_GPIO5_PU 0x0020 /* GPIO5_PU */ |
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| 383 | #define WM8990_GPIO5_PD 0x0010 /* GPIO5_PD */ |
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| 384 | #define WM8990_GPIO5_SEL_MASK 0x000F /* GPIO5_SEL - [3:0] */ |
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| 385 | |
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| 386 | /* |
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| 387 | * R22 (0x16) - GPIOCTRL 2 |
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| 388 | */ |
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| 389 | #define WM8990_RD_3W_ENA 0x8000 /* RD_3W_ENA */ |
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| 390 | #define WM8990_MODE_3W4W 0x4000 /* MODE_3W4W */ |
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| 391 | #define WM8990_TEMPOK_IRQ_ENA 0x0800 /* TEMPOK_IRQ_ENA */ |
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| 392 | #define WM8990_MICSHRT_IRQ_ENA 0x0400 /* MICSHRT_IRQ_ENA */ |
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| 393 | #define WM8990_MICDET_IRQ_ENA 0x0200 /* MICDET_IRQ_ENA */ |
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| 394 | #define WM8990_PLL_LCK_IRQ_ENA 0x0100 /* PLL_LCK_IRQ_ENA */ |
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| 395 | #define WM8990_GPI8_DEB_ENA 0x0080 /* GPI8_DEB_ENA */ |
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| 396 | #define WM8990_GPI8_IRQ_ENA 0x0040 /* GPI8_IRQ_ENA */ |
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| 397 | #define WM8990_GPI8_ENA 0x0010 /* GPI8_ENA */ |
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| 398 | #define WM8990_GPI7_DEB_ENA 0x0008 /* GPI7_DEB_ENA */ |
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| 399 | #define WM8990_GPI7_IRQ_ENA 0x0004 /* GPI7_IRQ_ENA */ |
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| 400 | #define WM8990_GPI7_ENA 0x0001 /* GPI7_ENA */ |
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| 401 | |
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| 402 | /* |
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| 403 | * R23 (0x17) - GPIO_POL |
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| 404 | */ |
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| 405 | #define WM8990_IRQ_INV 0x1000 /* IRQ_INV */ |
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| 406 | #define WM8990_TEMPOK_POL 0x0800 /* TEMPOK_POL */ |
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| 407 | #define WM8990_MICSHRT_POL 0x0400 /* MICSHRT_POL */ |
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| 408 | #define WM8990_MICDET_POL 0x0200 /* MICDET_POL */ |
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| 409 | #define WM8990_PLL_LCK_POL 0x0100 /* PLL_LCK_POL */ |
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| 410 | #define WM8990_GPI8_POL 0x0080 /* GPI8_POL */ |
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| 411 | #define WM8990_GPI7_POL 0x0040 /* GPI7_POL */ |
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| 412 | #define WM8990_GPIO6_POL 0x0020 /* GPIO6_POL */ |
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| 413 | #define WM8990_GPIO5_POL 0x0010 /* GPIO5_POL */ |
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| 414 | #define WM8990_GPIO4_POL 0x0008 /* GPIO4_POL */ |
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| 415 | #define WM8990_GPIO3_POL 0x0004 /* GPIO3_POL */ |
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| 416 | #define WM8990_GPIO2_POL 0x0002 /* GPIO2_POL */ |
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| 417 | #define WM8990_GPIO1_POL 0x0001 /* GPIO1_POL */ |
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| 418 | |
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| 419 | /* |
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| 420 | * R24 (0x18) - Left Line Input 1&2 Volume |
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| 421 | */ |
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| 422 | #define WM8990_IPVU 0x0100 /* IPVU */ |
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| 423 | #define WM8990_LI12MUTE 0x0080 /* LI12MUTE */ |
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| 424 | #define WM8990_LI12MUTE_BIT 7 |
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| 425 | #define WM8990_LI12ZC 0x0040 /* LI12ZC */ |
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| 426 | #define WM8990_LI12ZC_BIT 6 |
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| 427 | #define WM8990_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */ |
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| 428 | #define WM8990_LIN12VOL_SHIFT 0 |
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| 429 | /* |
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| 430 | * R25 (0x19) - Left Line Input 3&4 Volume |
|---|
| 431 | */ |
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| 432 | #define WM8990_IPVU 0x0100 /* IPVU */ |
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| 433 | #define WM8990_LI34MUTE 0x0080 /* LI34MUTE */ |
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| 434 | #define WM8990_LI34MUTE_BIT 7 |
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| 435 | #define WM8990_LI34ZC 0x0040 /* LI34ZC */ |
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| 436 | #define WM8990_LI34ZC_BIT 6 |
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| 437 | #define WM8990_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */ |
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| 438 | #define WM8990_LIN34VOL_SHIFT 0 |
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| 439 | |
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| 440 | /* |
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| 441 | * R26 (0x1A) - Right Line Input 1&2 Volume |
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| 442 | */ |
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| 443 | #define WM8990_IPVU 0x0100 /* IPVU */ |
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| 444 | #define WM8990_RI12MUTE 0x0080 /* RI12MUTE */ |
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| 445 | #define WM8990_RI12MUTE_BIT 7 |
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| 446 | #define WM8990_RI12ZC 0x0040 /* RI12ZC */ |
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| 447 | #define WM8990_RI12ZC_BIT 6 |
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| 448 | #define WM8990_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */ |
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| 449 | #define WM8990_RIN12VOL_SHIFT 0 |
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| 450 | |
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| 451 | /* |
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| 452 | * R27 (0x1B) - Right Line Input 3&4 Volume |
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| 453 | */ |
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| 454 | #define WM8990_IPVU 0x0100 /* IPVU */ |
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| 455 | #define WM8990_RI34MUTE 0x0080 /* RI34MUTE */ |
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| 456 | #define WM8990_RI34MUTE_BIT 7 |
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| 457 | #define WM8990_RI34ZC 0x0040 /* RI34ZC */ |
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| 458 | #define WM8990_RI34ZC_BIT 6 |
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| 459 | #define WM8990_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */ |
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| 460 | #define WM8990_RIN34VOL_SHIFT 0 |
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| 461 | |
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| 462 | /* |
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| 463 | * R28 (0x1C) - Left Output Volume |
|---|
| 464 | */ |
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| 465 | #define WM8990_OPVU 0x0100 /* OPVU */ |
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| 466 | #define WM8990_LOZC 0x0080 /* LOZC */ |
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| 467 | #define WM8990_LOZC_BIT 7 |
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| 468 | #define WM8990_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */ |
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| 469 | #define WM8990_LOUTVOL_SHIFT 0 |
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| 470 | /* |
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| 471 | * R29 (0x1D) - Right Output Volume |
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| 472 | */ |
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| 473 | #define WM8990_OPVU 0x0100 /* OPVU */ |
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| 474 | #define WM8990_ROZC 0x0080 /* ROZC */ |
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| 475 | #define WM8990_ROZC_BIT 7 |
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| 476 | #define WM8990_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */ |
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| 477 | #define WM8990_ROUTVOL_SHIFT 0 |
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| 478 | /* |
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| 479 | * R30 (0x1E) - Line Outputs Volume |
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| 480 | */ |
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| 481 | #define WM8990_LONMUTE 0x0040 /* LONMUTE */ |
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| 482 | #define WM8990_LONMUTE_BIT 6 |
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| 483 | #define WM8990_LOPMUTE 0x0020 /* LOPMUTE */ |
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| 484 | #define WM8990_LOPMUTE_BIT 5 |
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| 485 | #define WM8990_LOATTN 0x0010 /* LOATTN */ |
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| 486 | #define WM8990_LOATTN_BIT 4 |
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| 487 | #define WM8990_RONMUTE 0x0004 /* RONMUTE */ |
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| 488 | #define WM8990_RONMUTE_BIT 2 |
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| 489 | #define WM8990_ROPMUTE 0x0002 /* ROPMUTE */ |
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| 490 | #define WM8990_ROPMUTE_BIT 1 |
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| 491 | #define WM8990_ROATTN 0x0001 /* ROATTN */ |
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| 492 | #define WM8990_ROATTN_BIT 0 |
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| 493 | |
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| 494 | /* |
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| 495 | * R31 (0x1F) - Out3/4 Volume |
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| 496 | */ |
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| 497 | #define WM8990_OUT3MUTE 0x0020 /* OUT3MUTE */ |
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| 498 | #define WM8990_OUT3MUTE_BIT 5 |
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| 499 | #define WM8990_OUT3ATTN 0x0010 /* OUT3ATTN */ |
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| 500 | #define WM8990_OUT3ATTN_BIT 4 |
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| 501 | #define WM8990_OUT4MUTE 0x0002 /* OUT4MUTE */ |
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| 502 | #define WM8990_OUT4MUTE_BIT 1 |
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| 503 | #define WM8990_OUT4ATTN 0x0001 /* OUT4ATTN */ |
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| 504 | #define WM8990_OUT4ATTN_BIT 0 |
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| 505 | |
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| 506 | /* |
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| 507 | * R32 (0x20) - Left OPGA Volume |
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| 508 | */ |
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| 509 | #define WM8990_OPVU 0x0100 /* OPVU */ |
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| 510 | #define WM8990_LOPGAZC 0x0080 /* LOPGAZC */ |
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| 511 | #define WM8990_LOPGAZC_BIT 7 |
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| 512 | #define WM8990_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */ |
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| 513 | #define WM8990_LOPGAVOL_SHIFT 0 |
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| 514 | |
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| 515 | /* |
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| 516 | * R33 (0x21) - Right OPGA Volume |
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| 517 | */ |
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| 518 | #define WM8990_OPVU 0x0100 /* OPVU */ |
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| 519 | #define WM8990_ROPGAZC 0x0080 /* ROPGAZC */ |
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| 520 | #define WM8990_ROPGAZC_BIT 7 |
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| 521 | #define WM8990_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */ |
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| 522 | #define WM8990_ROPGAVOL_SHIFT 0 |
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| 523 | /* |
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| 524 | * R34 (0x22) - Speaker Volume |
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| 525 | */ |
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| 526 | #define WM8990_SPKATTN_MASK 0x0003 /* SPKATTN - [1:0] */ |
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| 527 | #define WM8990_SPKATTN_SHIFT 0 |
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| 528 | |
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| 529 | /* |
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| 530 | * R35 (0x23) - ClassD1 |
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| 531 | */ |
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| 532 | #define WM8990_CDMODE 0x0100 /* CDMODE */ |
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| 533 | #define WM8990_CDMODE_BIT 8 |
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| 534 | |
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| 535 | /* |
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| 536 | * R37 (0x25) - ClassD3 |
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| 537 | */ |
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| 538 | #define WM8990_DCGAIN_MASK 0x0007 /* DCGAIN - [5:3] */ |
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| 539 | #define WM8990_DCGAIN_SHIFT 3 |
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| 540 | #define WM8990_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */ |
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| 541 | #define WM8990_ACGAIN_SHIFT 0 |
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| 542 | |
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| 543 | /* |
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| 544 | * R38 (0x26) - ClassD4 |
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| 545 | */ |
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| 546 | #define WM8990_SPKZC_MASK 0x0001 /* SPKZC */ |
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| 547 | #define WM8990_SPKZC_SHIFT 7 /* SPKZC */ |
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| 548 | #define WM8990_SPKVOL_MASK 0x007F /* SPKVOL - [6:0] */ |
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| 549 | #define WM8990_SPKVOL_SHIFT 0 /* SPKVOL - [6:0] */ |
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| 550 | |
|---|
| 551 | /* |
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| 552 | * R39 (0x27) - Input Mixer1 |
|---|
| 553 | */ |
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| 554 | #define WM8990_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */ |
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| 555 | #define WM8990_AINLMODE_SHIFT 2 |
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| 556 | #define WM8990_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */ |
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| 557 | #define WM8990_AINRMODE_SHIFT 0 |
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| 558 | |
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| 559 | /* |
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| 560 | * R40 (0x28) - Input Mixer2 |
|---|
| 561 | */ |
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| 562 | #define WM8990_LMP4 0x0080 /* LMP4 */ |
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| 563 | #define WM8990_LMP4_BIT 7 /* LMP4 */ |
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| 564 | #define WM8990_LMN3 0x0040 /* LMN3 */ |
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| 565 | #define WM8990_LMN3_BIT 6 /* LMN3 */ |
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| 566 | #define WM8990_LMP2 0x0020 /* LMP2 */ |
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| 567 | #define WM8990_LMP2_BIT 5 /* LMP2 */ |
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| 568 | #define WM8990_LMN1 0x0010 /* LMN1 */ |
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| 569 | #define WM8990_LMN1_BIT 4 /* LMN1 */ |
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| 570 | #define WM8990_RMP4 0x0008 /* RMP4 */ |
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| 571 | #define WM8990_RMP4_BIT 3 /* RMP4 */ |
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| 572 | #define WM8990_RMN3 0x0004 /* RMN3 */ |
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| 573 | #define WM8990_RMN3_BIT 2 /* RMN3 */ |
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| 574 | #define WM8990_RMP2 0x0002 /* RMP2 */ |
|---|
| 575 | #define WM8990_RMP2_BIT 1 /* RMP2 */ |
|---|
| 576 | #define WM8990_RMN1 0x0001 /* RMN1 */ |
|---|
| 577 | #define WM8990_RMN1_BIT 0 /* RMN1 */ |
|---|
| 578 | |
|---|
| 579 | /* |
|---|
| 580 | * R41 (0x29) - Input Mixer3 |
|---|
| 581 | */ |
|---|
| 582 | #define WM8990_L34MNB 0x0100 /* L34MNB */ |
|---|
| 583 | #define WM8990_L34MNB_BIT 8 |
|---|
| 584 | #define WM8990_L34MNBST 0x0080 /* L34MNBST */ |
|---|
| 585 | #define WM8990_L34MNBST_BIT 7 |
|---|
| 586 | #define WM8990_L12MNB 0x0020 /* L12MNB */ |
|---|
| 587 | #define WM8990_L12MNB_BIT 5 |
|---|
| 588 | #define WM8990_L12MNBST 0x0010 /* L12MNBST */ |
|---|
| 589 | #define WM8990_L12MNBST_BIT 4 |
|---|
| 590 | #define WM8990_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */ |
|---|
| 591 | #define WM8990_LDBVOL_SHIFT 0 |
|---|
| 592 | |
|---|
| 593 | /* |
|---|
| 594 | * R42 (0x2A) - Input Mixer4 |
|---|
| 595 | */ |
|---|
| 596 | #define WM8990_R34MNB 0x0100 /* R34MNB */ |
|---|
| 597 | #define WM8990_R34MNB_BIT 8 |
|---|
| 598 | #define WM8990_R34MNBST 0x0080 /* R34MNBST */ |
|---|
| 599 | #define WM8990_R34MNBST_BIT 7 |
|---|
| 600 | #define WM8990_R12MNB 0x0020 /* R12MNB */ |
|---|
| 601 | #define WM8990_R12MNB_BIT 5 |
|---|
| 602 | #define WM8990_R12MNBST 0x0010 /* R12MNBST */ |
|---|
| 603 | #define WM8990_R12MNBST_BIT 4 |
|---|
| 604 | #define WM8990_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */ |
|---|
| 605 | #define WM8990_RDBVOL_SHIFT 0 |
|---|
| 606 | |
|---|
| 607 | /* |
|---|
| 608 | * R43 (0x2B) - Input Mixer5 |
|---|
| 609 | */ |
|---|
| 610 | #define WM8990_LI2BVOL_MASK 0x07 /* LI2BVOL - [8:6] */ |
|---|
| 611 | #define WM8990_LI2BVOL_SHIFT 6 |
|---|
| 612 | #define WM8990_LR4BVOL_MASK 0x07 /* LR4BVOL - [5:3] */ |
|---|
| 613 | #define WM8990_LR4BVOL_SHIFT 3 |
|---|
| 614 | #define WM8990_LL4BVOL_MASK 0x07 /* LL4BVOL - [2:0] */ |
|---|
| 615 | #define WM8990_LL4BVOL_SHIFT 0 |
|---|
| 616 | |
|---|
| 617 | /* |
|---|
| 618 | * R44 (0x2C) - Input Mixer6 |
|---|
| 619 | */ |
|---|
| 620 | #define WM8990_RI2BVOL_MASK 0x07 /* RI2BVOL - [8:6] */ |
|---|
| 621 | #define WM8990_RI2BVOL_SHIFT 6 |
|---|
| 622 | #define WM8990_RL4BVOL_MASK 0x07 /* RL4BVOL - [5:3] */ |
|---|
| 623 | #define WM8990_RL4BVOL_SHIFT 3 |
|---|
| 624 | #define WM8990_RR4BVOL_MASK 0x07 /* RR4BVOL - [2:0] */ |
|---|
| 625 | #define WM8990_RR4BVOL_SHIFT 0 |
|---|
| 626 | |
|---|
| 627 | /* |
|---|
| 628 | * R45 (0x2D) - Output Mixer1 |
|---|
| 629 | */ |
|---|
| 630 | #define WM8990_LRBLO 0x0080 /* LRBLO */ |
|---|
| 631 | #define WM8990_LRBLO_BIT 7 |
|---|
| 632 | #define WM8990_LLBLO 0x0040 /* LLBLO */ |
|---|
| 633 | #define WM8990_LLBLO_BIT 6 |
|---|
| 634 | #define WM8990_LRI3LO 0x0020 /* LRI3LO */ |
|---|
| 635 | #define WM8990_LRI3LO_BIT 5 |
|---|
| 636 | #define WM8990_LLI3LO 0x0010 /* LLI3LO */ |
|---|
| 637 | #define WM8990_LLI3LO_BIT 4 |
|---|
| 638 | #define WM8990_LR12LO 0x0008 /* LR12LO */ |
|---|
| 639 | #define WM8990_LR12LO_BIT 3 |
|---|
| 640 | #define WM8990_LL12LO 0x0004 /* LL12LO */ |
|---|
| 641 | #define WM8990_LL12LO_BIT 2 |
|---|
| 642 | #define WM8990_LDLO 0x0001 /* LDLO */ |
|---|
| 643 | #define WM8990_LDLO_BIT 0 |
|---|
| 644 | |
|---|
| 645 | /* |
|---|
| 646 | * R46 (0x2E) - Output Mixer2 |
|---|
| 647 | */ |
|---|
| 648 | #define WM8990_RLBRO 0x0080 /* RLBRO */ |
|---|
| 649 | #define WM8990_RLBRO_BIT 7 |
|---|
| 650 | #define WM8990_RRBRO 0x0040 /* RRBRO */ |
|---|
| 651 | #define WM8990_RRBRO_BIT 6 |
|---|
| 652 | #define WM8990_RLI3RO 0x0020 /* RLI3RO */ |
|---|
| 653 | #define WM8990_RLI3RO_BIT 5 |
|---|
| 654 | #define WM8990_RRI3RO 0x0010 /* RRI3RO */ |
|---|
| 655 | #define WM8990_RRI3RO_BIT 4 |
|---|
| 656 | #define WM8990_RL12RO 0x0008 /* RL12RO */ |
|---|
| 657 | #define WM8990_RL12RO_BIT 3 |
|---|
| 658 | #define WM8990_RR12RO 0x0004 /* RR12RO */ |
|---|
| 659 | #define WM8990_RR12RO_BIT 2 |
|---|
| 660 | #define WM8990_RDRO 0x0001 /* RDRO */ |
|---|
| 661 | #define WM8990_RDRO_BIT 0 |
|---|
| 662 | |
|---|
| 663 | /* |
|---|
| 664 | * R47 (0x2F) - Output Mixer3 |
|---|
| 665 | */ |
|---|
| 666 | #define WM8990_LLI3LOVOL_MASK 0x07 /* LLI3LOVOL - [8:6] */ |
|---|
| 667 | #define WM8990_LLI3LOVOL_SHIFT 6 |
|---|
| 668 | #define WM8990_LR12LOVOL_MASK 0x07 /* LR12LOVOL - [5:3] */ |
|---|
| 669 | #define WM8990_LR12LOVOL_SHIFT 3 |
|---|
| 670 | #define WM8990_LL12LOVOL_MASK 0x07 /* LL12LOVOL - [2:0] */ |
|---|
| 671 | #define WM8990_LL12LOVOL_SHIFT 0 |
|---|
| 672 | |
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| 673 | /* |
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| 674 | * R48 (0x30) - Output Mixer4 |
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| 675 | */ |
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| 676 | #define WM8990_RRI3ROVOL_MASK 0x07 /* RRI3ROVOL - [8:6] */ |
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| 677 | #define WM8990_RRI3ROVOL_SHIFT 6 |
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| 678 | #define WM8990_RL12ROVOL_MASK 0x07 /* RL12ROVOL - [5:3] */ |
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| 679 | #define WM8990_RL12ROVOL_SHIFT 3 |
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| 680 | #define WM8990_RR12ROVOL_MASK 0x07 /* RR12ROVOL - [2:0] */ |
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| 681 | #define WM8990_RR12ROVOL_SHIFT 0 |
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| 682 | |
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| 683 | /* |
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| 684 | * R49 (0x31) - Output Mixer5 |
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| 685 | */ |
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| 686 | #define WM8990_LRI3LOVOL_MASK 0x07 /* LRI3LOVOL - [8:6] */ |
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| 687 | #define WM8990_LRI3LOVOL_SHIFT 6 |
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| 688 | #define WM8990_LRBLOVOL_MASK 0x07 /* LRBLOVOL - [5:3] */ |
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| 689 | #define WM8990_LRBLOVOL_SHIFT 3 |
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| 690 | #define WM8990_LLBLOVOL_MASK 0x07 /* LLBLOVOL - [2:0] */ |
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| 691 | #define WM8990_LLBLOVOL_SHIFT 0 |
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| 692 | |
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| 693 | /* |
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| 694 | * R50 (0x32) - Output Mixer6 |
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| 695 | */ |
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| 696 | #define WM8990_RLI3ROVOL_MASK 0x07 /* RLI3ROVOL - [8:6] */ |
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| 697 | #define WM8990_RLI3ROVOL_SHIFT 6 |
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| 698 | #define WM8990_RLBROVOL_MASK 0x07 /* RLBROVOL - [5:3] */ |
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| 699 | #define WM8990_RLBROVOL_SHIFT 3 |
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| 700 | #define WM8990_RRBROVOL_MASK 0x07 /* RRBROVOL - [2:0] */ |
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| 701 | #define WM8990_RRBROVOL_SHIFT 0 |
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| 702 | |
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| 703 | /* |
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| 704 | * R51 (0x33) - Out3/4 Mixer |
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| 705 | */ |
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| 706 | #define WM8990_VSEL_MASK 0x0180 /* VSEL - [8:7] */ |
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| 707 | #define WM8990_LI4O3 0x0020 /* LI4O3 */ |
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| 708 | #define WM8990_LI4O3_BIT 5 |
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| 709 | #define WM8990_LPGAO3 0x0010 /* LPGAO3 */ |
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| 710 | #define WM8990_LPGAO3_BIT 4 |
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| 711 | #define WM8990_RI4O4 0x0002 /* RI4O4 */ |
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| 712 | #define WM8990_RI4O4_BIT 1 |
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| 713 | #define WM8990_RPGAO4 0x0001 /* RPGAO4 */ |
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| 714 | #define WM8990_RPGAO4_BIT 0 |
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| 715 | /* |
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| 716 | * R52 (0x34) - Line Mixer1 |
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| 717 | */ |
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| 718 | #define WM8990_LLOPGALON 0x0040 /* LLOPGALON */ |
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| 719 | #define WM8990_LLOPGALON_BIT 6 |
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| 720 | #define WM8990_LROPGALON 0x0020 /* LROPGALON */ |
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| 721 | #define WM8990_LROPGALON_BIT 5 |
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| 722 | #define WM8990_LOPLON 0x0010 /* LOPLON */ |
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| 723 | #define WM8990_LOPLON_BIT 4 |
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| 724 | #define WM8990_LR12LOP 0x0004 /* LR12LOP */ |
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| 725 | #define WM8990_LR12LOP_BIT 2 |
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| 726 | #define WM8990_LL12LOP 0x0002 /* LL12LOP */ |
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| 727 | #define WM8990_LL12LOP_BIT 1 |
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| 728 | #define WM8990_LLOPGALOP 0x0001 /* LLOPGALOP */ |
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| 729 | #define WM8990_LLOPGALOP_BIT 0 |
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| 730 | /* |
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| 731 | * R53 (0x35) - Line Mixer2 |
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| 732 | */ |
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| 733 | #define WM8990_RROPGARON 0x0040 /* RROPGARON */ |
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| 734 | #define WM8990_RROPGARON_BIT 6 |
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| 735 | #define WM8990_RLOPGARON 0x0020 /* RLOPGARON */ |
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| 736 | #define WM8990_RLOPGARON_BIT 5 |
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| 737 | #define WM8990_ROPRON 0x0010 /* ROPRON */ |
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| 738 | #define WM8990_ROPRON_BIT 4 |
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| 739 | #define WM8990_RL12ROP 0x0004 /* RL12ROP */ |
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| 740 | #define WM8990_RL12ROP_BIT 2 |
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| 741 | #define WM8990_RR12ROP 0x0002 /* RR12ROP */ |
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| 742 | #define WM8990_RR12ROP_BIT 1 |
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| 743 | #define WM8990_RROPGAROP 0x0001 /* RROPGAROP */ |
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| 744 | #define WM8990_RROPGAROP_BIT 0 |
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| 745 | |
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| 746 | /* |
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| 747 | * R54 (0x36) - Speaker Mixer |
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| 748 | */ |
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| 749 | #define WM8990_LB2SPK 0x0080 /* LB2SPK */ |
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| 750 | #define WM8990_LB2SPK_BIT 7 |
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| 751 | #define WM8990_RB2SPK 0x0040 /* RB2SPK */ |
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| 752 | #define WM8990_RB2SPK_BIT 6 |
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| 753 | #define WM8990_LI2SPK 0x0020 /* LI2SPK */ |
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| 754 | #define WM8990_LI2SPK_BIT 5 |
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| 755 | #define WM8990_RI2SPK 0x0010 /* RI2SPK */ |
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| 756 | #define WM8990_RI2SPK_BIT 4 |
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| 757 | #define WM8990_LOPGASPK 0x0008 /* LOPGASPK */ |
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| 758 | #define WM8990_LOPGASPK_BIT 3 |
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| 759 | #define WM8990_ROPGASPK 0x0004 /* ROPGASPK */ |
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| 760 | #define WM8990_ROPGASPK_BIT 2 |
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| 761 | #define WM8990_LDSPK 0x0002 /* LDSPK */ |
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| 762 | #define WM8990_LDSPK_BIT 1 |
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| 763 | #define WM8990_RDSPK 0x0001 /* RDSPK */ |
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| 764 | #define WM8990_RDSPK_BIT 0 |
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| 765 | |
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| 766 | /* |
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| 767 | * R55 (0x37) - Additional Control |
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| 768 | */ |
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| 769 | #define WM8990_VROI 0x0001 /* VROI */ |
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| 770 | |
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| 771 | /* |
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| 772 | * R56 (0x38) - AntiPOP1 |
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| 773 | */ |
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| 774 | #define WM8990_DIS_LLINE 0x0020 /* DIS_LLINE */ |
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| 775 | #define WM8990_DIS_RLINE 0x0010 /* DIS_RLINE */ |
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| 776 | #define WM8990_DIS_OUT3 0x0008 /* DIS_OUT3 */ |
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| 777 | #define WM8990_DIS_OUT4 0x0004 /* DIS_OUT4 */ |
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| 778 | #define WM8990_DIS_LOUT 0x0002 /* DIS_LOUT */ |
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| 779 | #define WM8990_DIS_ROUT 0x0001 /* DIS_ROUT */ |
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| 780 | |
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| 781 | /* |
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| 782 | * R57 (0x39) - AntiPOP2 |
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| 783 | */ |
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| 784 | #define WM8990_SOFTST 0x0040 /* SOFTST */ |
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| 785 | #define WM8990_BUFIOEN 0x0008 /* BUFIOEN */ |
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| 786 | #define WM8990_BUFDCOPEN 0x0004 /* BUFDCOPEN */ |
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| 787 | #define WM8990_POBCTRL 0x0002 /* POBCTRL */ |
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| 788 | #define WM8990_VMIDTOG 0x0001 /* VMIDTOG */ |
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| 789 | |
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| 790 | /* |
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| 791 | * R58 (0x3A) - MICBIAS |
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| 792 | */ |
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| 793 | #define WM8990_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */ |
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| 794 | #define WM8990_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */ |
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| 795 | #define WM8990_MCD 0x0004 /* MCD */ |
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| 796 | #define WM8990_MBSEL 0x0001 /* MBSEL */ |
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| 797 | |
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| 798 | /* |
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| 799 | * R60 (0x3C) - PLL1 |
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| 800 | */ |
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| 801 | #define WM8990_SDM 0x0080 /* SDM */ |
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| 802 | #define WM8990_PRESCALE 0x0040 /* PRESCALE */ |
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| 803 | #define WM8990_PLLN_MASK 0x000F /* PLLN - [3:0] */ |
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| 804 | |
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| 805 | /* |
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| 806 | * R61 (0x3D) - PLL2 |
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| 807 | */ |
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| 808 | #define WM8990_PLLK1_MASK 0x00FF /* PLLK1 - [7:0] */ |
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| 809 | |
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| 810 | /* |
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| 811 | * R62 (0x3E) - PLL3 |
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| 812 | */ |
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| 813 | #define WM8990_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ |
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| 814 | |
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| 815 | #define WM8990_MCLK_DIV 0 |
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| 816 | #define WM8990_DACCLK_DIV 1 |
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| 817 | #define WM8990_ADCCLK_DIV 2 |
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| 818 | #define WM8990_BCLK_DIV 3 |
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| 819 | |
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| 820 | #endif /* __WM8990REGISTERDEFS_H__ */ |
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| 821 | /*------------------------------ END OF FILE ---------------------------------*/ |
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| 822 | |
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