| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * wm9713.h -- WM9713 Soc Audio driver |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _WM9713_H |
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| 7 | #define _WM9713_H |
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| 8 | |
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| 9 | /* clock inputs */ |
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| 10 | #define WM9713_CLKA_PIN 0 |
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| 11 | #define WM9713_CLKB_PIN 1 |
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| 12 | |
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| 13 | /* clock divider ID's */ |
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| 14 | #define WM9713_PCMCLK_DIV 0 |
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| 15 | #define WM9713_CLKA_MULT 1 |
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| 16 | #define WM9713_CLKB_MULT 2 |
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| 17 | #define WM9713_HIFI_DIV 3 |
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| 18 | #define WM9713_PCMBCLK_DIV 4 |
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| 19 | #define WM9713_PCMCLK_PLL_DIV 5 |
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| 20 | #define WM9713_HIFI_PLL_DIV 6 |
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| 21 | |
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| 22 | /* Calculate the appropriate bit mask for the external PCM clock divider */ |
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| 23 | #define WM9713_PCMDIV(x) ((x - 1) << 8) |
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| 24 | |
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| 25 | /* Calculate the appropriate bit mask for the external HiFi clock divider */ |
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| 26 | #define WM9713_HIFIDIV(x) ((x - 1) << 12) |
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| 27 | |
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| 28 | /* MCLK clock mulitipliers */ |
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| 29 | #define WM9713_CLKA_X1 (0 << 1) |
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| 30 | #define WM9713_CLKA_X2 (1 << 1) |
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| 31 | #define WM9713_CLKB_X1 (0 << 2) |
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| 32 | #define WM9713_CLKB_X2 (1 << 2) |
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| 33 | |
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| 34 | /* MCLK clock MUX */ |
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| 35 | #define WM9713_CLK_MUX_A (0 << 0) |
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| 36 | #define WM9713_CLK_MUX_B (1 << 0) |
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| 37 | |
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| 38 | /* Voice DAI BCLK divider */ |
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| 39 | #define WM9713_PCMBCLK_DIV_1 (0 << 9) |
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| 40 | #define WM9713_PCMBCLK_DIV_2 (1 << 9) |
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| 41 | #define WM9713_PCMBCLK_DIV_4 (2 << 9) |
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| 42 | #define WM9713_PCMBCLK_DIV_8 (3 << 9) |
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| 43 | #define WM9713_PCMBCLK_DIV_16 (4 << 9) |
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| 44 | |
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| 45 | #endif |
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| 46 | |
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