1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration. |
4 | * |
5 | * Copyright (c) 2019, Intel Corporation. |
6 | * |
7 | */ |
8 | |
9 | #include <sound/soc-acpi.h> |
10 | #include <sound/soc-acpi-intel-match.h> |
11 | #include "soc-acpi-intel-sdw-mockup-match.h" |
12 | |
13 | static const struct snd_soc_acpi_codecs essx_83x6 = { |
14 | .num_codecs = 3, |
15 | .codecs = { "ESSX8316" , "ESSX8326" , "ESSX8336" }, |
16 | }; |
17 | |
18 | static const struct snd_soc_acpi_codecs tgl_codecs = { |
19 | .num_codecs = 1, |
20 | .codecs = {"MX98357A" } |
21 | }; |
22 | |
23 | static const struct snd_soc_acpi_endpoint single_endpoint = { |
24 | .num = 0, |
25 | .aggregated = 0, |
26 | .group_position = 0, |
27 | .group_id = 0, |
28 | }; |
29 | |
30 | static const struct snd_soc_acpi_endpoint spk_l_endpoint = { |
31 | .num = 0, |
32 | .aggregated = 1, |
33 | .group_position = 0, |
34 | .group_id = 1, |
35 | }; |
36 | |
37 | static const struct snd_soc_acpi_endpoint spk_r_endpoint = { |
38 | .num = 0, |
39 | .aggregated = 1, |
40 | .group_position = 1, |
41 | .group_id = 1, |
42 | }; |
43 | |
44 | static const struct snd_soc_acpi_endpoint spk_2_endpoint = { |
45 | .num = 0, |
46 | .aggregated = 1, |
47 | .group_position = 2, |
48 | .group_id = 1, |
49 | }; |
50 | |
51 | static const struct snd_soc_acpi_endpoint spk_3_endpoint = { |
52 | .num = 0, |
53 | .aggregated = 1, |
54 | .group_position = 3, |
55 | .group_id = 1, |
56 | }; |
57 | |
58 | static const struct snd_soc_acpi_endpoint rt712_endpoints[] = { |
59 | { |
60 | .num = 0, |
61 | .aggregated = 0, |
62 | .group_position = 0, |
63 | .group_id = 0, |
64 | }, |
65 | { |
66 | .num = 1, |
67 | .aggregated = 0, |
68 | .group_position = 0, |
69 | .group_id = 0, |
70 | }, |
71 | }; |
72 | |
73 | static const struct snd_soc_acpi_adr_device rt711_0_adr[] = { |
74 | { |
75 | .adr = 0x000020025D071100ull, |
76 | .num_endpoints = 1, |
77 | .endpoints = &single_endpoint, |
78 | .name_prefix = "rt711" |
79 | } |
80 | }; |
81 | |
82 | static const struct snd_soc_acpi_adr_device rt711_1_adr[] = { |
83 | { |
84 | .adr = 0x000120025D071100ull, |
85 | .num_endpoints = 1, |
86 | .endpoints = &single_endpoint, |
87 | .name_prefix = "rt711" |
88 | } |
89 | }; |
90 | |
91 | static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = { |
92 | { |
93 | .adr = 0x000120025D130800ull, |
94 | .num_endpoints = 1, |
95 | .endpoints = &spk_l_endpoint, |
96 | .name_prefix = "rt1308-1" |
97 | }, |
98 | { |
99 | .adr = 0x000122025D130800ull, |
100 | .num_endpoints = 1, |
101 | .endpoints = &spk_r_endpoint, |
102 | .name_prefix = "rt1308-2" |
103 | } |
104 | }; |
105 | |
106 | static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = { |
107 | { |
108 | .adr = 0x000120025D130800ull, |
109 | .num_endpoints = 1, |
110 | .endpoints = &single_endpoint, |
111 | .name_prefix = "rt1308-1" |
112 | } |
113 | }; |
114 | |
115 | static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = { |
116 | { |
117 | .adr = 0x000220025D130800ull, |
118 | .num_endpoints = 1, |
119 | .endpoints = &single_endpoint, |
120 | .name_prefix = "rt1308-1" |
121 | } |
122 | }; |
123 | |
124 | static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = { |
125 | { |
126 | .adr = 0x000120025D130800ull, |
127 | .num_endpoints = 1, |
128 | .endpoints = &spk_l_endpoint, |
129 | .name_prefix = "rt1308-1" |
130 | } |
131 | }; |
132 | |
133 | static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = { |
134 | { |
135 | .adr = 0x000220025D130800ull, |
136 | .num_endpoints = 1, |
137 | .endpoints = &spk_r_endpoint, |
138 | .name_prefix = "rt1308-2" |
139 | } |
140 | }; |
141 | |
142 | static const struct snd_soc_acpi_adr_device rt715_0_adr[] = { |
143 | { |
144 | .adr = 0x000021025D071500ull, |
145 | .num_endpoints = 1, |
146 | .endpoints = &single_endpoint, |
147 | .name_prefix = "rt715" |
148 | } |
149 | }; |
150 | |
151 | static const struct snd_soc_acpi_adr_device rt715_3_adr[] = { |
152 | { |
153 | .adr = 0x000320025D071500ull, |
154 | .num_endpoints = 1, |
155 | .endpoints = &single_endpoint, |
156 | .name_prefix = "rt715" |
157 | } |
158 | }; |
159 | |
160 | static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = { |
161 | { |
162 | .adr = 0x000123019F837300ull, |
163 | .num_endpoints = 1, |
164 | .endpoints = &spk_r_endpoint, |
165 | .name_prefix = "Right" |
166 | }, |
167 | { |
168 | .adr = 0x000127019F837300ull, |
169 | .num_endpoints = 1, |
170 | .endpoints = &spk_l_endpoint, |
171 | .name_prefix = "Left" |
172 | } |
173 | }; |
174 | |
175 | static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = { |
176 | { |
177 | .adr = 0x000021025D568200ull, |
178 | .num_endpoints = 1, |
179 | .endpoints = &single_endpoint, |
180 | .name_prefix = "rt5682" |
181 | } |
182 | }; |
183 | |
184 | static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = { |
185 | { |
186 | .adr = 0x000030025D071101ull, |
187 | .num_endpoints = 1, |
188 | .endpoints = &single_endpoint, |
189 | .name_prefix = "rt711" |
190 | } |
191 | }; |
192 | |
193 | static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = { |
194 | { |
195 | .adr = 0x000131025D131601ull, |
196 | .num_endpoints = 1, |
197 | .endpoints = &single_endpoint, |
198 | .name_prefix = "rt1316-1" |
199 | } |
200 | }; |
201 | |
202 | static const struct snd_soc_acpi_adr_device rt712_0_single_adr[] = { |
203 | { |
204 | .adr = 0x000030025D071201ull, |
205 | .num_endpoints = ARRAY_SIZE(rt712_endpoints), |
206 | .endpoints = rt712_endpoints, |
207 | .name_prefix = "rt712" |
208 | } |
209 | }; |
210 | |
211 | static const struct snd_soc_acpi_adr_device rt1712_1_single_adr[] = { |
212 | { |
213 | .adr = 0x000130025D171201ull, |
214 | .num_endpoints = 1, |
215 | .endpoints = &single_endpoint, |
216 | .name_prefix = "rt712-dmic" |
217 | } |
218 | }; |
219 | |
220 | static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = { |
221 | { |
222 | .adr = 0x000131025D131601ull, /* unique ID is set for some reason */ |
223 | .num_endpoints = 1, |
224 | .endpoints = &spk_l_endpoint, |
225 | .name_prefix = "rt1316-1" |
226 | } |
227 | }; |
228 | |
229 | static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = { |
230 | { |
231 | .adr = 0x000230025D131601ull, |
232 | .num_endpoints = 1, |
233 | .endpoints = &spk_r_endpoint, |
234 | .name_prefix = "rt1316-2" |
235 | } |
236 | }; |
237 | |
238 | static const struct snd_soc_acpi_adr_device rt714_3_adr[] = { |
239 | { |
240 | .adr = 0x000330025D071401ull, |
241 | .num_endpoints = 1, |
242 | .endpoints = &single_endpoint, |
243 | .name_prefix = "rt714" |
244 | } |
245 | }; |
246 | |
247 | static const struct snd_soc_acpi_link_adr tgl_rvp[] = { |
248 | { |
249 | .mask = BIT(0), |
250 | .num_adr = ARRAY_SIZE(rt711_0_adr), |
251 | .adr_d = rt711_0_adr, |
252 | }, |
253 | { |
254 | .mask = BIT(1), |
255 | .num_adr = ARRAY_SIZE(rt1308_1_dual_adr), |
256 | .adr_d = rt1308_1_dual_adr, |
257 | }, |
258 | {} |
259 | }; |
260 | |
261 | static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = { |
262 | { |
263 | .mask = BIT(0), |
264 | .num_adr = ARRAY_SIZE(rt711_0_adr), |
265 | .adr_d = rt711_0_adr, |
266 | }, |
267 | {} |
268 | }; |
269 | |
270 | static const struct snd_soc_acpi_link_adr tgl_hp[] = { |
271 | { |
272 | .mask = BIT(0), |
273 | .num_adr = ARRAY_SIZE(rt711_0_adr), |
274 | .adr_d = rt711_0_adr, |
275 | }, |
276 | { |
277 | .mask = BIT(1), |
278 | .num_adr = ARRAY_SIZE(rt1308_1_single_adr), |
279 | .adr_d = rt1308_1_single_adr, |
280 | }, |
281 | {} |
282 | }; |
283 | |
284 | static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = { |
285 | { |
286 | .mask = BIT(0), |
287 | .num_adr = ARRAY_SIZE(rt5682_0_adr), |
288 | .adr_d = rt5682_0_adr, |
289 | }, |
290 | { |
291 | .mask = BIT(1), |
292 | .num_adr = ARRAY_SIZE(mx8373_1_adr), |
293 | .adr_d = mx8373_1_adr, |
294 | }, |
295 | {} |
296 | }; |
297 | |
298 | static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = { |
299 | { |
300 | .mask = BIT(0), |
301 | .num_adr = ARRAY_SIZE(rt711_0_adr), |
302 | .adr_d = rt711_0_adr, |
303 | }, |
304 | { |
305 | .mask = BIT(1), |
306 | .num_adr = ARRAY_SIZE(rt1308_1_group1_adr), |
307 | .adr_d = rt1308_1_group1_adr, |
308 | }, |
309 | { |
310 | .mask = BIT(2), |
311 | .num_adr = ARRAY_SIZE(rt1308_2_group1_adr), |
312 | .adr_d = rt1308_2_group1_adr, |
313 | }, |
314 | { |
315 | .mask = BIT(3), |
316 | .num_adr = ARRAY_SIZE(rt715_3_adr), |
317 | .adr_d = rt715_3_adr, |
318 | }, |
319 | {} |
320 | }; |
321 | |
322 | static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = { |
323 | { |
324 | .mask = BIT(0), |
325 | .num_adr = ARRAY_SIZE(rt711_0_adr), |
326 | .adr_d = rt711_0_adr, |
327 | }, |
328 | { |
329 | .mask = BIT(1), |
330 | .num_adr = ARRAY_SIZE(rt1308_1_single_adr), |
331 | .adr_d = rt1308_1_single_adr, |
332 | }, |
333 | { |
334 | .mask = BIT(3), |
335 | .num_adr = ARRAY_SIZE(rt715_3_adr), |
336 | .adr_d = rt715_3_adr, |
337 | }, |
338 | {} |
339 | }; |
340 | |
341 | static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = { |
342 | { |
343 | .mask = BIT(1), |
344 | .num_adr = ARRAY_SIZE(rt711_1_adr), |
345 | .adr_d = rt711_1_adr, |
346 | }, |
347 | { |
348 | .mask = BIT(2), |
349 | .num_adr = ARRAY_SIZE(rt1308_2_single_adr), |
350 | .adr_d = rt1308_2_single_adr, |
351 | }, |
352 | { |
353 | .mask = BIT(0), |
354 | .num_adr = ARRAY_SIZE(rt715_0_adr), |
355 | .adr_d = rt715_0_adr, |
356 | }, |
357 | {} |
358 | }; |
359 | |
360 | static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = { |
361 | { |
362 | .mask = BIT(0), |
363 | .num_adr = ARRAY_SIZE(rt711_sdca_0_adr), |
364 | .adr_d = rt711_sdca_0_adr, |
365 | }, |
366 | { |
367 | .mask = BIT(1), |
368 | .num_adr = ARRAY_SIZE(rt1316_1_group1_adr), |
369 | .adr_d = rt1316_1_group1_adr, |
370 | }, |
371 | { |
372 | .mask = BIT(2), |
373 | .num_adr = ARRAY_SIZE(rt1316_2_group1_adr), |
374 | .adr_d = rt1316_2_group1_adr, |
375 | }, |
376 | { |
377 | .mask = BIT(3), |
378 | .num_adr = ARRAY_SIZE(rt714_3_adr), |
379 | .adr_d = rt714_3_adr, |
380 | }, |
381 | {} |
382 | }; |
383 | |
384 | static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = { |
385 | { |
386 | .mask = BIT(0), |
387 | .num_adr = ARRAY_SIZE(rt711_sdca_0_adr), |
388 | .adr_d = rt711_sdca_0_adr, |
389 | }, |
390 | { |
391 | .mask = BIT(1), |
392 | .num_adr = ARRAY_SIZE(rt1316_1_single_adr), |
393 | .adr_d = rt1316_1_single_adr, |
394 | }, |
395 | { |
396 | .mask = BIT(3), |
397 | .num_adr = ARRAY_SIZE(rt714_3_adr), |
398 | .adr_d = rt714_3_adr, |
399 | }, |
400 | {} |
401 | }; |
402 | |
403 | static const struct snd_soc_acpi_link_adr tgl_712_only[] = { |
404 | { |
405 | .mask = BIT(0), |
406 | .num_adr = ARRAY_SIZE(rt712_0_single_adr), |
407 | .adr_d = rt712_0_single_adr, |
408 | }, |
409 | { |
410 | .mask = BIT(1), |
411 | .num_adr = ARRAY_SIZE(rt1712_1_single_adr), |
412 | .adr_d = rt1712_1_single_adr, |
413 | }, |
414 | {} |
415 | }; |
416 | |
417 | static const struct snd_soc_acpi_adr_device cs42l43_3_adr[] = { |
418 | { |
419 | .adr = 0x00033001FA424301ull, |
420 | .num_endpoints = 1, |
421 | .endpoints = &single_endpoint, |
422 | .name_prefix = "cs42l43" |
423 | } |
424 | }; |
425 | |
426 | static const struct snd_soc_acpi_adr_device cs35l56_0_adr[] = { |
427 | { |
428 | .adr = 0x00003301FA355601ull, |
429 | .num_endpoints = 1, |
430 | .endpoints = &spk_r_endpoint, |
431 | .name_prefix = "AMP1" |
432 | }, |
433 | { |
434 | .adr = 0x00003201FA355601ull, |
435 | .num_endpoints = 1, |
436 | .endpoints = &spk_3_endpoint, |
437 | .name_prefix = "AMP2" |
438 | } |
439 | }; |
440 | |
441 | static const struct snd_soc_acpi_adr_device cs35l56_1_adr[] = { |
442 | { |
443 | .adr = 0x00013701FA355601ull, |
444 | .num_endpoints = 1, |
445 | .endpoints = &spk_l_endpoint, |
446 | .name_prefix = "AMP8" |
447 | }, |
448 | { |
449 | .adr = 0x00013601FA355601ull, |
450 | .num_endpoints = 1, |
451 | .endpoints = &spk_2_endpoint, |
452 | .name_prefix = "AMP7" |
453 | } |
454 | }; |
455 | |
456 | static const struct snd_soc_acpi_link_adr tgl_cs42l43_cs35l56[] = { |
457 | { |
458 | .mask = BIT(3), |
459 | .num_adr = ARRAY_SIZE(cs42l43_3_adr), |
460 | .adr_d = cs42l43_3_adr, |
461 | }, |
462 | { |
463 | .mask = BIT(0), |
464 | .num_adr = ARRAY_SIZE(cs35l56_0_adr), |
465 | .adr_d = cs35l56_0_adr, |
466 | }, |
467 | { |
468 | .mask = BIT(1), |
469 | .num_adr = ARRAY_SIZE(cs35l56_1_adr), |
470 | .adr_d = cs35l56_1_adr, |
471 | }, |
472 | {} |
473 | }; |
474 | |
475 | static const struct snd_soc_acpi_codecs tgl_max98373_amp = { |
476 | .num_codecs = 1, |
477 | .codecs = {"MX98373" } |
478 | }; |
479 | |
480 | static const struct snd_soc_acpi_codecs tgl_rt1011_amp = { |
481 | .num_codecs = 1, |
482 | .codecs = {"10EC1011" } |
483 | }; |
484 | |
485 | static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = { |
486 | .num_codecs = 2, |
487 | .codecs = {"10EC5682" , "RTL5682" }, |
488 | }; |
489 | |
490 | static const struct snd_soc_acpi_codecs tgl_lt6911_hdmi = { |
491 | .num_codecs = 1, |
492 | .codecs = {"INTC10B0" } |
493 | }; |
494 | |
495 | struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = { |
496 | { |
497 | .comp_ids = &tgl_rt5682_rt5682s_hp, |
498 | .drv_name = "tgl_rt5682_def" , |
499 | .machine_quirk = snd_soc_acpi_codec_list, |
500 | .quirk_data = &tgl_codecs, |
501 | .sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg" , |
502 | }, |
503 | { |
504 | .comp_ids = &tgl_rt5682_rt5682s_hp, |
505 | .drv_name = "tgl_rt5682_def" , |
506 | .machine_quirk = snd_soc_acpi_codec_list, |
507 | .quirk_data = &tgl_max98373_amp, |
508 | .sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg" , |
509 | }, |
510 | { |
511 | .comp_ids = &tgl_rt5682_rt5682s_hp, |
512 | .drv_name = "tgl_rt5682_def" , |
513 | .machine_quirk = snd_soc_acpi_codec_list, |
514 | .quirk_data = &tgl_rt1011_amp, |
515 | .sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg" , |
516 | }, |
517 | { |
518 | .comp_ids = &essx_83x6, |
519 | .drv_name = "sof-essx8336" , |
520 | .sof_tplg_filename = "sof-tgl-es8336" , /* the tplg suffix is added at run time */ |
521 | .tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER | |
522 | SND_SOC_ACPI_TPLG_INTEL_SSP_MSB | |
523 | SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER, |
524 | }, |
525 | { |
526 | .id = "10EC1308" , |
527 | .drv_name = "tgl_rt1308_hdmi_ssp" , |
528 | .machine_quirk = snd_soc_acpi_codec_list, |
529 | .quirk_data = &tgl_lt6911_hdmi, |
530 | .sof_tplg_filename = "sof-tgl-rt1308-ssp2-hdmi-ssp15.tplg" |
531 | }, |
532 | {}, |
533 | }; |
534 | EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines); |
535 | |
536 | /* this table is used when there is no I2S codec present */ |
537 | struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = { |
538 | /* mockup tests need to be first */ |
539 | { |
540 | .link_mask = GENMASK(3, 0), |
541 | .links = sdw_mockup_headset_2amps_mic, |
542 | .drv_name = "sof_sdw" , |
543 | .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg" , |
544 | }, |
545 | { |
546 | .link_mask = BIT(0) | BIT(1) | BIT(3), |
547 | .links = sdw_mockup_headset_1amp_mic, |
548 | .drv_name = "sof_sdw" , |
549 | .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg" , |
550 | }, |
551 | { |
552 | .link_mask = BIT(0) | BIT(1) | BIT(2), |
553 | .links = sdw_mockup_mic_headset_1amp, |
554 | .drv_name = "sof_sdw" , |
555 | .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg" , |
556 | }, |
557 | { |
558 | .link_mask = 0xF, /* 4 active links required */ |
559 | .links = tgl_712_only, |
560 | .drv_name = "sof_sdw" , |
561 | .sof_tplg_filename = "sof-tgl-rt712.tplg" , |
562 | }, |
563 | { |
564 | .link_mask = 0x7, |
565 | .links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0, |
566 | .drv_name = "sof_sdw" , |
567 | .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg" , |
568 | }, |
569 | { |
570 | .link_mask = 0xB, |
571 | .links = tgl_cs42l43_cs35l56, |
572 | .drv_name = "sof_sdw" , |
573 | .sof_tplg_filename = "sof-tgl-cs42l43-l3-cs35l56-l01.tplg" , |
574 | }, |
575 | { |
576 | .link_mask = 0xF, /* 4 active links required */ |
577 | .links = tgl_3_in_1_default, |
578 | .drv_name = "sof_sdw" , |
579 | .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg" , |
580 | }, |
581 | { |
582 | /* |
583 | * link_mask should be 0xB, but all links are enabled by BIOS. |
584 | * This entry will be selected if there is no rt1308 exposed |
585 | * on link2 since it will fail to match the above entry. |
586 | */ |
587 | .link_mask = 0xF, |
588 | .links = tgl_3_in_1_mono_amp, |
589 | .drv_name = "sof_sdw" , |
590 | .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg" , |
591 | }, |
592 | { |
593 | .link_mask = 0xF, /* 4 active links required */ |
594 | .links = tgl_3_in_1_sdca, |
595 | .drv_name = "sof_sdw" , |
596 | .sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg" , |
597 | }, |
598 | { |
599 | /* |
600 | * link_mask should be 0xB, but all links are enabled by BIOS. |
601 | * This entry will be selected if there is no rt1316 amplifier exposed |
602 | * on link2 since it will fail to match the above entry. |
603 | */ |
604 | |
605 | .link_mask = 0xF, /* 4 active links required */ |
606 | .links = tgl_3_in_1_sdca_mono, |
607 | .drv_name = "sof_sdw" , |
608 | .sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg" , |
609 | }, |
610 | |
611 | { |
612 | .link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */ |
613 | .links = tgl_hp, |
614 | .drv_name = "sof_sdw" , |
615 | .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg" , |
616 | }, |
617 | { |
618 | .link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */ |
619 | .links = tgl_rvp, |
620 | .drv_name = "sof_sdw" , |
621 | .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg" , |
622 | }, |
623 | { |
624 | .link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */ |
625 | .links = tgl_chromebook_base, |
626 | .drv_name = "sof_sdw" , |
627 | .sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg" , |
628 | }, |
629 | { |
630 | .link_mask = 0x1, /* rt711 on link 0 */ |
631 | .links = tgl_rvp_headset_only, |
632 | .drv_name = "sof_sdw" , |
633 | .sof_tplg_filename = "sof-tgl-rt711.tplg" , |
634 | }, |
635 | {}, |
636 | }; |
637 | EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines); |
638 | |