1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * ASoC PXA SSP port support |
4 | */ |
5 | |
6 | #ifndef _PXA_SSP_H |
7 | #define _PXA_SSP_H |
8 | |
9 | /* SSP clock sources */ |
10 | #define PXA_SSP_CLK_PLL 0 |
11 | #define PXA_SSP_CLK_EXT 1 |
12 | #define PXA_SSP_CLK_NET 2 |
13 | #define PXA_SSP_CLK_AUDIO 3 |
14 | #define PXA_SSP_CLK_NET_PLL 4 |
15 | |
16 | /* SSP audio dividers */ |
17 | #define PXA_SSP_AUDIO_DIV_ACDS 0 |
18 | #define PXA_SSP_AUDIO_DIV_SCDB 1 |
19 | #define PXA_SSP_DIV_SCR 2 |
20 | |
21 | /* SSP ACDS audio dividers values */ |
22 | #define PXA_SSP_CLK_AUDIO_DIV_1 0 |
23 | #define PXA_SSP_CLK_AUDIO_DIV_2 1 |
24 | #define PXA_SSP_CLK_AUDIO_DIV_4 2 |
25 | #define PXA_SSP_CLK_AUDIO_DIV_8 3 |
26 | #define PXA_SSP_CLK_AUDIO_DIV_16 4 |
27 | #define PXA_SSP_CLK_AUDIO_DIV_32 5 |
28 | |
29 | /* SSP divider bypass */ |
30 | #define PXA_SSP_CLK_SCDB_4 0 |
31 | #define PXA_SSP_CLK_SCDB_1 1 |
32 | #define PXA_SSP_CLK_SCDB_8 2 |
33 | |
34 | #define PXA_SSP_PLL_OUT 0 |
35 | |
36 | #endif |
37 | |