1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | #ifndef NDTEST_H |
3 | #define NDTEST_H |
4 | |
5 | #include <linux/platform_device.h> |
6 | #include <linux/libnvdimm.h> |
7 | |
8 | /* SCM device is unable to persist memory contents */ |
9 | #define PAPR_PMEM_UNARMED (1ULL << (63 - 0)) |
10 | /* SCM device failed to persist memory contents */ |
11 | #define PAPR_PMEM_SHUTDOWN_DIRTY (1ULL << (63 - 1)) |
12 | /* SCM device contents are not persisted from previous IPL */ |
13 | #define PAPR_PMEM_EMPTY (1ULL << (63 - 3)) |
14 | #define PAPR_PMEM_HEALTH_CRITICAL (1ULL << (63 - 4)) |
15 | /* SCM device will be garded off next IPL due to failure */ |
16 | #define PAPR_PMEM_HEALTH_FATAL (1ULL << (63 - 5)) |
17 | /* SCM contents cannot persist due to current platform health status */ |
18 | #define PAPR_PMEM_HEALTH_UNHEALTHY (1ULL << (63 - 6)) |
19 | |
20 | /* Bits status indicators for health bitmap indicating unarmed dimm */ |
21 | #define PAPR_PMEM_UNARMED_MASK (PAPR_PMEM_UNARMED | \ |
22 | PAPR_PMEM_HEALTH_UNHEALTHY) |
23 | |
24 | #define PAPR_PMEM_SAVE_FAILED (1ULL << (63 - 10)) |
25 | |
26 | /* Bits status indicators for health bitmap indicating unflushed dimm */ |
27 | #define PAPR_PMEM_BAD_SHUTDOWN_MASK (PAPR_PMEM_SHUTDOWN_DIRTY) |
28 | |
29 | /* Bits status indicators for health bitmap indicating unrestored dimm */ |
30 | #define PAPR_PMEM_BAD_RESTORE_MASK (PAPR_PMEM_EMPTY) |
31 | |
32 | /* Bit status indicators for smart event notification */ |
33 | #define PAPR_PMEM_SMART_EVENT_MASK (PAPR_PMEM_HEALTH_CRITICAL | \ |
34 | PAPR_PMEM_HEALTH_FATAL | \ |
35 | PAPR_PMEM_HEALTH_UNHEALTHY) |
36 | |
37 | #define PAPR_PMEM_SAVE_MASK (PAPR_PMEM_SAVE_FAILED) |
38 | |
39 | struct ndtest_config; |
40 | |
41 | struct ndtest_priv { |
42 | struct platform_device pdev; |
43 | struct device_node *dn; |
44 | struct list_head resources; |
45 | struct nvdimm_bus_descriptor bus_desc; |
46 | struct nvdimm_bus *bus; |
47 | struct ndtest_config *config; |
48 | |
49 | dma_addr_t *dcr_dma; |
50 | dma_addr_t *label_dma; |
51 | dma_addr_t *dimm_dma; |
52 | }; |
53 | |
54 | struct ndtest_blk_mmio { |
55 | void __iomem *base; |
56 | u64 size; |
57 | u64 base_offset; |
58 | u32 line_size; |
59 | u32 num_lines; |
60 | u32 table_size; |
61 | }; |
62 | |
63 | struct ndtest_dimm { |
64 | struct device *dev; |
65 | struct nvdimm *nvdimm; |
66 | struct ndtest_blk_mmio *mmio; |
67 | struct nd_region *blk_region; |
68 | |
69 | dma_addr_t address; |
70 | unsigned long long flags; |
71 | unsigned long config_size; |
72 | void *label_area; |
73 | char *uuid_str; |
74 | |
75 | unsigned int size; |
76 | unsigned int handle; |
77 | unsigned int fail_cmd; |
78 | unsigned int physical_id; |
79 | unsigned int num_formats; |
80 | int id; |
81 | int fail_cmd_code; |
82 | u8 no_alias; |
83 | }; |
84 | |
85 | struct ndtest_mapping { |
86 | u64 start; |
87 | u64 size; |
88 | u8 position; |
89 | u8 dimm; |
90 | }; |
91 | |
92 | struct ndtest_region { |
93 | struct nd_region *region; |
94 | struct ndtest_mapping *mapping; |
95 | u64 size; |
96 | u8 type; |
97 | u8 num_mappings; |
98 | u8 range_index; |
99 | }; |
100 | |
101 | struct ndtest_config { |
102 | struct ndtest_dimm *dimms; |
103 | struct ndtest_region *regions; |
104 | unsigned int dimm_count; |
105 | unsigned int dimm_start; |
106 | u8 num_regions; |
107 | }; |
108 | |
109 | #endif /* NDTEST_H */ |
110 | |