1 | //===--- BuiltinsX86.def - X86 Builtin function database --------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines the X86-specific builtin function database. Users of |
10 | // this file must define the BUILTIN macro to make use of this information. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | // The format of this database matches clang/Basic/Builtins.def. |
15 | |
16 | // FIXME: Ideally we would be able to pull this information from what |
17 | // LLVM already knows about X86 builtins. We need to match the LLVM |
18 | // definition anyway, since code generation will lower to the |
19 | // intrinsic if one exists. |
20 | |
21 | #if defined(BUILTIN) && !defined(TARGET_BUILTIN) |
22 | # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) |
23 | #endif |
24 | |
25 | #if defined(BUILTIN) && !defined(TARGET_HEADER_BUILTIN) |
26 | # define (ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) |
27 | #endif |
28 | |
29 | // Undefined Values |
30 | // |
31 | TARGET_BUILTIN(__builtin_ia32_undef128, "V2d" , "ncV:128:" , "" ) |
32 | TARGET_BUILTIN(__builtin_ia32_undef256, "V4d" , "ncV:256:" , "" ) |
33 | TARGET_BUILTIN(__builtin_ia32_undef512, "V8d" , "ncV:512:" , "" ) |
34 | |
35 | // FLAGS |
36 | // |
37 | TARGET_BUILTIN(__builtin_ia32_readeflags_u32, "Ui" , "n" , "" ) |
38 | TARGET_BUILTIN(__builtin_ia32_writeeflags_u32, "vUi" , "n" , "" ) |
39 | |
40 | // 3DNow! |
41 | // |
42 | TARGET_BUILTIN(__builtin_ia32_femms, "v" , "n" , "3dnow" ) |
43 | TARGET_BUILTIN(__builtin_ia32_pavgusb, "V8cV8cV8c" , "ncV:64:" , "3dnow" ) |
44 | TARGET_BUILTIN(__builtin_ia32_pf2id, "V2iV2f" , "ncV:64:" , "3dnow" ) |
45 | TARGET_BUILTIN(__builtin_ia32_pfacc, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
46 | TARGET_BUILTIN(__builtin_ia32_pfadd, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
47 | TARGET_BUILTIN(__builtin_ia32_pfcmpeq, "V2iV2fV2f" , "ncV:64:" , "3dnow" ) |
48 | TARGET_BUILTIN(__builtin_ia32_pfcmpge, "V2iV2fV2f" , "ncV:64:" , "3dnow" ) |
49 | TARGET_BUILTIN(__builtin_ia32_pfcmpgt, "V2iV2fV2f" , "ncV:64:" , "3dnow" ) |
50 | TARGET_BUILTIN(__builtin_ia32_pfmax, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
51 | TARGET_BUILTIN(__builtin_ia32_pfmin, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
52 | TARGET_BUILTIN(__builtin_ia32_pfmul, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
53 | TARGET_BUILTIN(__builtin_ia32_pfrcp, "V2fV2f" , "ncV:64:" , "3dnow" ) |
54 | TARGET_BUILTIN(__builtin_ia32_pfrcpit1, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
55 | TARGET_BUILTIN(__builtin_ia32_pfrcpit2, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
56 | TARGET_BUILTIN(__builtin_ia32_pfrsqrt, "V2fV2f" , "ncV:64:" , "3dnow" ) |
57 | TARGET_BUILTIN(__builtin_ia32_pfrsqit1, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
58 | TARGET_BUILTIN(__builtin_ia32_pfsub, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
59 | TARGET_BUILTIN(__builtin_ia32_pfsubr, "V2fV2fV2f" , "ncV:64:" , "3dnow" ) |
60 | TARGET_BUILTIN(__builtin_ia32_pi2fd, "V2fV2i" , "ncV:64:" , "3dnow" ) |
61 | TARGET_BUILTIN(__builtin_ia32_pmulhrw, "V4sV4sV4s" , "ncV:64:" , "3dnow" ) |
62 | // 3DNow! Extensions (3dnowa). |
63 | TARGET_BUILTIN(__builtin_ia32_pf2iw, "V2iV2f" , "ncV:64:" , "3dnowa" ) |
64 | TARGET_BUILTIN(__builtin_ia32_pfnacc, "V2fV2fV2f" , "ncV:64:" , "3dnowa" ) |
65 | TARGET_BUILTIN(__builtin_ia32_pfpnacc, "V2fV2fV2f" , "ncV:64:" , "3dnowa" ) |
66 | TARGET_BUILTIN(__builtin_ia32_pi2fw, "V2fV2i" , "ncV:64:" , "3dnowa" ) |
67 | TARGET_BUILTIN(__builtin_ia32_pswapdsf, "V2fV2f" , "ncV:64:" , "3dnowa" ) |
68 | TARGET_BUILTIN(__builtin_ia32_pswapdsi, "V2iV2i" , "ncV:64:" , "3dnowa" ) |
69 | |
70 | // MMX |
71 | // |
72 | // All MMX instructions will be generated via builtins. Any MMX vector |
73 | // types (<1 x i64>, <2 x i32>, etc.) that aren't used by these builtins will be |
74 | // expanded by the back-end. |
75 | // FIXME: _mm_prefetch must be a built-in because it takes a compile-time constant |
76 | // argument and our prior approach of using a #define to the current built-in |
77 | // doesn't work in the presence of re-declaration of _mm_prefetch for windows. |
78 | TARGET_BUILTIN(_mm_prefetch, "vcC*i" , "nc" , "mmx" ) |
79 | TARGET_BUILTIN(__builtin_ia32_emms, "v" , "n" , "mmx" ) |
80 | TARGET_BUILTIN(__builtin_ia32_paddb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
81 | TARGET_BUILTIN(__builtin_ia32_paddw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
82 | TARGET_BUILTIN(__builtin_ia32_paddd, "V2iV2iV2i" , "ncV:64:" , "mmx" ) |
83 | TARGET_BUILTIN(__builtin_ia32_paddsb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
84 | TARGET_BUILTIN(__builtin_ia32_paddsw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
85 | TARGET_BUILTIN(__builtin_ia32_paddusb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
86 | TARGET_BUILTIN(__builtin_ia32_paddusw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
87 | TARGET_BUILTIN(__builtin_ia32_psubb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
88 | TARGET_BUILTIN(__builtin_ia32_psubw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
89 | TARGET_BUILTIN(__builtin_ia32_psubd, "V2iV2iV2i" , "ncV:64:" , "mmx" ) |
90 | TARGET_BUILTIN(__builtin_ia32_psubsb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
91 | TARGET_BUILTIN(__builtin_ia32_psubsw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
92 | TARGET_BUILTIN(__builtin_ia32_psubusb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
93 | TARGET_BUILTIN(__builtin_ia32_psubusw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
94 | TARGET_BUILTIN(__builtin_ia32_pmulhw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
95 | TARGET_BUILTIN(__builtin_ia32_pmullw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
96 | TARGET_BUILTIN(__builtin_ia32_pmaddwd, "V2iV4sV4s" , "ncV:64:" , "mmx" ) |
97 | TARGET_BUILTIN(__builtin_ia32_pand, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx" ) |
98 | TARGET_BUILTIN(__builtin_ia32_pandn, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx" ) |
99 | TARGET_BUILTIN(__builtin_ia32_por, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx" ) |
100 | TARGET_BUILTIN(__builtin_ia32_pxor, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx" ) |
101 | TARGET_BUILTIN(__builtin_ia32_psllw, "V4sV4sV1Oi" , "ncV:64:" , "mmx" ) |
102 | TARGET_BUILTIN(__builtin_ia32_pslld, "V2iV2iV1Oi" , "ncV:64:" , "mmx" ) |
103 | TARGET_BUILTIN(__builtin_ia32_psllq, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx" ) |
104 | TARGET_BUILTIN(__builtin_ia32_psrlw, "V4sV4sV1Oi" , "ncV:64:" , "mmx" ) |
105 | TARGET_BUILTIN(__builtin_ia32_psrld, "V2iV2iV1Oi" , "ncV:64:" , "mmx" ) |
106 | TARGET_BUILTIN(__builtin_ia32_psrlq, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx" ) |
107 | TARGET_BUILTIN(__builtin_ia32_psraw, "V4sV4sV1Oi" , "ncV:64:" , "mmx" ) |
108 | TARGET_BUILTIN(__builtin_ia32_psrad, "V2iV2iV1Oi" , "ncV:64:" , "mmx" ) |
109 | TARGET_BUILTIN(__builtin_ia32_psllwi, "V4sV4si" , "ncV:64:" , "mmx" ) |
110 | TARGET_BUILTIN(__builtin_ia32_pslldi, "V2iV2ii" , "ncV:64:" , "mmx" ) |
111 | TARGET_BUILTIN(__builtin_ia32_psllqi, "V1OiV1Oii" , "ncV:64:" , "mmx" ) |
112 | TARGET_BUILTIN(__builtin_ia32_psrlwi, "V4sV4si" , "ncV:64:" , "mmx" ) |
113 | TARGET_BUILTIN(__builtin_ia32_psrldi, "V2iV2ii" , "ncV:64:" , "mmx" ) |
114 | TARGET_BUILTIN(__builtin_ia32_psrlqi, "V1OiV1Oii" , "ncV:64:" , "mmx" ) |
115 | TARGET_BUILTIN(__builtin_ia32_psrawi, "V4sV4si" , "ncV:64:" , "mmx" ) |
116 | TARGET_BUILTIN(__builtin_ia32_psradi, "V2iV2ii" , "ncV:64:" , "mmx" ) |
117 | TARGET_BUILTIN(__builtin_ia32_packsswb, "V8cV4sV4s" , "ncV:64:" , "mmx" ) |
118 | TARGET_BUILTIN(__builtin_ia32_packssdw, "V4sV2iV2i" , "ncV:64:" , "mmx" ) |
119 | TARGET_BUILTIN(__builtin_ia32_packuswb, "V8cV4sV4s" , "ncV:64:" , "mmx" ) |
120 | TARGET_BUILTIN(__builtin_ia32_punpckhbw, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
121 | TARGET_BUILTIN(__builtin_ia32_punpckhwd, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
122 | TARGET_BUILTIN(__builtin_ia32_punpckhdq, "V2iV2iV2i" , "ncV:64:" , "mmx" ) |
123 | TARGET_BUILTIN(__builtin_ia32_punpcklbw, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
124 | TARGET_BUILTIN(__builtin_ia32_punpcklwd, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
125 | TARGET_BUILTIN(__builtin_ia32_punpckldq, "V2iV2iV2i" , "ncV:64:" , "mmx" ) |
126 | TARGET_BUILTIN(__builtin_ia32_pcmpeqb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
127 | TARGET_BUILTIN(__builtin_ia32_pcmpeqw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
128 | TARGET_BUILTIN(__builtin_ia32_pcmpeqd, "V2iV2iV2i" , "ncV:64:" , "mmx" ) |
129 | TARGET_BUILTIN(__builtin_ia32_pcmpgtb, "V8cV8cV8c" , "ncV:64:" , "mmx" ) |
130 | TARGET_BUILTIN(__builtin_ia32_pcmpgtw, "V4sV4sV4s" , "ncV:64:" , "mmx" ) |
131 | TARGET_BUILTIN(__builtin_ia32_pcmpgtd, "V2iV2iV2i" , "ncV:64:" , "mmx" ) |
132 | TARGET_BUILTIN(__builtin_ia32_maskmovq, "vV8cV8cc*" , "nV:64:" , "mmx" ) |
133 | TARGET_BUILTIN(__builtin_ia32_movntq, "vV1Oi*V1Oi" , "nV:64:" , "mmx" ) |
134 | TARGET_BUILTIN(__builtin_ia32_vec_init_v2si, "V2iii" , "ncV:64:" , "mmx" ) |
135 | TARGET_BUILTIN(__builtin_ia32_vec_init_v4hi, "V4sssss" , "ncV:64:" , "mmx" ) |
136 | TARGET_BUILTIN(__builtin_ia32_vec_init_v8qi, "V8ccccccccc" , "ncV:64:" , "mmx" ) |
137 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v2si, "iV2ii" , "ncV:64:" , "mmx" ) |
138 | |
139 | // MMX2 (MMX+SSE) intrinsics |
140 | TARGET_BUILTIN(__builtin_ia32_cvtpi2ps, "V4fV4fV2i" , "ncV:64:" , "mmx,sse" ) |
141 | TARGET_BUILTIN(__builtin_ia32_cvtps2pi, "V2iV4f" , "ncV:64:" , "mmx,sse" ) |
142 | TARGET_BUILTIN(__builtin_ia32_cvttps2pi, "V2iV4f" , "ncV:64:" , "mmx,sse" ) |
143 | TARGET_BUILTIN(__builtin_ia32_pavgb, "V8cV8cV8c" , "ncV:64:" , "mmx,sse" ) |
144 | TARGET_BUILTIN(__builtin_ia32_pavgw, "V4sV4sV4s" , "ncV:64:" , "mmx,sse" ) |
145 | TARGET_BUILTIN(__builtin_ia32_pmaxsw, "V4sV4sV4s" , "ncV:64:" , "mmx,sse" ) |
146 | TARGET_BUILTIN(__builtin_ia32_pmaxub, "V8cV8cV8c" , "ncV:64:" , "mmx,sse" ) |
147 | TARGET_BUILTIN(__builtin_ia32_pminsw, "V4sV4sV4s" , "ncV:64:" , "mmx,sse" ) |
148 | TARGET_BUILTIN(__builtin_ia32_pminub, "V8cV8cV8c" , "ncV:64:" , "mmx,sse" ) |
149 | TARGET_BUILTIN(__builtin_ia32_pmovmskb, "iV8c" , "ncV:64:" , "mmx,sse" ) |
150 | TARGET_BUILTIN(__builtin_ia32_pmulhuw, "V4sV4sV4s" , "ncV:64:" , "mmx,sse" ) |
151 | TARGET_BUILTIN(__builtin_ia32_psadbw, "V4sV8cV8c" , "ncV:64:" , "mmx,sse" ) |
152 | TARGET_BUILTIN(__builtin_ia32_pshufw, "V4sV4sIc" , "ncV:64:" , "mmx,sse" ) |
153 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v4hi, "iV4sIi" , "ncV:64:" , "mmx,sse" ) |
154 | TARGET_BUILTIN(__builtin_ia32_vec_set_v4hi, "V4sV4siIi" , "ncV:64:" , "mmx,sse" ) |
155 | |
156 | // MMX+SSE2 |
157 | TARGET_BUILTIN(__builtin_ia32_cvtpd2pi, "V2iV2d" , "ncV:64:" , "mmx,sse2" ) |
158 | TARGET_BUILTIN(__builtin_ia32_cvtpi2pd, "V2dV2i" , "ncV:64:" , "mmx,sse2" ) |
159 | TARGET_BUILTIN(__builtin_ia32_cvttpd2pi, "V2iV2d" , "ncV:64:" , "mmx,sse2" ) |
160 | TARGET_BUILTIN(__builtin_ia32_paddq, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx,sse2" ) |
161 | TARGET_BUILTIN(__builtin_ia32_pmuludq, "V1OiV2iV2i" , "ncV:64:" , "mmx,sse2" ) |
162 | TARGET_BUILTIN(__builtin_ia32_psubq, "V1OiV1OiV1Oi" , "ncV:64:" , "mmx,sse2" ) |
163 | |
164 | // MMX+SSSE3 |
165 | TARGET_BUILTIN(__builtin_ia32_pabsb, "V8cV8c" , "ncV:64:" , "mmx,ssse3" ) |
166 | TARGET_BUILTIN(__builtin_ia32_pabsd, "V2iV2i" , "ncV:64:" , "mmx,ssse3" ) |
167 | TARGET_BUILTIN(__builtin_ia32_pabsw, "V4sV4s" , "ncV:64:" , "mmx,ssse3" ) |
168 | TARGET_BUILTIN(__builtin_ia32_palignr, "V8cV8cV8cIc" , "ncV:64:" , "mmx,ssse3" ) |
169 | TARGET_BUILTIN(__builtin_ia32_phaddd, "V2iV2iV2i" , "ncV:64:" , "mmx,ssse3" ) |
170 | TARGET_BUILTIN(__builtin_ia32_phaddsw, "V4sV4sV4s" , "ncV:64:" , "mmx,ssse3" ) |
171 | TARGET_BUILTIN(__builtin_ia32_phaddw, "V4sV4sV4s" , "ncV:64:" , "mmx,ssse3" ) |
172 | TARGET_BUILTIN(__builtin_ia32_phsubd, "V2iV2iV2i" , "ncV:64:" , "mmx,ssse3" ) |
173 | TARGET_BUILTIN(__builtin_ia32_phsubsw, "V4sV4sV4s" , "ncV:64:" , "mmx,ssse3" ) |
174 | TARGET_BUILTIN(__builtin_ia32_phsubw, "V4sV4sV4s" , "ncV:64:" , "mmx,ssse3" ) |
175 | TARGET_BUILTIN(__builtin_ia32_pmaddubsw, "V8cV8cV8c" , "ncV:64:" , "mmx,ssse3" ) |
176 | TARGET_BUILTIN(__builtin_ia32_pmulhrsw, "V4sV4sV4s" , "ncV:64:" , "mmx,ssse3" ) |
177 | TARGET_BUILTIN(__builtin_ia32_pshufb, "V8cV8cV8c" , "ncV:64:" , "mmx,ssse3" ) |
178 | TARGET_BUILTIN(__builtin_ia32_psignw, "V4sV4sV4s" , "ncV:64:" , "mmx,ssse3" ) |
179 | TARGET_BUILTIN(__builtin_ia32_psignb, "V8cV8cV8c" , "ncV:64:" , "mmx,ssse3" ) |
180 | TARGET_BUILTIN(__builtin_ia32_psignd, "V2iV2iV2i" , "ncV:64:" , "mmx,ssse3" ) |
181 | |
182 | // SSE intrinsics. |
183 | TARGET_BUILTIN(__builtin_ia32_comieq, "iV4fV4f" , "ncV:128:" , "sse" ) |
184 | TARGET_BUILTIN(__builtin_ia32_comilt, "iV4fV4f" , "ncV:128:" , "sse" ) |
185 | TARGET_BUILTIN(__builtin_ia32_comile, "iV4fV4f" , "ncV:128:" , "sse" ) |
186 | TARGET_BUILTIN(__builtin_ia32_comigt, "iV4fV4f" , "ncV:128:" , "sse" ) |
187 | TARGET_BUILTIN(__builtin_ia32_comige, "iV4fV4f" , "ncV:128:" , "sse" ) |
188 | TARGET_BUILTIN(__builtin_ia32_comineq, "iV4fV4f" , "ncV:128:" , "sse" ) |
189 | TARGET_BUILTIN(__builtin_ia32_ucomieq, "iV4fV4f" , "ncV:128:" , "sse" ) |
190 | TARGET_BUILTIN(__builtin_ia32_ucomilt, "iV4fV4f" , "ncV:128:" , "sse" ) |
191 | TARGET_BUILTIN(__builtin_ia32_ucomile, "iV4fV4f" , "ncV:128:" , "sse" ) |
192 | TARGET_BUILTIN(__builtin_ia32_ucomigt, "iV4fV4f" , "ncV:128:" , "sse" ) |
193 | TARGET_BUILTIN(__builtin_ia32_ucomige, "iV4fV4f" , "ncV:128:" , "sse" ) |
194 | TARGET_BUILTIN(__builtin_ia32_ucomineq, "iV4fV4f" , "ncV:128:" , "sse" ) |
195 | |
196 | TARGET_BUILTIN(__builtin_ia32_comisdeq, "iV2dV2d" , "ncV:128:" , "sse2" ) |
197 | TARGET_BUILTIN(__builtin_ia32_comisdlt, "iV2dV2d" , "ncV:128:" , "sse2" ) |
198 | TARGET_BUILTIN(__builtin_ia32_comisdle, "iV2dV2d" , "ncV:128:" , "sse2" ) |
199 | TARGET_BUILTIN(__builtin_ia32_comisdgt, "iV2dV2d" , "ncV:128:" , "sse2" ) |
200 | TARGET_BUILTIN(__builtin_ia32_comisdge, "iV2dV2d" , "ncV:128:" , "sse2" ) |
201 | TARGET_BUILTIN(__builtin_ia32_comisdneq, "iV2dV2d" , "ncV:128:" , "sse2" ) |
202 | TARGET_BUILTIN(__builtin_ia32_ucomisdeq, "iV2dV2d" , "ncV:128:" , "sse2" ) |
203 | TARGET_BUILTIN(__builtin_ia32_ucomisdlt, "iV2dV2d" , "ncV:128:" , "sse2" ) |
204 | TARGET_BUILTIN(__builtin_ia32_ucomisdle, "iV2dV2d" , "ncV:128:" , "sse2" ) |
205 | TARGET_BUILTIN(__builtin_ia32_ucomisdgt, "iV2dV2d" , "ncV:128:" , "sse2" ) |
206 | TARGET_BUILTIN(__builtin_ia32_ucomisdge, "iV2dV2d" , "ncV:128:" , "sse2" ) |
207 | TARGET_BUILTIN(__builtin_ia32_ucomisdneq, "iV2dV2d" , "ncV:128:" , "sse2" ) |
208 | |
209 | TARGET_BUILTIN(__builtin_ia32_cmpeqps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
210 | TARGET_BUILTIN(__builtin_ia32_cmpltps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
211 | TARGET_BUILTIN(__builtin_ia32_cmpleps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
212 | TARGET_BUILTIN(__builtin_ia32_cmpunordps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
213 | TARGET_BUILTIN(__builtin_ia32_cmpneqps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
214 | TARGET_BUILTIN(__builtin_ia32_cmpnltps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
215 | TARGET_BUILTIN(__builtin_ia32_cmpnleps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
216 | TARGET_BUILTIN(__builtin_ia32_cmpordps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
217 | TARGET_BUILTIN(__builtin_ia32_cmpeqss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
218 | TARGET_BUILTIN(__builtin_ia32_cmpltss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
219 | TARGET_BUILTIN(__builtin_ia32_cmpless, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
220 | TARGET_BUILTIN(__builtin_ia32_cmpunordss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
221 | TARGET_BUILTIN(__builtin_ia32_cmpneqss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
222 | TARGET_BUILTIN(__builtin_ia32_cmpnltss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
223 | TARGET_BUILTIN(__builtin_ia32_cmpnless, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
224 | TARGET_BUILTIN(__builtin_ia32_cmpordss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
225 | TARGET_BUILTIN(__builtin_ia32_minps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
226 | TARGET_BUILTIN(__builtin_ia32_maxps, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
227 | TARGET_BUILTIN(__builtin_ia32_minss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
228 | TARGET_BUILTIN(__builtin_ia32_maxss, "V4fV4fV4f" , "ncV:128:" , "sse" ) |
229 | |
230 | TARGET_BUILTIN(__builtin_ia32_cmpeqpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
231 | TARGET_BUILTIN(__builtin_ia32_cmpltpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
232 | TARGET_BUILTIN(__builtin_ia32_cmplepd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
233 | TARGET_BUILTIN(__builtin_ia32_cmpunordpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
234 | TARGET_BUILTIN(__builtin_ia32_cmpneqpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
235 | TARGET_BUILTIN(__builtin_ia32_cmpnltpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
236 | TARGET_BUILTIN(__builtin_ia32_cmpnlepd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
237 | TARGET_BUILTIN(__builtin_ia32_cmpordpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
238 | TARGET_BUILTIN(__builtin_ia32_cmpeqsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
239 | TARGET_BUILTIN(__builtin_ia32_cmpltsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
240 | TARGET_BUILTIN(__builtin_ia32_cmplesd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
241 | TARGET_BUILTIN(__builtin_ia32_cmpunordsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
242 | TARGET_BUILTIN(__builtin_ia32_cmpneqsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
243 | TARGET_BUILTIN(__builtin_ia32_cmpnltsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
244 | TARGET_BUILTIN(__builtin_ia32_cmpnlesd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
245 | TARGET_BUILTIN(__builtin_ia32_cmpordsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
246 | TARGET_BUILTIN(__builtin_ia32_minpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
247 | TARGET_BUILTIN(__builtin_ia32_maxpd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
248 | TARGET_BUILTIN(__builtin_ia32_minsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
249 | TARGET_BUILTIN(__builtin_ia32_maxsd, "V2dV2dV2d" , "ncV:128:" , "sse2" ) |
250 | TARGET_BUILTIN(__builtin_ia32_pmulhw128, "V8sV8sV8s" , "ncV:128:" , "sse2" ) |
251 | TARGET_BUILTIN(__builtin_ia32_pavgb128, "V16cV16cV16c" , "ncV:128:" , "sse2" ) |
252 | TARGET_BUILTIN(__builtin_ia32_pavgw128, "V8sV8sV8s" , "ncV:128:" , "sse2" ) |
253 | TARGET_BUILTIN(__builtin_ia32_packsswb128, "V16cV8sV8s" , "ncV:128:" , "sse2" ) |
254 | TARGET_BUILTIN(__builtin_ia32_packssdw128, "V8sV4iV4i" , "ncV:128:" , "sse2" ) |
255 | TARGET_BUILTIN(__builtin_ia32_packuswb128, "V16cV8sV8s" , "ncV:128:" , "sse2" ) |
256 | TARGET_BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s" , "ncV:128:" , "sse2" ) |
257 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi" , "ncV:128:" , "sse2" ) |
258 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v4si, "iV4iIi" , "ncV:128:" , "sse2" ) |
259 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v4sf, "fV4fIi" , "ncV:128:" , "sse2" ) |
260 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v8hi, "sV8sIi" , "ncV:128:" , "sse2" ) |
261 | TARGET_BUILTIN(__builtin_ia32_vec_set_v8hi, "V8sV8ssIi" , "ncV:128:" , "sse2" ) |
262 | |
263 | TARGET_BUILTIN(__builtin_ia32_addsubps, "V4fV4fV4f" , "ncV:128:" , "sse3" ) |
264 | TARGET_BUILTIN(__builtin_ia32_addsubpd, "V2dV2dV2d" , "ncV:128:" , "sse3" ) |
265 | TARGET_BUILTIN(__builtin_ia32_haddps, "V4fV4fV4f" , "ncV:128:" , "sse3" ) |
266 | TARGET_BUILTIN(__builtin_ia32_haddpd, "V2dV2dV2d" , "ncV:128:" , "sse3" ) |
267 | TARGET_BUILTIN(__builtin_ia32_hsubps, "V4fV4fV4f" , "ncV:128:" , "sse3" ) |
268 | TARGET_BUILTIN(__builtin_ia32_hsubpd, "V2dV2dV2d" , "ncV:128:" , "sse3" ) |
269 | TARGET_BUILTIN(__builtin_ia32_phaddw128, "V8sV8sV8s" , "ncV:128:" , "ssse3" ) |
270 | TARGET_BUILTIN(__builtin_ia32_phaddd128, "V4iV4iV4i" , "ncV:128:" , "ssse3" ) |
271 | TARGET_BUILTIN(__builtin_ia32_phaddsw128, "V8sV8sV8s" , "ncV:128:" , "ssse3" ) |
272 | TARGET_BUILTIN(__builtin_ia32_phsubw128, "V8sV8sV8s" , "ncV:128:" , "ssse3" ) |
273 | TARGET_BUILTIN(__builtin_ia32_phsubd128, "V4iV4iV4i" , "ncV:128:" , "ssse3" ) |
274 | TARGET_BUILTIN(__builtin_ia32_phsubsw128, "V8sV8sV8s" , "ncV:128:" , "ssse3" ) |
275 | TARGET_BUILTIN(__builtin_ia32_pmaddubsw128, "V8sV16cV16c" , "ncV:128:" , "ssse3" ) |
276 | TARGET_BUILTIN(__builtin_ia32_pmulhrsw128, "V8sV8sV8s" , "ncV:128:" , "ssse3" ) |
277 | TARGET_BUILTIN(__builtin_ia32_pshufb128, "V16cV16cV16c" , "ncV:128:" , "ssse3" ) |
278 | TARGET_BUILTIN(__builtin_ia32_psignb128, "V16cV16cV16c" , "ncV:128:" , "ssse3" ) |
279 | TARGET_BUILTIN(__builtin_ia32_psignw128, "V8sV8sV8s" , "ncV:128:" , "ssse3" ) |
280 | TARGET_BUILTIN(__builtin_ia32_psignd128, "V4iV4iV4i" , "ncV:128:" , "ssse3" ) |
281 | |
282 | TARGET_BUILTIN(__builtin_ia32_ldmxcsr, "vUi" , "n" , "sse" ) |
283 | TARGET_HEADER_BUILTIN(_mm_setcsr, "vUi" , "nh" ,XMMINTRIN_H, ALL_LANGUAGES, "sse" ) |
284 | TARGET_BUILTIN(__builtin_ia32_stmxcsr, "Ui" , "n" , "sse" ) |
285 | TARGET_HEADER_BUILTIN(_mm_getcsr, "Ui" , "nh" , XMMINTRIN_H, ALL_LANGUAGES, "sse" ) |
286 | TARGET_BUILTIN(__builtin_ia32_cvtss2si, "iV4f" , "ncV:128:" , "sse" ) |
287 | TARGET_BUILTIN(__builtin_ia32_cvttss2si, "iV4f" , "ncV:128:" , "sse" ) |
288 | TARGET_BUILTIN(__builtin_ia32_movmskps, "iV4f" , "nV:128:" , "sse" ) |
289 | TARGET_BUILTIN(__builtin_ia32_sfence, "v" , "n" , "sse" ) |
290 | TARGET_HEADER_BUILTIN(_mm_sfence, "v" , "nh" , XMMINTRIN_H, ALL_LANGUAGES, "sse" ) |
291 | TARGET_BUILTIN(__builtin_ia32_rcpps, "V4fV4f" , "ncV:128:" , "sse" ) |
292 | TARGET_BUILTIN(__builtin_ia32_rcpss, "V4fV4f" , "ncV:128:" , "sse" ) |
293 | TARGET_BUILTIN(__builtin_ia32_rsqrtps, "V4fV4f" , "ncV:128:" , "sse" ) |
294 | TARGET_BUILTIN(__builtin_ia32_rsqrtss, "V4fV4f" , "ncV:128:" , "sse" ) |
295 | TARGET_BUILTIN(__builtin_ia32_sqrtps, "V4fV4f" , "ncV:128:" , "sse" ) |
296 | TARGET_BUILTIN(__builtin_ia32_sqrtss, "V4fV4f" , "ncV:128:" , "sse" ) |
297 | TARGET_BUILTIN(__builtin_ia32_shufps, "V4fV4fV4fIi" , "ncV:128:" , "sse" ) |
298 | |
299 | TARGET_BUILTIN(__builtin_ia32_maskmovdqu, "vV16cV16cc*" , "nV:128:" , "sse2" ) |
300 | TARGET_BUILTIN(__builtin_ia32_movmskpd, "iV2d" , "ncV:128:" , "sse2" ) |
301 | TARGET_BUILTIN(__builtin_ia32_pmovmskb128, "iV16c" , "ncV:128:" , "sse2" ) |
302 | TARGET_BUILTIN(__builtin_ia32_movnti, "vi*i" , "n" , "sse2" ) |
303 | TARGET_BUILTIN(__builtin_ia32_pshufd, "V4iV4iIi" , "ncV:128:" , "sse2" ) |
304 | TARGET_BUILTIN(__builtin_ia32_pshuflw, "V8sV8sIi" , "ncV:128:" , "sse2" ) |
305 | TARGET_BUILTIN(__builtin_ia32_pshufhw, "V8sV8sIi" , "ncV:128:" , "sse2" ) |
306 | TARGET_BUILTIN(__builtin_ia32_psadbw128, "V2OiV16cV16c" , "ncV:128:" , "sse2" ) |
307 | TARGET_BUILTIN(__builtin_ia32_sqrtpd, "V2dV2d" , "ncV:128:" , "sse2" ) |
308 | TARGET_BUILTIN(__builtin_ia32_sqrtsd, "V2dV2d" , "ncV:128:" , "sse2" ) |
309 | TARGET_BUILTIN(__builtin_ia32_shufpd, "V2dV2dV2dIi" , "ncV:128:" , "sse2" ) |
310 | TARGET_BUILTIN(__builtin_ia32_cvtpd2dq, "V2OiV2d" , "ncV:128:" , "sse2" ) |
311 | TARGET_BUILTIN(__builtin_ia32_cvtpd2ps, "V4fV2d" , "ncV:128:" , "sse2" ) |
312 | TARGET_BUILTIN(__builtin_ia32_cvttpd2dq, "V4iV2d" , "ncV:128:" , "sse2" ) |
313 | TARGET_BUILTIN(__builtin_ia32_cvtsd2si, "iV2d" , "ncV:128:" , "sse2" ) |
314 | TARGET_BUILTIN(__builtin_ia32_cvttsd2si, "iV2d" , "ncV:128:" , "sse2" ) |
315 | TARGET_BUILTIN(__builtin_ia32_cvtsd2ss, "V4fV4fV2d" , "ncV:128:" , "sse2" ) |
316 | TARGET_BUILTIN(__builtin_ia32_cvtps2dq, "V4iV4f" , "ncV:128:" , "sse2" ) |
317 | TARGET_BUILTIN(__builtin_ia32_cvttps2dq, "V4iV4f" , "ncV:128:" , "sse2" ) |
318 | TARGET_BUILTIN(__builtin_ia32_clflush, "vvC*" , "n" , "sse2" ) |
319 | TARGET_HEADER_BUILTIN(_mm_clflush, "vvC*" , "nh" , EMMINTRIN_H, ALL_LANGUAGES, "sse2" ) |
320 | TARGET_BUILTIN(__builtin_ia32_lfence, "v" , "n" , "sse2" ) |
321 | TARGET_HEADER_BUILTIN(_mm_lfence, "v" , "nh" , EMMINTRIN_H, ALL_LANGUAGES, "sse2" ) |
322 | TARGET_BUILTIN(__builtin_ia32_mfence, "v" , "n" , "sse2" ) |
323 | TARGET_HEADER_BUILTIN(_mm_mfence, "v" , "nh" , EMMINTRIN_H, ALL_LANGUAGES, "sse2" ) |
324 | TARGET_BUILTIN(__builtin_ia32_pause, "v" , "n" , "" ) |
325 | TARGET_HEADER_BUILTIN(_mm_pause, "v" , "nh" , EMMINTRIN_H, ALL_LANGUAGES, "" ) |
326 | TARGET_BUILTIN(__builtin_ia32_pmuludq128, "V2OiV4iV4i" , "ncV:128:" , "sse2" ) |
327 | TARGET_BUILTIN(__builtin_ia32_psraw128, "V8sV8sV8s" , "ncV:128:" , "sse2" ) |
328 | TARGET_BUILTIN(__builtin_ia32_psrad128, "V4iV4iV4i" , "ncV:128:" , "sse2" ) |
329 | TARGET_BUILTIN(__builtin_ia32_psrlw128, "V8sV8sV8s" , "ncV:128:" , "sse2" ) |
330 | TARGET_BUILTIN(__builtin_ia32_psrld128, "V4iV4iV4i" , "ncV:128:" , "sse2" ) |
331 | TARGET_BUILTIN(__builtin_ia32_psrlq128, "V2OiV2OiV2Oi" , "ncV:128:" , "sse2" ) |
332 | TARGET_BUILTIN(__builtin_ia32_psllw128, "V8sV8sV8s" , "ncV:128:" , "sse2" ) |
333 | TARGET_BUILTIN(__builtin_ia32_pslld128, "V4iV4iV4i" , "ncV:128:" , "sse2" ) |
334 | TARGET_BUILTIN(__builtin_ia32_psllq128, "V2OiV2OiV2Oi" , "ncV:128:" , "sse2" ) |
335 | TARGET_BUILTIN(__builtin_ia32_psllwi128, "V8sV8si" , "ncV:128:" , "sse2" ) |
336 | TARGET_BUILTIN(__builtin_ia32_pslldi128, "V4iV4ii" , "ncV:128:" , "sse2" ) |
337 | TARGET_BUILTIN(__builtin_ia32_psllqi128, "V2OiV2Oii" , "ncV:128:" , "sse2" ) |
338 | TARGET_BUILTIN(__builtin_ia32_psrlwi128, "V8sV8si" , "ncV:128:" , "sse2" ) |
339 | TARGET_BUILTIN(__builtin_ia32_psrldi128, "V4iV4ii" , "ncV:128:" , "sse2" ) |
340 | TARGET_BUILTIN(__builtin_ia32_psrlqi128, "V2OiV2Oii" , "ncV:128:" , "sse2" ) |
341 | TARGET_BUILTIN(__builtin_ia32_psrawi128, "V8sV8si" , "ncV:128:" , "sse2" ) |
342 | TARGET_BUILTIN(__builtin_ia32_psradi128, "V4iV4ii" , "ncV:128:" , "sse2" ) |
343 | TARGET_BUILTIN(__builtin_ia32_pmaddwd128, "V4iV8sV8s" , "ncV:128:" , "sse2" ) |
344 | TARGET_BUILTIN(__builtin_ia32_pslldqi128_byteshift, "V2OiV2OiIi" , "ncV:128:" , "sse2" ) |
345 | TARGET_BUILTIN(__builtin_ia32_psrldqi128_byteshift, "V2OiV2OiIi" , "ncV:128:" , "sse2" ) |
346 | |
347 | TARGET_BUILTIN(__builtin_ia32_monitor, "vvC*UiUi" , "n" , "sse3" ) |
348 | TARGET_BUILTIN(__builtin_ia32_mwait, "vUiUi" , "n" , "sse3" ) |
349 | TARGET_BUILTIN(__builtin_ia32_lddqu, "V16ccC*" , "nV:128:" , "sse3" ) |
350 | |
351 | TARGET_BUILTIN(__builtin_ia32_palignr128, "V16cV16cV16cIi" , "ncV:128:" , "ssse3" ) |
352 | |
353 | TARGET_BUILTIN(__builtin_ia32_insertps128, "V4fV4fV4fIc" , "ncV:128:" , "sse4.1" ) |
354 | TARGET_BUILTIN(__builtin_ia32_pblendvb128, "V16cV16cV16cV16c" , "ncV:128:" , "sse4.1" ) |
355 | TARGET_BUILTIN(__builtin_ia32_pblendw128, "V8sV8sV8sIi" , "ncV:128:" , "sse4.1" ) |
356 | TARGET_BUILTIN(__builtin_ia32_blendpd, "V2dV2dV2dIi" , "ncV:128:" , "sse4.1" ) |
357 | TARGET_BUILTIN(__builtin_ia32_blendps, "V4fV4fV4fIi" , "ncV:128:" , "sse4.1" ) |
358 | TARGET_BUILTIN(__builtin_ia32_blendvpd, "V2dV2dV2dV2d" , "ncV:128:" , "sse4.1" ) |
359 | TARGET_BUILTIN(__builtin_ia32_blendvps, "V4fV4fV4fV4f" , "ncV:128:" , "sse4.1" ) |
360 | TARGET_BUILTIN(__builtin_ia32_packusdw128, "V8sV4iV4i" , "ncV:128:" , "sse4.1" ) |
361 | |
362 | TARGET_BUILTIN(__builtin_ia32_pmuldq128, "V2OiV4iV4i" , "ncV:128:" , "sse4.1" ) |
363 | TARGET_BUILTIN(__builtin_ia32_roundps, "V4fV4fIi" , "ncV:128:" , "sse4.1" ) |
364 | TARGET_BUILTIN(__builtin_ia32_roundss, "V4fV4fV4fIi" , "ncV:128:" , "sse4.1" ) |
365 | TARGET_BUILTIN(__builtin_ia32_roundsd, "V2dV2dV2dIi" , "ncV:128:" , "sse4.1" ) |
366 | TARGET_BUILTIN(__builtin_ia32_roundpd, "V2dV2dIi" , "ncV:128:" , "sse4.1" ) |
367 | TARGET_BUILTIN(__builtin_ia32_dpps, "V4fV4fV4fIc" , "ncV:128:" , "sse4.1" ) |
368 | TARGET_BUILTIN(__builtin_ia32_dppd, "V2dV2dV2dIc" , "ncV:128:" , "sse4.1" ) |
369 | TARGET_BUILTIN(__builtin_ia32_ptestz128, "iV2OiV2Oi" , "ncV:128:" , "sse4.1" ) |
370 | TARGET_BUILTIN(__builtin_ia32_ptestc128, "iV2OiV2Oi" , "ncV:128:" , "sse4.1" ) |
371 | TARGET_BUILTIN(__builtin_ia32_ptestnzc128, "iV2OiV2Oi" , "ncV:128:" , "sse4.1" ) |
372 | TARGET_BUILTIN(__builtin_ia32_mpsadbw128, "V16cV16cV16cIc" , "ncV:128:" , "sse4.1" ) |
373 | TARGET_BUILTIN(__builtin_ia32_phminposuw128, "V8sV8s" , "ncV:128:" , "sse4.1" ) |
374 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v16qi, "cV16cIi" , "ncV:128:" , "sse4.1" ) |
375 | TARGET_BUILTIN(__builtin_ia32_vec_set_v16qi, "V16cV16ccIi" , "ncV:128:" , "sse4.1" ) |
376 | TARGET_BUILTIN(__builtin_ia32_vec_set_v4si, "V4iV4iiIi" , "ncV:128:" , "sse4.1" ) |
377 | |
378 | // SSE 4.2 |
379 | TARGET_BUILTIN(__builtin_ia32_pcmpistrm128, "V16cV16cV16cIc" , "ncV:128:" , "sse4.2" ) |
380 | TARGET_BUILTIN(__builtin_ia32_pcmpistri128, "iV16cV16cIc" , "ncV:128:" , "sse4.2" ) |
381 | TARGET_BUILTIN(__builtin_ia32_pcmpestrm128, "V16cV16ciV16ciIc" , "ncV:128:" , "sse4.2" ) |
382 | TARGET_BUILTIN(__builtin_ia32_pcmpestri128, "iV16ciV16ciIc" ,"ncV:128:" , "sse4.2" ) |
383 | |
384 | TARGET_BUILTIN(__builtin_ia32_pcmpistria128, "iV16cV16cIc" ,"ncV:128:" , "sse4.2" ) |
385 | TARGET_BUILTIN(__builtin_ia32_pcmpistric128, "iV16cV16cIc" ,"ncV:128:" , "sse4.2" ) |
386 | TARGET_BUILTIN(__builtin_ia32_pcmpistrio128, "iV16cV16cIc" ,"ncV:128:" , "sse4.2" ) |
387 | TARGET_BUILTIN(__builtin_ia32_pcmpistris128, "iV16cV16cIc" ,"ncV:128:" , "sse4.2" ) |
388 | TARGET_BUILTIN(__builtin_ia32_pcmpistriz128, "iV16cV16cIc" ,"ncV:128:" , "sse4.2" ) |
389 | TARGET_BUILTIN(__builtin_ia32_pcmpestria128, "iV16ciV16ciIc" ,"ncV:128:" , "sse4.2" ) |
390 | TARGET_BUILTIN(__builtin_ia32_pcmpestric128, "iV16ciV16ciIc" ,"ncV:128:" , "sse4.2" ) |
391 | TARGET_BUILTIN(__builtin_ia32_pcmpestrio128, "iV16ciV16ciIc" ,"ncV:128:" , "sse4.2" ) |
392 | TARGET_BUILTIN(__builtin_ia32_pcmpestris128, "iV16ciV16ciIc" ,"ncV:128:" , "sse4.2" ) |
393 | TARGET_BUILTIN(__builtin_ia32_pcmpestriz128, "iV16ciV16ciIc" ,"ncV:128:" , "sse4.2" ) |
394 | |
395 | TARGET_BUILTIN(__builtin_ia32_crc32qi, "UiUiUc" , "nc" , "crc32" ) |
396 | TARGET_BUILTIN(__builtin_ia32_crc32hi, "UiUiUs" , "nc" , "crc32" ) |
397 | TARGET_BUILTIN(__builtin_ia32_crc32si, "UiUiUi" , "nc" , "crc32" ) |
398 | |
399 | // SSE4a |
400 | TARGET_BUILTIN(__builtin_ia32_extrqi, "V2OiV2OiIcIc" , "ncV:128:" , "sse4a" ) |
401 | TARGET_BUILTIN(__builtin_ia32_extrq, "V2OiV2OiV16c" , "ncV:128:" , "sse4a" ) |
402 | TARGET_BUILTIN(__builtin_ia32_insertqi, "V2OiV2OiV2OiIcIc" , "ncV:128:" , "sse4a" ) |
403 | TARGET_BUILTIN(__builtin_ia32_insertq, "V2OiV2OiV2Oi" , "ncV:128:" , "sse4a" ) |
404 | TARGET_BUILTIN(__builtin_ia32_movntsd, "vd*V2d" , "nV:128:" , "sse4a" ) |
405 | TARGET_BUILTIN(__builtin_ia32_movntss, "vf*V4f" , "nV:128:" , "sse4a" ) |
406 | |
407 | // AES |
408 | TARGET_BUILTIN(__builtin_ia32_aesenc128, "V2OiV2OiV2Oi" , "ncV:128:" , "aes" ) |
409 | TARGET_BUILTIN(__builtin_ia32_aesenclast128, "V2OiV2OiV2Oi" , "ncV:128:" , "aes" ) |
410 | TARGET_BUILTIN(__builtin_ia32_aesdec128, "V2OiV2OiV2Oi" , "ncV:128:" , "aes" ) |
411 | TARGET_BUILTIN(__builtin_ia32_aesdeclast128, "V2OiV2OiV2Oi" , "ncV:128:" , "aes" ) |
412 | TARGET_BUILTIN(__builtin_ia32_aesimc128, "V2OiV2Oi" , "ncV:128:" , "aes" ) |
413 | TARGET_BUILTIN(__builtin_ia32_aeskeygenassist128, "V2OiV2OiIc" , "ncV:128:" , "aes" ) |
414 | |
415 | // VAES |
416 | TARGET_BUILTIN(__builtin_ia32_aesenc256, "V4OiV4OiV4Oi" , "ncV:256:" , "vaes" ) |
417 | TARGET_BUILTIN(__builtin_ia32_aesenc512, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512,vaes" ) |
418 | TARGET_BUILTIN(__builtin_ia32_aesenclast256, "V4OiV4OiV4Oi" , "ncV:256:" , "vaes" ) |
419 | TARGET_BUILTIN(__builtin_ia32_aesenclast512, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512,vaes" ) |
420 | TARGET_BUILTIN(__builtin_ia32_aesdec256, "V4OiV4OiV4Oi" , "ncV:256:" , "vaes" ) |
421 | TARGET_BUILTIN(__builtin_ia32_aesdec512, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512,vaes" ) |
422 | TARGET_BUILTIN(__builtin_ia32_aesdeclast256, "V4OiV4OiV4Oi" , "ncV:256:" , "vaes" ) |
423 | TARGET_BUILTIN(__builtin_ia32_aesdeclast512, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512,vaes" ) |
424 | |
425 | // GFNI |
426 | TARGET_BUILTIN(__builtin_ia32_vgf2p8affineinvqb_v16qi, "V16cV16cV16cIc" , "ncV:128:" , "gfni" ) |
427 | TARGET_BUILTIN(__builtin_ia32_vgf2p8affineinvqb_v32qi, "V32cV32cV32cIc" , "ncV:256:" , "avx,gfni" ) |
428 | TARGET_BUILTIN(__builtin_ia32_vgf2p8affineinvqb_v64qi, "V64cV64cV64cIc" , "ncV:512:" , "avx512f,evex512,gfni" ) |
429 | TARGET_BUILTIN(__builtin_ia32_vgf2p8affineqb_v16qi, "V16cV16cV16cIc" , "ncV:128:" , "gfni" ) |
430 | TARGET_BUILTIN(__builtin_ia32_vgf2p8affineqb_v32qi, "V32cV32cV32cIc" , "ncV:256:" , "avx,gfni" ) |
431 | TARGET_BUILTIN(__builtin_ia32_vgf2p8affineqb_v64qi, "V64cV64cV64cIc" , "ncV:512:" , "avx512f,evex512,gfni" ) |
432 | TARGET_BUILTIN(__builtin_ia32_vgf2p8mulb_v16qi, "V16cV16cV16c" , "ncV:128:" , "gfni" ) |
433 | TARGET_BUILTIN(__builtin_ia32_vgf2p8mulb_v32qi, "V32cV32cV32c" , "ncV:256:" , "avx,gfni" ) |
434 | TARGET_BUILTIN(__builtin_ia32_vgf2p8mulb_v64qi, "V64cV64cV64c" , "ncV:512:" , "avx512f,evex512,gfni" ) |
435 | |
436 | // CLMUL |
437 | TARGET_BUILTIN(__builtin_ia32_pclmulqdq128, "V2OiV2OiV2OiIc" , "ncV:128:" , "pclmul" ) |
438 | |
439 | // VPCLMULQDQ |
440 | TARGET_BUILTIN(__builtin_ia32_pclmulqdq256, "V4OiV4OiV4OiIc" , "ncV:256:" , "vpclmulqdq" ) |
441 | TARGET_BUILTIN(__builtin_ia32_pclmulqdq512, "V8OiV8OiV8OiIc" , "ncV:512:" , "avx512f,evex512,vpclmulqdq" ) |
442 | |
443 | // AVX |
444 | TARGET_BUILTIN(__builtin_ia32_addsubpd256, "V4dV4dV4d" , "ncV:256:" , "avx" ) |
445 | TARGET_BUILTIN(__builtin_ia32_addsubps256, "V8fV8fV8f" , "ncV:256:" , "avx" ) |
446 | TARGET_BUILTIN(__builtin_ia32_haddpd256, "V4dV4dV4d" , "ncV:256:" , "avx" ) |
447 | TARGET_BUILTIN(__builtin_ia32_hsubps256, "V8fV8fV8f" , "ncV:256:" , "avx" ) |
448 | TARGET_BUILTIN(__builtin_ia32_hsubpd256, "V4dV4dV4d" , "ncV:256:" , "avx" ) |
449 | TARGET_BUILTIN(__builtin_ia32_haddps256, "V8fV8fV8f" , "ncV:256:" , "avx" ) |
450 | TARGET_BUILTIN(__builtin_ia32_maxpd256, "V4dV4dV4d" , "ncV:256:" , "avx" ) |
451 | TARGET_BUILTIN(__builtin_ia32_maxps256, "V8fV8fV8f" , "ncV:256:" , "avx" ) |
452 | TARGET_BUILTIN(__builtin_ia32_minpd256, "V4dV4dV4d" , "ncV:256:" , "avx" ) |
453 | TARGET_BUILTIN(__builtin_ia32_minps256, "V8fV8fV8f" , "ncV:256:" , "avx" ) |
454 | TARGET_BUILTIN(__builtin_ia32_vpermilvarpd, "V2dV2dV2Oi" , "ncV:256:" , "avx" ) |
455 | TARGET_BUILTIN(__builtin_ia32_vpermilvarps, "V4fV4fV4i" , "ncV:256:" , "avx" ) |
456 | TARGET_BUILTIN(__builtin_ia32_vpermilvarpd256, "V4dV4dV4Oi" , "ncV:256:" , "avx" ) |
457 | TARGET_BUILTIN(__builtin_ia32_vpermilvarps256, "V8fV8fV8i" , "ncV:256:" , "avx" ) |
458 | TARGET_BUILTIN(__builtin_ia32_blendpd256, "V4dV4dV4dIi" , "ncV:256:" , "avx" ) |
459 | TARGET_BUILTIN(__builtin_ia32_blendps256, "V8fV8fV8fIi" , "ncV:256:" , "avx" ) |
460 | TARGET_BUILTIN(__builtin_ia32_blendvpd256, "V4dV4dV4dV4d" , "ncV:256:" , "avx" ) |
461 | TARGET_BUILTIN(__builtin_ia32_blendvps256, "V8fV8fV8fV8f" , "ncV:256:" , "avx" ) |
462 | TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi" , "ncV:256:" , "avx" ) |
463 | TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi" , "ncV:256:" , "avx" ) |
464 | TARGET_BUILTIN(__builtin_ia32_dpps256, "V8fV8fV8fIc" , "ncV:256:" , "avx" ) |
465 | TARGET_BUILTIN(__builtin_ia32_cmppd, "V2dV2dV2dIc" , "ncV:128:" , "avx" ) |
466 | TARGET_BUILTIN(__builtin_ia32_cmppd256, "V4dV4dV4dIc" , "ncV:256:" , "avx" ) |
467 | TARGET_BUILTIN(__builtin_ia32_cmpps, "V4fV4fV4fIc" , "ncV:128:" , "avx" ) |
468 | TARGET_BUILTIN(__builtin_ia32_cmpps256, "V8fV8fV8fIc" , "ncV:256:" , "avx" ) |
469 | TARGET_BUILTIN(__builtin_ia32_cmpsd, "V2dV2dV2dIc" , "ncV:128:" , "avx" ) |
470 | TARGET_BUILTIN(__builtin_ia32_cmpss, "V4fV4fV4fIc" , "ncV:128:" , "avx" ) |
471 | TARGET_BUILTIN(__builtin_ia32_vextractf128_pd256, "V2dV4dIi" , "ncV:256:" , "avx" ) |
472 | TARGET_BUILTIN(__builtin_ia32_vextractf128_ps256, "V4fV8fIi" , "ncV:256:" , "avx" ) |
473 | TARGET_BUILTIN(__builtin_ia32_vextractf128_si256, "V4iV8iIi" , "ncV:256:" , "avx" ) |
474 | TARGET_BUILTIN(__builtin_ia32_cvtpd2ps256, "V4fV4d" , "ncV:256:" , "avx" ) |
475 | TARGET_BUILTIN(__builtin_ia32_cvtps2dq256, "V8iV8f" , "ncV:256:" , "avx" ) |
476 | TARGET_BUILTIN(__builtin_ia32_cvttpd2dq256, "V4iV4d" , "ncV:256:" , "avx" ) |
477 | TARGET_BUILTIN(__builtin_ia32_cvtpd2dq256, "V4iV4d" , "ncV:256:" , "avx" ) |
478 | TARGET_BUILTIN(__builtin_ia32_cvttps2dq256, "V8iV8f" , "ncV:256:" , "avx" ) |
479 | TARGET_BUILTIN(__builtin_ia32_vperm2f128_pd256, "V4dV4dV4dIi" , "ncV:256:" , "avx" ) |
480 | TARGET_BUILTIN(__builtin_ia32_vperm2f128_ps256, "V8fV8fV8fIi" , "ncV:256:" , "avx" ) |
481 | TARGET_BUILTIN(__builtin_ia32_vperm2f128_si256, "V8iV8iV8iIi" , "ncV:256:" , "avx" ) |
482 | TARGET_BUILTIN(__builtin_ia32_vpermilpd, "V2dV2dIi" , "ncV:128:" , "avx" ) |
483 | TARGET_BUILTIN(__builtin_ia32_vpermilps, "V4fV4fIi" , "ncV:128:" , "avx" ) |
484 | TARGET_BUILTIN(__builtin_ia32_vpermilpd256, "V4dV4dIi" , "ncV:256:" , "avx" ) |
485 | TARGET_BUILTIN(__builtin_ia32_vpermilps256, "V8fV8fIi" , "ncV:256:" , "avx" ) |
486 | TARGET_BUILTIN(__builtin_ia32_vinsertf128_pd256, "V4dV4dV2dIi" , "ncV:256:" , "avx" ) |
487 | TARGET_BUILTIN(__builtin_ia32_vinsertf128_ps256, "V8fV8fV4fIi" , "ncV:256:" , "avx" ) |
488 | TARGET_BUILTIN(__builtin_ia32_vinsertf128_si256, "V8iV8iV4iIi" , "ncV:256:" , "avx" ) |
489 | TARGET_BUILTIN(__builtin_ia32_sqrtpd256, "V4dV4d" , "ncV:256:" , "avx" ) |
490 | TARGET_BUILTIN(__builtin_ia32_sqrtps256, "V8fV8f" , "ncV:256:" , "avx" ) |
491 | TARGET_BUILTIN(__builtin_ia32_rsqrtps256, "V8fV8f" , "ncV:256:" , "avx" ) |
492 | TARGET_BUILTIN(__builtin_ia32_rcpps256, "V8fV8f" , "ncV:256:" , "avx" ) |
493 | TARGET_BUILTIN(__builtin_ia32_roundpd256, "V4dV4dIi" , "ncV:256:" , "avx" ) |
494 | TARGET_BUILTIN(__builtin_ia32_roundps256, "V8fV8fIi" , "ncV:256:" , "avx" ) |
495 | TARGET_BUILTIN(__builtin_ia32_vtestzpd, "iV2dV2d" , "ncV:128:" , "avx" ) |
496 | TARGET_BUILTIN(__builtin_ia32_vtestcpd, "iV2dV2d" , "ncV:128:" , "avx" ) |
497 | TARGET_BUILTIN(__builtin_ia32_vtestnzcpd, "iV2dV2d" , "ncV:128:" , "avx" ) |
498 | TARGET_BUILTIN(__builtin_ia32_vtestzps, "iV4fV4f" , "ncV:128:" , "avx" ) |
499 | TARGET_BUILTIN(__builtin_ia32_vtestcps, "iV4fV4f" , "ncV:128:" , "avx" ) |
500 | TARGET_BUILTIN(__builtin_ia32_vtestnzcps, "iV4fV4f" , "ncV:128:" , "avx" ) |
501 | TARGET_BUILTIN(__builtin_ia32_vtestzpd256, "iV4dV4d" , "ncV:256:" , "avx" ) |
502 | TARGET_BUILTIN(__builtin_ia32_vtestcpd256, "iV4dV4d" , "ncV:256:" , "avx" ) |
503 | TARGET_BUILTIN(__builtin_ia32_vtestnzcpd256, "iV4dV4d" , "ncV:256:" , "avx" ) |
504 | TARGET_BUILTIN(__builtin_ia32_vtestzps256, "iV8fV8f" , "ncV:256:" , "avx" ) |
505 | TARGET_BUILTIN(__builtin_ia32_vtestcps256, "iV8fV8f" , "ncV:256:" , "avx" ) |
506 | TARGET_BUILTIN(__builtin_ia32_vtestnzcps256, "iV8fV8f" , "ncV:256:" , "avx" ) |
507 | TARGET_BUILTIN(__builtin_ia32_ptestz256, "iV4OiV4Oi" , "ncV:256:" , "avx" ) |
508 | TARGET_BUILTIN(__builtin_ia32_ptestc256, "iV4OiV4Oi" , "ncV:256:" , "avx" ) |
509 | TARGET_BUILTIN(__builtin_ia32_ptestnzc256, "iV4OiV4Oi" , "ncV:256:" , "avx" ) |
510 | TARGET_BUILTIN(__builtin_ia32_movmskpd256, "iV4d" , "ncV:256:" , "avx" ) |
511 | TARGET_BUILTIN(__builtin_ia32_movmskps256, "iV8f" , "ncV:256:" , "avx" ) |
512 | TARGET_BUILTIN(__builtin_ia32_vzeroall, "v" , "n" , "avx" ) |
513 | TARGET_BUILTIN(__builtin_ia32_vzeroupper, "v" , "n" , "avx" ) |
514 | TARGET_BUILTIN(__builtin_ia32_lddqu256, "V32ccC*" , "nV:256:" , "avx" ) |
515 | TARGET_BUILTIN(__builtin_ia32_maskloadpd, "V2dV2dC*V2Oi" , "nV:128:" , "avx" ) |
516 | TARGET_BUILTIN(__builtin_ia32_maskloadps, "V4fV4fC*V4i" , "nV:128:" , "avx" ) |
517 | TARGET_BUILTIN(__builtin_ia32_maskloadpd256, "V4dV4dC*V4Oi" , "nV:256:" , "avx" ) |
518 | TARGET_BUILTIN(__builtin_ia32_maskloadps256, "V8fV8fC*V8i" , "nV:256:" , "avx" ) |
519 | TARGET_BUILTIN(__builtin_ia32_maskstorepd, "vV2d*V2OiV2d" , "nV:128:" , "avx" ) |
520 | TARGET_BUILTIN(__builtin_ia32_maskstoreps, "vV4f*V4iV4f" , "nV:128:" , "avx" ) |
521 | TARGET_BUILTIN(__builtin_ia32_maskstorepd256, "vV4d*V4OiV4d" , "nV:256:" , "avx" ) |
522 | TARGET_BUILTIN(__builtin_ia32_maskstoreps256, "vV8f*V8iV8f" , "nV:256:" , "avx" ) |
523 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v32qi, "cV32cIi" , "ncV:256:" , "avx" ) |
524 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v16hi, "sV16sIi" , "ncV:256:" , "avx" ) |
525 | TARGET_BUILTIN(__builtin_ia32_vec_ext_v8si, "iV8iIi" , "ncV:256:" , "avx" ) |
526 | TARGET_BUILTIN(__builtin_ia32_vec_set_v32qi, "V32cV32ccIi" , "ncV:256:" , "avx" ) |
527 | TARGET_BUILTIN(__builtin_ia32_vec_set_v16hi, "V16sV16ssIi" , "ncV:256:" , "avx" ) |
528 | TARGET_BUILTIN(__builtin_ia32_vec_set_v8si, "V8iV8iiIi" , "ncV:256:" , "avx" ) |
529 | |
530 | // AVX2 |
531 | TARGET_BUILTIN(__builtin_ia32_mpsadbw256, "V32cV32cV32cIc" , "ncV:256:" , "avx2" ) |
532 | TARGET_BUILTIN(__builtin_ia32_packsswb256, "V32cV16sV16s" , "ncV:256:" , "avx2" ) |
533 | TARGET_BUILTIN(__builtin_ia32_packssdw256, "V16sV8iV8i" , "ncV:256:" , "avx2" ) |
534 | TARGET_BUILTIN(__builtin_ia32_packuswb256, "V32cV16sV16s" , "ncV:256:" , "avx2" ) |
535 | TARGET_BUILTIN(__builtin_ia32_packusdw256, "V16sV8iV8i" , "ncV:256:" , "avx2" ) |
536 | TARGET_BUILTIN(__builtin_ia32_palignr256, "V32cV32cV32cIi" , "ncV:256:" , "avx2" ) |
537 | TARGET_BUILTIN(__builtin_ia32_pavgb256, "V32cV32cV32c" , "ncV:256:" , "avx2" ) |
538 | TARGET_BUILTIN(__builtin_ia32_pavgw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
539 | TARGET_BUILTIN(__builtin_ia32_pblendvb256, "V32cV32cV32cV32c" , "ncV:256:" , "avx2" ) |
540 | TARGET_BUILTIN(__builtin_ia32_pblendw256, "V16sV16sV16sIi" , "ncV:256:" , "avx2" ) |
541 | TARGET_BUILTIN(__builtin_ia32_phaddw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
542 | TARGET_BUILTIN(__builtin_ia32_phaddd256, "V8iV8iV8i" , "ncV:256:" , "avx2" ) |
543 | TARGET_BUILTIN(__builtin_ia32_phaddsw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
544 | TARGET_BUILTIN(__builtin_ia32_phsubw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
545 | TARGET_BUILTIN(__builtin_ia32_phsubd256, "V8iV8iV8i" , "ncV:256:" , "avx2" ) |
546 | TARGET_BUILTIN(__builtin_ia32_phsubsw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
547 | TARGET_BUILTIN(__builtin_ia32_pmaddubsw256, "V16sV32cV32c" , "ncV:256:" , "avx2" ) |
548 | TARGET_BUILTIN(__builtin_ia32_pmaddwd256, "V8iV16sV16s" , "ncV:256:" , "avx2" ) |
549 | TARGET_BUILTIN(__builtin_ia32_pmovmskb256, "iV32c" , "ncV:256:" , "avx2" ) |
550 | TARGET_BUILTIN(__builtin_ia32_pmuldq256, "V4OiV8iV8i" , "ncV:256:" , "avx2" ) |
551 | TARGET_BUILTIN(__builtin_ia32_pmulhrsw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
552 | TARGET_BUILTIN(__builtin_ia32_pmulhuw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
553 | TARGET_BUILTIN(__builtin_ia32_pmulhw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
554 | TARGET_BUILTIN(__builtin_ia32_pmuludq256, "V4OiV8iV8i" , "ncV:256:" , "avx2" ) |
555 | TARGET_BUILTIN(__builtin_ia32_psadbw256, "V4OiV32cV32c" , "ncV:256:" , "avx2" ) |
556 | TARGET_BUILTIN(__builtin_ia32_pshufb256, "V32cV32cV32c" , "ncV:256:" , "avx2" ) |
557 | TARGET_BUILTIN(__builtin_ia32_pshufd256, "V8iV8iIi" , "ncV:256:" , "avx2" ) |
558 | TARGET_BUILTIN(__builtin_ia32_pshuflw256, "V16sV16sIi" , "ncV:256:" , "avx2" ) |
559 | TARGET_BUILTIN(__builtin_ia32_pshufhw256, "V16sV16sIi" , "ncV:256:" , "avx2" ) |
560 | TARGET_BUILTIN(__builtin_ia32_psignb256, "V32cV32cV32c" , "ncV:256:" , "avx2" ) |
561 | TARGET_BUILTIN(__builtin_ia32_psignw256, "V16sV16sV16s" , "ncV:256:" , "avx2" ) |
562 | TARGET_BUILTIN(__builtin_ia32_psignd256, "V8iV8iV8i" , "ncV:256:" , "avx2" ) |
563 | TARGET_BUILTIN(__builtin_ia32_psllwi256, "V16sV16si" , "ncV:256:" , "avx2" ) |
564 | TARGET_BUILTIN(__builtin_ia32_psllw256, "V16sV16sV8s" , "ncV:256:" , "avx2" ) |
565 | TARGET_BUILTIN(__builtin_ia32_pslldqi256_byteshift, "V4OiV4OiIi" , "ncV:256:" , "avx2" ) |
566 | TARGET_BUILTIN(__builtin_ia32_pslldi256, "V8iV8ii" , "ncV:256:" , "avx2" ) |
567 | TARGET_BUILTIN(__builtin_ia32_pslld256, "V8iV8iV4i" , "ncV:256:" , "avx2" ) |
568 | TARGET_BUILTIN(__builtin_ia32_psllqi256, "V4OiV4Oii" , "ncV:256:" , "avx2" ) |
569 | TARGET_BUILTIN(__builtin_ia32_psllq256, "V4OiV4OiV2Oi" , "ncV:256:" , "avx2" ) |
570 | TARGET_BUILTIN(__builtin_ia32_psrawi256, "V16sV16si" , "ncV:256:" , "avx2" ) |
571 | TARGET_BUILTIN(__builtin_ia32_psraw256, "V16sV16sV8s" , "ncV:256:" , "avx2" ) |
572 | TARGET_BUILTIN(__builtin_ia32_psradi256, "V8iV8ii" , "ncV:256:" , "avx2" ) |
573 | TARGET_BUILTIN(__builtin_ia32_psrad256, "V8iV8iV4i" , "ncV:256:" , "avx2" ) |
574 | TARGET_BUILTIN(__builtin_ia32_psrldqi256_byteshift, "V4OiV4OiIi" , "ncV:256:" , "avx2" ) |
575 | TARGET_BUILTIN(__builtin_ia32_psrlwi256, "V16sV16si" , "ncV:256:" , "avx2" ) |
576 | TARGET_BUILTIN(__builtin_ia32_psrlw256, "V16sV16sV8s" , "ncV:256:" , "avx2" ) |
577 | TARGET_BUILTIN(__builtin_ia32_psrldi256, "V8iV8ii" , "ncV:256:" , "avx2" ) |
578 | TARGET_BUILTIN(__builtin_ia32_psrld256, "V8iV8iV4i" , "ncV:256:" , "avx2" ) |
579 | TARGET_BUILTIN(__builtin_ia32_psrlqi256, "V4OiV4Oii" , "ncV:256:" , "avx2" ) |
580 | TARGET_BUILTIN(__builtin_ia32_psrlq256, "V4OiV4OiV2Oi" , "ncV:256:" , "avx2" ) |
581 | TARGET_BUILTIN(__builtin_ia32_pblendd128, "V4iV4iV4iIi" , "ncV:256:" , "avx2" ) |
582 | TARGET_BUILTIN(__builtin_ia32_pblendd256, "V8iV8iV8iIi" , "ncV:256:" , "avx2" ) |
583 | TARGET_BUILTIN(__builtin_ia32_permvarsi256, "V8iV8iV8i" , "ncV:256:" , "avx2" ) |
584 | TARGET_BUILTIN(__builtin_ia32_permdf256, "V4dV4dIi" , "ncV:256:" , "avx2" ) |
585 | TARGET_BUILTIN(__builtin_ia32_permvarsf256, "V8fV8fV8i" , "ncV:256:" , "avx2" ) |
586 | TARGET_BUILTIN(__builtin_ia32_permti256, "V4OiV4OiV4OiIi" , "ncV:256:" , "avx2" ) |
587 | TARGET_BUILTIN(__builtin_ia32_permdi256, "V4OiV4OiIi" , "ncV:256:" , "avx2" ) |
588 | TARGET_BUILTIN(__builtin_ia32_extract128i256, "V2OiV4OiIi" , "ncV:256:" , "avx2" ) |
589 | TARGET_BUILTIN(__builtin_ia32_insert128i256, "V4OiV4OiV2OiIi" , "ncV:256:" , "avx2" ) |
590 | TARGET_BUILTIN(__builtin_ia32_maskloadd256, "V8iV8iC*V8i" , "nV:256:" , "avx2" ) |
591 | TARGET_BUILTIN(__builtin_ia32_maskloadq256, "V4OiV4OiC*V4Oi" , "nV:256:" , "avx2" ) |
592 | TARGET_BUILTIN(__builtin_ia32_maskloadd, "V4iV4iC*V4i" , "nV:128:" , "avx2" ) |
593 | TARGET_BUILTIN(__builtin_ia32_maskloadq, "V2OiV2OiC*V2Oi" , "nV:128:" , "avx2" ) |
594 | TARGET_BUILTIN(__builtin_ia32_maskstored256, "vV8i*V8iV8i" , "nV:256:" , "avx2" ) |
595 | TARGET_BUILTIN(__builtin_ia32_maskstoreq256, "vV4Oi*V4OiV4Oi" , "nV:256:" , "avx2" ) |
596 | TARGET_BUILTIN(__builtin_ia32_maskstored, "vV4i*V4iV4i" , "nV:128:" , "avx2" ) |
597 | TARGET_BUILTIN(__builtin_ia32_maskstoreq, "vV2Oi*V2OiV2Oi" , "nV:128:" , "avx2" ) |
598 | TARGET_BUILTIN(__builtin_ia32_psllv8si, "V8iV8iV8i" , "ncV:256:" , "avx2" ) |
599 | TARGET_BUILTIN(__builtin_ia32_psllv4si, "V4iV4iV4i" , "ncV:128:" , "avx2" ) |
600 | TARGET_BUILTIN(__builtin_ia32_psllv4di, "V4OiV4OiV4Oi" , "ncV:256:" , "avx2" ) |
601 | TARGET_BUILTIN(__builtin_ia32_psllv2di, "V2OiV2OiV2Oi" , "ncV:128:" , "avx2" ) |
602 | TARGET_BUILTIN(__builtin_ia32_psrav8si, "V8iV8iV8i" , "ncV:256:" , "avx2" ) |
603 | TARGET_BUILTIN(__builtin_ia32_psrav4si, "V4iV4iV4i" , "ncV:128:" , "avx2" ) |
604 | TARGET_BUILTIN(__builtin_ia32_psrlv8si, "V8iV8iV8i" , "ncV:256:" , "avx2" ) |
605 | TARGET_BUILTIN(__builtin_ia32_psrlv4si, "V4iV4iV4i" , "ncV:128:" , "avx2" ) |
606 | TARGET_BUILTIN(__builtin_ia32_psrlv4di, "V4OiV4OiV4Oi" , "ncV:256:" , "avx2" ) |
607 | TARGET_BUILTIN(__builtin_ia32_psrlv2di, "V2OiV2OiV2Oi" , "ncV:128:" , "avx2" ) |
608 | |
609 | // GATHER |
610 | TARGET_BUILTIN(__builtin_ia32_gatherd_pd, "V2dV2ddC*V4iV2dIc" , "nV:128:" , "avx2" ) |
611 | TARGET_BUILTIN(__builtin_ia32_gatherd_pd256, "V4dV4ddC*V4iV4dIc" , "nV:256:" , "avx2" ) |
612 | TARGET_BUILTIN(__builtin_ia32_gatherq_pd, "V2dV2ddC*V2OiV2dIc" , "nV:128:" , "avx2" ) |
613 | TARGET_BUILTIN(__builtin_ia32_gatherq_pd256, "V4dV4ddC*V4OiV4dIc" , "nV:256:" , "avx2" ) |
614 | TARGET_BUILTIN(__builtin_ia32_gatherd_ps, "V4fV4ffC*V4iV4fIc" , "nV:128:" , "avx2" ) |
615 | TARGET_BUILTIN(__builtin_ia32_gatherd_ps256, "V8fV8ffC*V8iV8fIc" , "nV:256:" , "avx2" ) |
616 | TARGET_BUILTIN(__builtin_ia32_gatherq_ps, "V4fV4ffC*V2OiV4fIc" , "nV:128:" , "avx2" ) |
617 | TARGET_BUILTIN(__builtin_ia32_gatherq_ps256, "V4fV4ffC*V4OiV4fIc" , "nV:256:" , "avx2" ) |
618 | |
619 | TARGET_BUILTIN(__builtin_ia32_gatherd_q, "V2OiV2OiOiC*V4iV2OiIc" , "nV:128:" , "avx2" ) |
620 | TARGET_BUILTIN(__builtin_ia32_gatherd_q256, "V4OiV4OiOiC*V4iV4OiIc" , "nV:256:" , "avx2" ) |
621 | TARGET_BUILTIN(__builtin_ia32_gatherq_q, "V2OiV2OiOiC*V2OiV2OiIc" , "nV:128:" , "avx2" ) |
622 | TARGET_BUILTIN(__builtin_ia32_gatherq_q256, "V4OiV4OiOiC*V4OiV4OiIc" , "nV:256:" , "avx2" ) |
623 | TARGET_BUILTIN(__builtin_ia32_gatherd_d, "V4iV4iiC*V4iV4iIc" , "nV:128:" , "avx2" ) |
624 | TARGET_BUILTIN(__builtin_ia32_gatherd_d256, "V8iV8iiC*V8iV8iIc" , "nV:256:" , "avx2" ) |
625 | TARGET_BUILTIN(__builtin_ia32_gatherq_d, "V4iV4iiC*V2OiV4iIc" , "nV:128:" , "avx2" ) |
626 | TARGET_BUILTIN(__builtin_ia32_gatherq_d256, "V4iV4iiC*V4OiV4iIc" , "nV:256:" , "avx2" ) |
627 | |
628 | // F16C |
629 | TARGET_BUILTIN(__builtin_ia32_vcvtps2ph, "V8sV4fIi" , "ncV:128:" , "f16c" ) |
630 | TARGET_BUILTIN(__builtin_ia32_vcvtps2ph256, "V8sV8fIi" , "ncV:256:" , "f16c" ) |
631 | TARGET_BUILTIN(__builtin_ia32_vcvtph2ps, "V4fV8s" , "ncV:128:" , "f16c" ) |
632 | TARGET_BUILTIN(__builtin_ia32_vcvtph2ps256, "V8fV8s" , "ncV:256:" , "f16c" ) |
633 | |
634 | // RDRAND |
635 | TARGET_BUILTIN(__builtin_ia32_rdrand16_step, "UiUs*" , "n" , "rdrnd" ) |
636 | TARGET_BUILTIN(__builtin_ia32_rdrand32_step, "UiUi*" , "n" , "rdrnd" ) |
637 | |
638 | // FXSR |
639 | TARGET_BUILTIN(__builtin_ia32_fxrstor, "vv*" , "n" , "fxsr" ) |
640 | TARGET_BUILTIN(__builtin_ia32_fxsave, "vv*" , "n" , "fxsr" ) |
641 | |
642 | // XSAVE |
643 | TARGET_BUILTIN(__builtin_ia32_xsave, "vv*UOi" , "n" , "xsave" ) |
644 | TARGET_BUILTIN(__builtin_ia32_xrstor, "vv*UOi" , "n" , "xsave" ) |
645 | TARGET_BUILTIN(__builtin_ia32_xgetbv, "UOiUi" , "n" , "xsave" ) |
646 | TARGET_HEADER_BUILTIN(_xgetbv, "UWiUi" , "nh" , IMMINTRIN_H, ALL_MS_LANGUAGES, "" ) |
647 | TARGET_BUILTIN(__builtin_ia32_xsetbv, "vUiUOi" , "n" , "xsave" ) |
648 | TARGET_HEADER_BUILTIN(_xsetbv, "vUiUWi" , "nh" , IMMINTRIN_H, ALL_MS_LANGUAGES, "" ) |
649 | TARGET_BUILTIN(__builtin_ia32_xsaveopt, "vv*UOi" , "n" , "xsaveopt" ) |
650 | TARGET_BUILTIN(__builtin_ia32_xrstors, "vv*UOi" , "n" , "xsaves" ) |
651 | TARGET_BUILTIN(__builtin_ia32_xsavec, "vv*UOi" , "n" , "xsavec" ) |
652 | TARGET_BUILTIN(__builtin_ia32_xsaves, "vv*UOi" , "n" , "xsaves" ) |
653 | |
654 | // SHSTK |
655 | TARGET_BUILTIN(__builtin_ia32_incsspd, "vUi" , "n" , "shstk" ) |
656 | TARGET_BUILTIN(__builtin_ia32_rdsspd, "UiUi" , "n" , "shstk" ) |
657 | TARGET_BUILTIN(__builtin_ia32_saveprevssp, "v" , "n" , "shstk" ) |
658 | TARGET_BUILTIN(__builtin_ia32_rstorssp, "vv*" , "n" , "shstk" ) |
659 | TARGET_BUILTIN(__builtin_ia32_wrssd, "vUiv*" , "n" , "shstk" ) |
660 | TARGET_BUILTIN(__builtin_ia32_wrussd, "vUiv*" , "n" , "shstk" ) |
661 | TARGET_BUILTIN(__builtin_ia32_setssbsy, "v" , "n" , "shstk" ) |
662 | TARGET_BUILTIN(__builtin_ia32_clrssbsy, "vv*" , "n" , "shstk" ) |
663 | |
664 | //CLFLUSHOPT |
665 | TARGET_BUILTIN(__builtin_ia32_clflushopt, "vvC*" , "n" , "clflushopt" ) |
666 | |
667 | //CLWB |
668 | TARGET_BUILTIN(__builtin_ia32_clwb, "vvC*" , "n" , "clwb" ) |
669 | |
670 | //WB[NO]INVD |
671 | TARGET_BUILTIN(__builtin_ia32_wbinvd, "v" , "n" , "" ) |
672 | TARGET_BUILTIN(__builtin_ia32_wbnoinvd, "v" , "n" , "wbnoinvd" ) |
673 | |
674 | // ADX |
675 | TARGET_BUILTIN(__builtin_ia32_addcarryx_u32, "UcUcUiUiUi*" , "n" , "" ) |
676 | TARGET_BUILTIN(__builtin_ia32_subborrow_u32, "UcUcUiUiUi*" , "n" , "" ) |
677 | |
678 | // RDSEED |
679 | TARGET_BUILTIN(__builtin_ia32_rdseed16_step, "UiUs*" , "n" , "rdseed" ) |
680 | TARGET_BUILTIN(__builtin_ia32_rdseed32_step, "UiUi*" , "n" , "rdseed" ) |
681 | |
682 | // LZCNT |
683 | TARGET_BUILTIN(__builtin_ia32_lzcnt_u16, "UsUs" , "nc" , "lzcnt" ) |
684 | TARGET_BUILTIN(__builtin_ia32_lzcnt_u32, "UiUi" , "nc" , "lzcnt" ) |
685 | |
686 | // BMI |
687 | TARGET_BUILTIN(__builtin_ia32_bextr_u32, "UiUiUi" , "nc" , "bmi" ) |
688 | TARGET_BUILTIN(__builtin_ia32_tzcnt_u16, "UsUs" , "nc" , "" ) |
689 | TARGET_BUILTIN(__builtin_ia32_tzcnt_u32, "UiUi" , "nc" , "" ) |
690 | |
691 | // BMI2 |
692 | TARGET_BUILTIN(__builtin_ia32_bzhi_si, "UiUiUi" , "nc" , "bmi2" ) |
693 | TARGET_BUILTIN(__builtin_ia32_pdep_si, "UiUiUi" , "nc" , "bmi2" ) |
694 | TARGET_BUILTIN(__builtin_ia32_pext_si, "UiUiUi" , "nc" , "bmi2" ) |
695 | |
696 | // TBM |
697 | TARGET_BUILTIN(__builtin_ia32_bextri_u32, "UiUiIUi" , "nc" , "tbm" ) |
698 | |
699 | // LWP |
700 | TARGET_BUILTIN(__builtin_ia32_llwpcb, "vv*" , "n" , "lwp" ) |
701 | TARGET_BUILTIN(__builtin_ia32_slwpcb, "v*" , "n" , "lwp" ) |
702 | TARGET_BUILTIN(__builtin_ia32_lwpins32, "UcUiUiIUi" , "n" , "lwp" ) |
703 | TARGET_BUILTIN(__builtin_ia32_lwpval32, "vUiUiIUi" , "n" , "lwp" ) |
704 | |
705 | // SHA |
706 | TARGET_BUILTIN(__builtin_ia32_sha1rnds4, "V4iV4iV4iIc" , "ncV:128:" , "sha" ) |
707 | TARGET_BUILTIN(__builtin_ia32_sha1nexte, "V4iV4iV4i" , "ncV:128:" , "sha" ) |
708 | TARGET_BUILTIN(__builtin_ia32_sha1msg1, "V4iV4iV4i" , "ncV:128:" , "sha" ) |
709 | TARGET_BUILTIN(__builtin_ia32_sha1msg2, "V4iV4iV4i" , "ncV:128:" , "sha" ) |
710 | TARGET_BUILTIN(__builtin_ia32_sha256rnds2, "V4iV4iV4iV4i" , "ncV:128:" , "sha" ) |
711 | TARGET_BUILTIN(__builtin_ia32_sha256msg1, "V4iV4iV4i" , "ncV:128:" , "sha" ) |
712 | TARGET_BUILTIN(__builtin_ia32_sha256msg2, "V4iV4iV4i" , "ncV:128:" , "sha" ) |
713 | |
714 | // FMA |
715 | TARGET_BUILTIN(__builtin_ia32_vfmaddps, "V4fV4fV4fV4f" , "ncV:128:" , "fma|fma4" ) |
716 | TARGET_BUILTIN(__builtin_ia32_vfmaddpd, "V2dV2dV2dV2d" , "ncV:128:" , "fma|fma4" ) |
717 | TARGET_BUILTIN(__builtin_ia32_vfmaddss3, "V4fV4fV4fV4f" , "ncV:128:" , "fma" ) |
718 | TARGET_BUILTIN(__builtin_ia32_vfmaddsd3, "V2dV2dV2dV2d" , "ncV:128:" , "fma" ) |
719 | TARGET_BUILTIN(__builtin_ia32_vfmaddss, "V4fV4fV4fV4f" , "ncV:128:" , "fma4" ) |
720 | TARGET_BUILTIN(__builtin_ia32_vfmaddsd, "V2dV2dV2dV2d" , "ncV:128:" , "fma4" ) |
721 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubps, "V4fV4fV4fV4f" , "ncV:128:" , "fma|fma4" ) |
722 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd, "V2dV2dV2dV2d" , "ncV:128:" , "fma|fma4" ) |
723 | TARGET_BUILTIN(__builtin_ia32_vfmaddps256, "V8fV8fV8fV8f" , "ncV:256:" , "fma|fma4" ) |
724 | TARGET_BUILTIN(__builtin_ia32_vfmaddpd256, "V4dV4dV4dV4d" , "ncV:256:" , "fma|fma4" ) |
725 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubps256, "V8fV8fV8fV8f" , "ncV:256:" , "fma|fma4" ) |
726 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd256, "V4dV4dV4dV4d" , "ncV:256:" , "fma|fma4" ) |
727 | |
728 | TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_mask, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
729 | TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_maskz, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
730 | TARGET_BUILTIN(__builtin_ia32_vfmaddpd512_mask3, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
731 | TARGET_BUILTIN(__builtin_ia32_vfmsubpd512_mask3, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
732 | TARGET_BUILTIN(__builtin_ia32_vfmaddps512_mask, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
733 | TARGET_BUILTIN(__builtin_ia32_vfmaddps512_maskz, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
734 | TARGET_BUILTIN(__builtin_ia32_vfmaddps512_mask3, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
735 | TARGET_BUILTIN(__builtin_ia32_vfmsubps512_mask3, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
736 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_mask, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
737 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_maskz, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
738 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd512_mask3, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
739 | TARGET_BUILTIN(__builtin_ia32_vfmsubaddpd512_mask3, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
740 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_mask, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
741 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_maskz, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
742 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubps512_mask3, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
743 | TARGET_BUILTIN(__builtin_ia32_vfmsubaddps512_mask3, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
744 | |
745 | // XOP |
746 | TARGET_BUILTIN(__builtin_ia32_vpmacssww, "V8sV8sV8sV8s" , "ncV:128:" , "xop" ) |
747 | TARGET_BUILTIN(__builtin_ia32_vpmacsww, "V8sV8sV8sV8s" , "ncV:128:" , "xop" ) |
748 | TARGET_BUILTIN(__builtin_ia32_vpmacsswd, "V4iV8sV8sV4i" , "ncV:128:" , "xop" ) |
749 | TARGET_BUILTIN(__builtin_ia32_vpmacswd, "V4iV8sV8sV4i" , "ncV:128:" , "xop" ) |
750 | TARGET_BUILTIN(__builtin_ia32_vpmacssdd, "V4iV4iV4iV4i" , "ncV:128:" , "xop" ) |
751 | TARGET_BUILTIN(__builtin_ia32_vpmacsdd, "V4iV4iV4iV4i" , "ncV:128:" , "xop" ) |
752 | TARGET_BUILTIN(__builtin_ia32_vpmacssdql, "V2OiV4iV4iV2Oi" , "ncV:128:" , "xop" ) |
753 | TARGET_BUILTIN(__builtin_ia32_vpmacsdql, "V2OiV4iV4iV2Oi" , "ncV:128:" , "xop" ) |
754 | TARGET_BUILTIN(__builtin_ia32_vpmacssdqh, "V2OiV4iV4iV2Oi" , "ncV:128:" , "xop" ) |
755 | TARGET_BUILTIN(__builtin_ia32_vpmacsdqh, "V2OiV4iV4iV2Oi" , "ncV:128:" , "xop" ) |
756 | TARGET_BUILTIN(__builtin_ia32_vpmadcsswd, "V4iV8sV8sV4i" , "ncV:128:" , "xop" ) |
757 | TARGET_BUILTIN(__builtin_ia32_vpmadcswd, "V4iV8sV8sV4i" , "ncV:128:" , "xop" ) |
758 | |
759 | TARGET_BUILTIN(__builtin_ia32_vphaddbw, "V8sV16c" , "ncV:128:" , "xop" ) |
760 | TARGET_BUILTIN(__builtin_ia32_vphaddbd, "V4iV16c" , "ncV:128:" , "xop" ) |
761 | TARGET_BUILTIN(__builtin_ia32_vphaddbq, "V2OiV16c" , "ncV:128:" , "xop" ) |
762 | TARGET_BUILTIN(__builtin_ia32_vphaddwd, "V4iV8s" , "ncV:128:" , "xop" ) |
763 | TARGET_BUILTIN(__builtin_ia32_vphaddwq, "V2OiV8s" , "ncV:128:" , "xop" ) |
764 | TARGET_BUILTIN(__builtin_ia32_vphadddq, "V2OiV4i" , "ncV:128:" , "xop" ) |
765 | TARGET_BUILTIN(__builtin_ia32_vphaddubw, "V8sV16c" , "ncV:128:" , "xop" ) |
766 | TARGET_BUILTIN(__builtin_ia32_vphaddubd, "V4iV16c" , "ncV:128:" , "xop" ) |
767 | TARGET_BUILTIN(__builtin_ia32_vphaddubq, "V2OiV16c" , "ncV:128:" , "xop" ) |
768 | TARGET_BUILTIN(__builtin_ia32_vphadduwd, "V4iV8s" , "ncV:128:" , "xop" ) |
769 | TARGET_BUILTIN(__builtin_ia32_vphadduwq, "V2OiV8s" , "ncV:128:" , "xop" ) |
770 | TARGET_BUILTIN(__builtin_ia32_vphaddudq, "V2OiV4i" , "ncV:128:" , "xop" ) |
771 | TARGET_BUILTIN(__builtin_ia32_vphsubbw, "V8sV16c" , "ncV:128:" , "xop" ) |
772 | TARGET_BUILTIN(__builtin_ia32_vphsubwd, "V4iV8s" , "ncV:128:" , "xop" ) |
773 | TARGET_BUILTIN(__builtin_ia32_vphsubdq, "V2OiV4i" , "ncV:128:" , "xop" ) |
774 | TARGET_BUILTIN(__builtin_ia32_vpperm, "V16cV16cV16cV16c" , "ncV:128:" , "xop" ) |
775 | TARGET_BUILTIN(__builtin_ia32_vprotb, "V16cV16cV16c" , "ncV:128:" , "xop" ) |
776 | TARGET_BUILTIN(__builtin_ia32_vprotw, "V8sV8sV8s" , "ncV:128:" , "xop" ) |
777 | TARGET_BUILTIN(__builtin_ia32_vprotd, "V4iV4iV4i" , "ncV:128:" , "xop" ) |
778 | TARGET_BUILTIN(__builtin_ia32_vprotq, "V2OiV2OiV2Oi" , "ncV:128:" , "xop" ) |
779 | TARGET_BUILTIN(__builtin_ia32_vprotbi, "V16cV16cIc" , "ncV:128:" , "xop" ) |
780 | TARGET_BUILTIN(__builtin_ia32_vprotwi, "V8sV8sIc" , "ncV:128:" , "xop" ) |
781 | TARGET_BUILTIN(__builtin_ia32_vprotdi, "V4iV4iIc" , "ncV:128:" , "xop" ) |
782 | TARGET_BUILTIN(__builtin_ia32_vprotqi, "V2OiV2OiIc" , "ncV:128:" , "xop" ) |
783 | TARGET_BUILTIN(__builtin_ia32_vpshlb, "V16cV16cV16c" , "ncV:128:" , "xop" ) |
784 | TARGET_BUILTIN(__builtin_ia32_vpshlw, "V8sV8sV8s" , "ncV:128:" , "xop" ) |
785 | TARGET_BUILTIN(__builtin_ia32_vpshld, "V4iV4iV4i" , "ncV:128:" , "xop" ) |
786 | TARGET_BUILTIN(__builtin_ia32_vpshlq, "V2OiV2OiV2Oi" , "ncV:128:" , "xop" ) |
787 | TARGET_BUILTIN(__builtin_ia32_vpshab, "V16cV16cV16c" , "ncV:128:" , "xop" ) |
788 | TARGET_BUILTIN(__builtin_ia32_vpshaw, "V8sV8sV8s" , "ncV:128:" , "xop" ) |
789 | TARGET_BUILTIN(__builtin_ia32_vpshad, "V4iV4iV4i" , "ncV:128:" , "xop" ) |
790 | TARGET_BUILTIN(__builtin_ia32_vpshaq, "V2OiV2OiV2Oi" , "ncV:128:" , "xop" ) |
791 | TARGET_BUILTIN(__builtin_ia32_vpcomub, "V16cV16cV16cIc" , "ncV:128:" , "xop" ) |
792 | TARGET_BUILTIN(__builtin_ia32_vpcomuw, "V8sV8sV8sIc" , "ncV:128:" , "xop" ) |
793 | TARGET_BUILTIN(__builtin_ia32_vpcomud, "V4iV4iV4iIc" , "ncV:128:" , "xop" ) |
794 | TARGET_BUILTIN(__builtin_ia32_vpcomuq, "V2OiV2OiV2OiIc" , "ncV:128:" , "xop" ) |
795 | TARGET_BUILTIN(__builtin_ia32_vpcomb, "V16cV16cV16cIc" , "ncV:128:" , "xop" ) |
796 | TARGET_BUILTIN(__builtin_ia32_vpcomw, "V8sV8sV8sIc" , "ncV:128:" , "xop" ) |
797 | TARGET_BUILTIN(__builtin_ia32_vpcomd, "V4iV4iV4iIc" , "ncV:128:" , "xop" ) |
798 | TARGET_BUILTIN(__builtin_ia32_vpcomq, "V2OiV2OiV2OiIc" , "ncV:128:" , "xop" ) |
799 | TARGET_BUILTIN(__builtin_ia32_vpermil2pd, "V2dV2dV2dV2OiIc" , "ncV:128:" , "xop" ) |
800 | TARGET_BUILTIN(__builtin_ia32_vpermil2pd256, "V4dV4dV4dV4OiIc" , "ncV:256:" , "xop" ) |
801 | TARGET_BUILTIN(__builtin_ia32_vpermil2ps, "V4fV4fV4fV4iIc" , "ncV:128:" , "xop" ) |
802 | TARGET_BUILTIN(__builtin_ia32_vpermil2ps256, "V8fV8fV8fV8iIc" , "ncV:256:" , "xop" ) |
803 | TARGET_BUILTIN(__builtin_ia32_vfrczss, "V4fV4f" , "ncV:128:" , "xop" ) |
804 | TARGET_BUILTIN(__builtin_ia32_vfrczsd, "V2dV2d" , "ncV:128:" , "xop" ) |
805 | TARGET_BUILTIN(__builtin_ia32_vfrczps, "V4fV4f" , "ncV:128:" , "xop" ) |
806 | TARGET_BUILTIN(__builtin_ia32_vfrczpd, "V2dV2d" , "ncV:128:" , "xop" ) |
807 | TARGET_BUILTIN(__builtin_ia32_vfrczps256, "V8fV8f" , "ncV:256:" , "xop" ) |
808 | TARGET_BUILTIN(__builtin_ia32_vfrczpd256, "V4dV4d" , "ncV:256:" , "xop" ) |
809 | |
810 | TARGET_BUILTIN(__builtin_ia32_xbegin, "i" , "n" , "rtm" ) |
811 | TARGET_BUILTIN(__builtin_ia32_xend, "v" , "n" , "rtm" ) |
812 | TARGET_BUILTIN(__builtin_ia32_xabort, "vIc" , "n" , "rtm" ) |
813 | TARGET_BUILTIN(__builtin_ia32_xtest, "i" , "n" , "rtm" ) |
814 | |
815 | BUILTIN(__builtin_ia32_rdpmc, "UOii" , "" ) |
816 | BUILTIN(__builtin_ia32_rdtsc, "UOi" , "" ) |
817 | BUILTIN(__rdtsc, "UOi" , "" ) |
818 | BUILTIN(__builtin_ia32_rdtscp, "UOiUi*" , "" ) |
819 | |
820 | TARGET_BUILTIN(__builtin_ia32_rdpid, "Ui" , "n" , "rdpid" ) |
821 | TARGET_BUILTIN(__builtin_ia32_rdpru, "ULLii" , "n" , "rdpru" ) |
822 | |
823 | // PKU |
824 | TARGET_BUILTIN(__builtin_ia32_rdpkru, "Ui" , "n" , "pku" ) |
825 | TARGET_BUILTIN(__builtin_ia32_wrpkru, "vUi" , "n" , "pku" ) |
826 | |
827 | // AVX-512 |
828 | TARGET_BUILTIN(__builtin_ia32_sqrtpd512, "V8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
829 | TARGET_BUILTIN(__builtin_ia32_sqrtps512, "V16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
830 | TARGET_BUILTIN(__builtin_ia32_rsqrt14sd_mask, "V2dV2dV2dV2dUc" , "ncV:128:" , "avx512f" ) |
831 | TARGET_BUILTIN(__builtin_ia32_rsqrt14ss_mask, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512f" ) |
832 | TARGET_BUILTIN(__builtin_ia32_rsqrt14pd512_mask, "V8dV8dV8dUc" , "ncV:512:" , "avx512f,evex512" ) |
833 | TARGET_BUILTIN(__builtin_ia32_rsqrt14ps512_mask, "V16fV16fV16fUs" , "ncV:512:" , "avx512f,evex512" ) |
834 | |
835 | TARGET_BUILTIN(__builtin_ia32_rsqrt28sd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512er" ) |
836 | TARGET_BUILTIN(__builtin_ia32_rsqrt28ss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512er" ) |
837 | TARGET_BUILTIN(__builtin_ia32_rsqrt28pd_mask, "V8dV8dV8dUcIi" , "ncV:512:" , "avx512er,evex512" ) |
838 | TARGET_BUILTIN(__builtin_ia32_rsqrt28ps_mask, "V16fV16fV16fUsIi" , "ncV:512:" , "avx512er,evex512" ) |
839 | |
840 | TARGET_BUILTIN(__builtin_ia32_rcp14sd_mask, "V2dV2dV2dV2dUc" , "ncV:128:" , "avx512f" ) |
841 | TARGET_BUILTIN(__builtin_ia32_rcp14ss_mask, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512f" ) |
842 | TARGET_BUILTIN(__builtin_ia32_rcp14pd512_mask, "V8dV8dV8dUc" , "ncV:512:" , "avx512f,evex512" ) |
843 | TARGET_BUILTIN(__builtin_ia32_rcp14ps512_mask, "V16fV16fV16fUs" , "ncV:512:" , "avx512f,evex512" ) |
844 | |
845 | TARGET_BUILTIN(__builtin_ia32_rcp28sd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512er" ) |
846 | TARGET_BUILTIN(__builtin_ia32_rcp28ss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512er" ) |
847 | TARGET_BUILTIN(__builtin_ia32_rcp28pd_mask, "V8dV8dV8dUcIi" , "ncV:512:" , "avx512er,evex512" ) |
848 | TARGET_BUILTIN(__builtin_ia32_rcp28ps_mask, "V16fV16fV16fUsIi" , "ncV:512:" , "avx512er,evex512" ) |
849 | TARGET_BUILTIN(__builtin_ia32_exp2pd_mask, "V8dV8dV8dUcIi" , "ncV:512:" , "avx512er,evex512" ) |
850 | TARGET_BUILTIN(__builtin_ia32_exp2ps_mask, "V16fV16fV16fUsIi" , "ncV:512:" , "avx512er,evex512" ) |
851 | |
852 | TARGET_BUILTIN(__builtin_ia32_cvttps2dq512_mask, "V16iV16fV16iUsIi" , "ncV:512:" , "avx512f,evex512" ) |
853 | TARGET_BUILTIN(__builtin_ia32_cvttps2udq512_mask, "V16iV16fV16iUsIi" , "ncV:512:" , "avx512f,evex512" ) |
854 | TARGET_BUILTIN(__builtin_ia32_cvttpd2dq512_mask, "V8iV8dV8iUcIi" , "ncV:512:" , "avx512f,evex512" ) |
855 | TARGET_BUILTIN(__builtin_ia32_cvttpd2udq512_mask, "V8iV8dV8iUcIi" , "ncV:512:" , "avx512f,evex512" ) |
856 | |
857 | TARGET_BUILTIN(__builtin_ia32_cmpps512_mask, "UsV16fV16fIiUsIi" , "ncV:512:" , "avx512f,evex512" ) |
858 | TARGET_BUILTIN(__builtin_ia32_cmpps256_mask, "UcV8fV8fIiUc" , "ncV:256:" , "avx512vl" ) |
859 | TARGET_BUILTIN(__builtin_ia32_cmpps128_mask, "UcV4fV4fIiUc" , "ncV:128:" , "avx512vl" ) |
860 | TARGET_BUILTIN(__builtin_ia32_cmppd512_mask, "UcV8dV8dIiUcIi" , "ncV:512:" , "avx512f,evex512" ) |
861 | TARGET_BUILTIN(__builtin_ia32_cmppd256_mask, "UcV4dV4dIiUc" , "ncV:256:" , "avx512vl" ) |
862 | TARGET_BUILTIN(__builtin_ia32_cmppd128_mask, "UcV2dV2dIiUc" , "ncV:128:" , "avx512vl" ) |
863 | |
864 | TARGET_BUILTIN(__builtin_ia32_rndscaleps_mask, "V16fV16fIiV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
865 | TARGET_BUILTIN(__builtin_ia32_rndscalepd_mask, "V8dV8dIiV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
866 | TARGET_BUILTIN(__builtin_ia32_cvtps2dq512_mask, "V16iV16fV16iUsIi" , "ncV:512:" , "avx512f,evex512" ) |
867 | TARGET_BUILTIN(__builtin_ia32_cvtpd2dq512_mask, "V8iV8dV8iUcIi" , "ncV:512:" , "avx512f,evex512" ) |
868 | TARGET_BUILTIN(__builtin_ia32_cvtps2udq512_mask, "V16iV16fV16iUsIi" , "ncV:512:" , "avx512f,evex512" ) |
869 | TARGET_BUILTIN(__builtin_ia32_cvtpd2udq512_mask, "V8iV8dV8iUcIi" , "ncV:512:" , "avx512f,evex512" ) |
870 | TARGET_BUILTIN(__builtin_ia32_minps512, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
871 | TARGET_BUILTIN(__builtin_ia32_minpd512, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
872 | TARGET_BUILTIN(__builtin_ia32_maxps512, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
873 | TARGET_BUILTIN(__builtin_ia32_maxpd512, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
874 | TARGET_BUILTIN(__builtin_ia32_cvtdq2ps512_mask, "V16fV16iV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
875 | TARGET_BUILTIN(__builtin_ia32_cvtudq2ps512_mask, "V16fV16iV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
876 | TARGET_BUILTIN(__builtin_ia32_cvtpd2ps512_mask, "V8fV8dV8fUcIi" , "ncV:512:" , "avx512f,evex512" ) |
877 | TARGET_BUILTIN(__builtin_ia32_vcvtps2ph512_mask, "V16sV16fIiV16sUs" , "ncV:512:" , "avx512f,evex512" ) |
878 | TARGET_BUILTIN(__builtin_ia32_vcvtph2ps512_mask, "V16fV16sV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
879 | TARGET_BUILTIN(__builtin_ia32_pmuldq512, "V8OiV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
880 | TARGET_BUILTIN(__builtin_ia32_pmuludq512, "V8OiV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
881 | TARGET_BUILTIN(__builtin_ia32_loaddqusi512_mask, "V16iiC*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
882 | TARGET_BUILTIN(__builtin_ia32_loaddqudi512_mask, "V8OiOiC*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
883 | TARGET_BUILTIN(__builtin_ia32_loadups512_mask, "V16ffC*V16fUs" , "nV:512:" , "avx512f,evex512" ) |
884 | TARGET_BUILTIN(__builtin_ia32_loadaps512_mask, "V16fV16fC*V16fUs" , "nV:512:" , "avx512f,evex512" ) |
885 | TARGET_BUILTIN(__builtin_ia32_loadupd512_mask, "V8ddC*V8dUc" , "nV:512:" , "avx512f,evex512" ) |
886 | TARGET_BUILTIN(__builtin_ia32_loadapd512_mask, "V8dV8dC*V8dUc" , "nV:512:" , "avx512f,evex512" ) |
887 | TARGET_BUILTIN(__builtin_ia32_storedqudi512_mask, "vOi*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
888 | TARGET_BUILTIN(__builtin_ia32_storedqusi512_mask, "vi*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
889 | TARGET_BUILTIN(__builtin_ia32_storeupd512_mask, "vd*V8dUc" , "nV:512:" , "avx512f,evex512" ) |
890 | TARGET_BUILTIN(__builtin_ia32_storeapd512_mask, "vV8d*V8dUc" , "nV:512:" , "avx512f,evex512" ) |
891 | TARGET_BUILTIN(__builtin_ia32_storeups512_mask, "vf*V16fUs" , "nV:512:" , "avx512f,evex512" ) |
892 | TARGET_BUILTIN(__builtin_ia32_storeaps512_mask, "vV16f*V16fUs" , "nV:512:" , "avx512f,evex512" ) |
893 | TARGET_BUILTIN(__builtin_ia32_alignq512, "V8OiV8OiV8OiIi" , "ncV:512:" , "avx512f,evex512" ) |
894 | TARGET_BUILTIN(__builtin_ia32_alignd512, "V16iV16iV16iIi" , "ncV:512:" , "avx512f,evex512" ) |
895 | TARGET_BUILTIN(__builtin_ia32_alignd128, "V4iV4iV4iIi" , "ncV:128:" , "avx512vl" ) |
896 | TARGET_BUILTIN(__builtin_ia32_alignd256, "V8iV8iV8iIi" , "ncV:256:" , "avx512vl" ) |
897 | TARGET_BUILTIN(__builtin_ia32_alignq128, "V2OiV2OiV2OiIi" , "ncV:128:" , "avx512vl" ) |
898 | TARGET_BUILTIN(__builtin_ia32_alignq256, "V4OiV4OiV4OiIi" , "ncV:256:" , "avx512vl" ) |
899 | TARGET_BUILTIN(__builtin_ia32_extractf64x4_mask, "V4dV8dIiV4dUc" , "ncV:512:" , "avx512f,evex512" ) |
900 | TARGET_BUILTIN(__builtin_ia32_extractf32x4_mask, "V4fV16fIiV4fUc" , "ncV:512:" , "avx512f,evex512" ) |
901 | |
902 | // AVX-VNNI and AVX512-VNNI |
903 | TARGET_BUILTIN(__builtin_ia32_vpdpbusd128, "V4iV4iV4iV4i" , "ncV:128:" , "avx512vl,avx512vnni|avxvnni" ) |
904 | TARGET_BUILTIN(__builtin_ia32_vpdpbusd256, "V8iV8iV8iV8i" , "ncV:256:" , "avx512vl,avx512vnni|avxvnni" ) |
905 | TARGET_BUILTIN(__builtin_ia32_vpdpbusd512, "V16iV16iV16iV16i" , "ncV:512:" , "avx512vnni,evex512" ) |
906 | TARGET_BUILTIN(__builtin_ia32_vpdpbusds128, "V4iV4iV4iV4i" , "ncV:128:" , "avx512vl,avx512vnni|avxvnni" ) |
907 | TARGET_BUILTIN(__builtin_ia32_vpdpbusds256, "V8iV8iV8iV8i" , "ncV:256:" , "avx512vl,avx512vnni|avxvnni" ) |
908 | TARGET_BUILTIN(__builtin_ia32_vpdpbusds512, "V16iV16iV16iV16i" , "ncV:512:" , "avx512vnni,evex512" ) |
909 | TARGET_BUILTIN(__builtin_ia32_vpdpwssd128, "V4iV4iV4iV4i" , "ncV:128:" , "avx512vl,avx512vnni|avxvnni" ) |
910 | TARGET_BUILTIN(__builtin_ia32_vpdpwssd256, "V8iV8iV8iV8i" , "ncV:256:" , "avx512vl,avx512vnni|avxvnni" ) |
911 | TARGET_BUILTIN(__builtin_ia32_vpdpwssd512, "V16iV16iV16iV16i" , "ncV:512:" , "avx512vnni,evex512" ) |
912 | TARGET_BUILTIN(__builtin_ia32_vpdpwssds128, "V4iV4iV4iV4i" , "ncV:128:" , "avx512vl,avx512vnni|avxvnni" ) |
913 | TARGET_BUILTIN(__builtin_ia32_vpdpwssds256, "V8iV8iV8iV8i" , "ncV:256:" , "avx512vl,avx512vnni|avxvnni" ) |
914 | TARGET_BUILTIN(__builtin_ia32_vpdpwssds512, "V16iV16iV16iV16i" , "ncV:512:" , "avx512vnni,evex512" ) |
915 | |
916 | // AVX-VNNI-INT8 |
917 | TARGET_BUILTIN(__builtin_ia32_vpdpbssd128, "V4iV4iV4iV4i" , "ncV:128:" , "avxvnniint8" ) |
918 | TARGET_BUILTIN(__builtin_ia32_vpdpbssd256, "V8iV8iV8iV8i" , "ncV:256:" , "avxvnniint8" ) |
919 | TARGET_BUILTIN(__builtin_ia32_vpdpbssds128, "V4iV4iV4iV4i" , "ncV:128:" , "avxvnniint8" ) |
920 | TARGET_BUILTIN(__builtin_ia32_vpdpbssds256, "V8iV8iV8iV8i" , "ncV:256:" , "avxvnniint8" ) |
921 | TARGET_BUILTIN(__builtin_ia32_vpdpbsud128, "V4iV4iV4iV4i" , "ncV:128:" , "avxvnniint8" ) |
922 | TARGET_BUILTIN(__builtin_ia32_vpdpbsud256, "V8iV8iV8iV8i" , "ncV:256:" , "avxvnniint8" ) |
923 | TARGET_BUILTIN(__builtin_ia32_vpdpbsuds128, "V4iV4iV4iV4i" , "ncV:128:" , "avxvnniint8" ) |
924 | TARGET_BUILTIN(__builtin_ia32_vpdpbsuds256, "V8iV8iV8iV8i" , "ncV:256:" , "avxvnniint8" ) |
925 | TARGET_BUILTIN(__builtin_ia32_vpdpbuud128, "V4iV4iV4iV4i" , "ncV:128:" , "avxvnniint8" ) |
926 | TARGET_BUILTIN(__builtin_ia32_vpdpbuud256, "V8iV8iV8iV8i" , "ncV:256:" , "avxvnniint8" ) |
927 | TARGET_BUILTIN(__builtin_ia32_vpdpbuuds128, "V4iV4iV4iV4i" , "ncV:128:" , "avxvnniint8" ) |
928 | TARGET_BUILTIN(__builtin_ia32_vpdpbuuds256, "V8iV8iV8iV8i" , "ncV:256:" , "avxvnniint8" ) |
929 | |
930 | TARGET_BUILTIN(__builtin_ia32_gather3div2df, "V2dV2dvC*V2OiUcIi" , "nV:128:" , "avx512vl" ) |
931 | TARGET_BUILTIN(__builtin_ia32_gather3div2di, "V2OiV2OivC*V2OiUcIi" , "nV:128:" , "avx512vl" ) |
932 | TARGET_BUILTIN(__builtin_ia32_gather3div4df, "V4dV4dvC*V4OiUcIi" , "nV:256:" , "avx512vl" ) |
933 | TARGET_BUILTIN(__builtin_ia32_gather3div4di, "V4OiV4OivC*V4OiUcIi" , "nV:256:" , "avx512vl" ) |
934 | TARGET_BUILTIN(__builtin_ia32_gather3div4sf, "V4fV4fvC*V2OiUcIi" , "nV:128:" , "avx512vl" ) |
935 | TARGET_BUILTIN(__builtin_ia32_gather3div4si, "V4iV4ivC*V2OiUcIi" , "nV:128:" , "avx512vl" ) |
936 | TARGET_BUILTIN(__builtin_ia32_gather3div8sf, "V4fV4fvC*V4OiUcIi" , "nV:256:" , "avx512vl" ) |
937 | TARGET_BUILTIN(__builtin_ia32_gather3div8si, "V4iV4ivC*V4OiUcIi" , "nV:256:" , "avx512vl" ) |
938 | TARGET_BUILTIN(__builtin_ia32_gather3siv2df, "V2dV2dvC*V4iUcIi" , "nV:128:" , "avx512vl" ) |
939 | TARGET_BUILTIN(__builtin_ia32_gather3siv2di, "V2OiV2OivC*V4iUcIi" , "nV:128:" , "avx512vl" ) |
940 | TARGET_BUILTIN(__builtin_ia32_gather3siv4df, "V4dV4dvC*V4iUcIi" , "nV:256:" , "avx512vl" ) |
941 | TARGET_BUILTIN(__builtin_ia32_gather3siv4di, "V4OiV4OivC*V4iUcIi" , "nV:256:" , "avx512vl" ) |
942 | TARGET_BUILTIN(__builtin_ia32_gather3siv4sf, "V4fV4fvC*V4iUcIi" , "nV:128:" , "avx512vl" ) |
943 | TARGET_BUILTIN(__builtin_ia32_gather3siv4si, "V4iV4ivC*V4iUcIi" , "nV:128:" , "avx512vl" ) |
944 | TARGET_BUILTIN(__builtin_ia32_gather3siv8sf, "V8fV8fvC*V8iUcIi" , "nV:256:" , "avx512vl" ) |
945 | TARGET_BUILTIN(__builtin_ia32_gather3siv8si, "V8iV8ivC*V8iUcIi" , "nV:256:" , "avx512vl" ) |
946 | TARGET_BUILTIN(__builtin_ia32_gathersiv8df, "V8dV8dvC*V8iUcIi" , "nV:512:" , "avx512f,evex512" ) |
947 | TARGET_BUILTIN(__builtin_ia32_gathersiv16sf, "V16fV16fvC*V16iUsIi" , "nV:512:" , "avx512f,evex512" ) |
948 | TARGET_BUILTIN(__builtin_ia32_gatherdiv8df, "V8dV8dvC*V8OiUcIi" , "nV:512:" , "avx512f,evex512" ) |
949 | TARGET_BUILTIN(__builtin_ia32_gatherdiv16sf, "V8fV8fvC*V8OiUcIi" , "nV:512:" , "avx512f,evex512" ) |
950 | TARGET_BUILTIN(__builtin_ia32_gathersiv8di, "V8OiV8OivC*V8iUcIi" , "nV:512:" , "avx512f,evex512" ) |
951 | TARGET_BUILTIN(__builtin_ia32_gathersiv16si, "V16iV16ivC*V16iUsIi" , "nV:512:" , "avx512f,evex512" ) |
952 | TARGET_BUILTIN(__builtin_ia32_gatherdiv8di, "V8OiV8OivC*V8OiUcIi" , "nV:512:" , "avx512f,evex512" ) |
953 | TARGET_BUILTIN(__builtin_ia32_gatherdiv16si, "V8iV8ivC*V8OiUcIi" , "nV:512:" , "avx512f,evex512" ) |
954 | TARGET_BUILTIN(__builtin_ia32_scattersiv8df, "vv*UcV8iV8dIi" , "nV:512:" , "avx512f,evex512" ) |
955 | TARGET_BUILTIN(__builtin_ia32_scattersiv16sf, "vv*UsV16iV16fIi" , "nV:512:" , "avx512f,evex512" ) |
956 | TARGET_BUILTIN(__builtin_ia32_scatterdiv8df, "vv*UcV8OiV8dIi" , "nV:512:" , "avx512f,evex512" ) |
957 | TARGET_BUILTIN(__builtin_ia32_scatterdiv16sf, "vv*UcV8OiV8fIi" , "nV:512:" , "avx512f,evex512" ) |
958 | TARGET_BUILTIN(__builtin_ia32_scattersiv8di, "vv*UcV8iV8OiIi" , "nV:512:" , "avx512f,evex512" ) |
959 | TARGET_BUILTIN(__builtin_ia32_scattersiv16si, "vv*UsV16iV16iIi" , "nV:512:" , "avx512f,evex512" ) |
960 | TARGET_BUILTIN(__builtin_ia32_scatterdiv8di, "vv*UcV8OiV8OiIi" , "nV:512:" , "avx512f,evex512" ) |
961 | TARGET_BUILTIN(__builtin_ia32_scatterdiv16si, "vv*UcV8OiV8iIi" , "nV:512:" , "avx512f,evex512" ) |
962 | |
963 | TARGET_BUILTIN(__builtin_ia32_gatherpfdpd, "vUcV8ivC*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
964 | TARGET_BUILTIN(__builtin_ia32_gatherpfdps, "vUsV16ivC*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
965 | TARGET_BUILTIN(__builtin_ia32_gatherpfqpd, "vUcV8OivC*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
966 | TARGET_BUILTIN(__builtin_ia32_gatherpfqps, "vUcV8OivC*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
967 | TARGET_BUILTIN(__builtin_ia32_scatterpfdpd, "vUcV8iv*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
968 | TARGET_BUILTIN(__builtin_ia32_scatterpfdps, "vUsV16iv*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
969 | TARGET_BUILTIN(__builtin_ia32_scatterpfqpd, "vUcV8Oiv*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
970 | TARGET_BUILTIN(__builtin_ia32_scatterpfqps, "vUcV8Oiv*IiIi" , "nV:512:" , "avx512pf,evex512" ) |
971 | |
972 | TARGET_BUILTIN(__builtin_ia32_knotqi, "UcUc" , "nc" , "avx512dq" ) |
973 | TARGET_BUILTIN(__builtin_ia32_knothi, "UsUs" , "nc" , "avx512f" ) |
974 | TARGET_BUILTIN(__builtin_ia32_knotsi, "UiUi" , "nc" , "avx512bw" ) |
975 | TARGET_BUILTIN(__builtin_ia32_knotdi, "UOiUOi" , "nc" , "avx512bw" ) |
976 | |
977 | TARGET_BUILTIN(__builtin_ia32_cmpb128_mask, "UsV16cV16cIiUs" , "ncV:128:" , "avx512vl,avx512bw" ) |
978 | TARGET_BUILTIN(__builtin_ia32_cmpd128_mask, "UcV4iV4iIiUc" , "ncV:128:" , "avx512vl" ) |
979 | TARGET_BUILTIN(__builtin_ia32_cmpq128_mask, "UcV2OiV2OiIiUc" , "ncV:128:" , "avx512vl" ) |
980 | TARGET_BUILTIN(__builtin_ia32_cmpw128_mask, "UcV8sV8sIiUc" , "ncV:128:" , "avx512vl,avx512bw" ) |
981 | TARGET_BUILTIN(__builtin_ia32_cmpb256_mask, "UiV32cV32cIiUi" , "ncV:256:" , "avx512vl,avx512bw" ) |
982 | TARGET_BUILTIN(__builtin_ia32_cmpd256_mask, "UcV8iV8iIiUc" , "ncV:256:" , "avx512vl" ) |
983 | TARGET_BUILTIN(__builtin_ia32_cmpq256_mask, "UcV4OiV4OiIiUc" , "ncV:256:" , "avx512vl" ) |
984 | TARGET_BUILTIN(__builtin_ia32_cmpw256_mask, "UsV16sV16sIiUs" , "ncV:256:" , "avx512vl,avx512bw" ) |
985 | TARGET_BUILTIN(__builtin_ia32_cmpb512_mask, "UOiV64cV64cIiUOi" , "ncV:512:" , "avx512bw,evex512" ) |
986 | TARGET_BUILTIN(__builtin_ia32_cmpd512_mask, "UsV16iV16iIiUs" , "ncV:512:" , "avx512f,evex512" ) |
987 | TARGET_BUILTIN(__builtin_ia32_cmpq512_mask, "UcV8OiV8OiIiUc" , "ncV:512:" , "avx512f,evex512" ) |
988 | TARGET_BUILTIN(__builtin_ia32_cmpw512_mask, "UiV32sV32sIiUi" , "ncV:512:" , "avx512bw,evex512" ) |
989 | TARGET_BUILTIN(__builtin_ia32_ucmpb128_mask, "UsV16cV16cIiUs" , "ncV:128:" , "avx512vl,avx512bw" ) |
990 | TARGET_BUILTIN(__builtin_ia32_ucmpd128_mask, "UcV4iV4iIiUc" , "ncV:128:" , "avx512vl" ) |
991 | TARGET_BUILTIN(__builtin_ia32_ucmpq128_mask, "UcV2OiV2OiIiUc" , "ncV:128:" , "avx512vl" ) |
992 | TARGET_BUILTIN(__builtin_ia32_ucmpw128_mask, "UcV8sV8sIiUc" , "ncV:128:" , "avx512vl,avx512bw" ) |
993 | TARGET_BUILTIN(__builtin_ia32_ucmpb256_mask, "UiV32cV32cIiUi" , "ncV:256:" , "avx512vl,avx512bw" ) |
994 | TARGET_BUILTIN(__builtin_ia32_ucmpd256_mask, "UcV8iV8iIiUc" , "ncV:256:" , "avx512vl" ) |
995 | TARGET_BUILTIN(__builtin_ia32_ucmpq256_mask, "UcV4OiV4OiIiUc" , "ncV:256:" , "avx512vl" ) |
996 | TARGET_BUILTIN(__builtin_ia32_ucmpw256_mask, "UsV16sV16sIiUs" , "ncV:256:" , "avx512vl,avx512bw" ) |
997 | TARGET_BUILTIN(__builtin_ia32_ucmpb512_mask, "UOiV64cV64cIiUOi" , "ncV:512:" , "avx512bw,evex512" ) |
998 | TARGET_BUILTIN(__builtin_ia32_ucmpd512_mask, "UsV16iV16iIiUs" , "ncV:512:" , "avx512f,evex512" ) |
999 | TARGET_BUILTIN(__builtin_ia32_ucmpq512_mask, "UcV8OiV8OiIiUc" , "ncV:512:" , "avx512f,evex512" ) |
1000 | TARGET_BUILTIN(__builtin_ia32_ucmpw512_mask, "UiV32sV32sIiUi" , "ncV:512:" , "avx512bw,evex512" ) |
1001 | |
1002 | TARGET_BUILTIN(__builtin_ia32_packssdw512, "V32sV16iV16i" , "ncV:512:" , "avx512bw,evex512" ) |
1003 | TARGET_BUILTIN(__builtin_ia32_packsswb512, "V64cV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1004 | TARGET_BUILTIN(__builtin_ia32_packusdw512, "V32sV16iV16i" , "ncV:512:" , "avx512bw,evex512" ) |
1005 | TARGET_BUILTIN(__builtin_ia32_packuswb512, "V64cV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1006 | TARGET_BUILTIN(__builtin_ia32_pavgb512, "V64cV64cV64c" , "ncV:512:" , "avx512bw,evex512" ) |
1007 | TARGET_BUILTIN(__builtin_ia32_pavgw512, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1008 | TARGET_BUILTIN(__builtin_ia32_pshufb512, "V64cV64cV64c" , "ncV:512:" , "avx512bw,evex512" ) |
1009 | |
1010 | TARGET_BUILTIN(__builtin_ia32_vpconflictdi_128, "V2OiV2Oi" , "ncV:128:" , "avx512cd,avx512vl" ) |
1011 | TARGET_BUILTIN(__builtin_ia32_vpconflictdi_256, "V4OiV4Oi" , "ncV:256:" , "avx512cd,avx512vl" ) |
1012 | TARGET_BUILTIN(__builtin_ia32_vpconflictsi_128, "V4iV4i" , "ncV:128:" , "avx512cd,avx512vl" ) |
1013 | TARGET_BUILTIN(__builtin_ia32_vpconflictsi_256, "V8iV8i" , "ncV:256:" , "avx512cd,avx512vl" ) |
1014 | TARGET_BUILTIN(__builtin_ia32_vpconflictdi_512, "V8OiV8Oi" , "ncV:512:" , "avx512cd,evex512" ) |
1015 | TARGET_BUILTIN(__builtin_ia32_vpconflictsi_512, "V16iV16i" , "ncV:512:" , "avx512cd,evex512" ) |
1016 | TARGET_BUILTIN(__builtin_ia32_vplzcntd_512, "V16iV16i" , "ncV:512:" , "avx512cd,evex512" ) |
1017 | TARGET_BUILTIN(__builtin_ia32_vplzcntq_512, "V8OiV8Oi" , "ncV:512:" , "avx512cd,evex512" ) |
1018 | |
1019 | TARGET_BUILTIN(__builtin_ia32_vpopcntd_128, "V4iV4i" , "ncV:128:" , "avx512vpopcntdq,avx512vl" ) |
1020 | TARGET_BUILTIN(__builtin_ia32_vpopcntq_128, "V2OiV2Oi" , "ncV:128:" , "avx512vpopcntdq,avx512vl" ) |
1021 | TARGET_BUILTIN(__builtin_ia32_vpopcntd_256, "V8iV8i" , "ncV:256:" , "avx512vpopcntdq,avx512vl" ) |
1022 | TARGET_BUILTIN(__builtin_ia32_vpopcntq_256, "V4OiV4Oi" , "ncV:256:" , "avx512vpopcntdq,avx512vl" ) |
1023 | TARGET_BUILTIN(__builtin_ia32_vpopcntd_512, "V16iV16i" , "ncV:512:" , "avx512vpopcntdq,evex512" ) |
1024 | TARGET_BUILTIN(__builtin_ia32_vpopcntq_512, "V8OiV8Oi" , "ncV:512:" , "avx512vpopcntdq,evex512" ) |
1025 | |
1026 | TARGET_BUILTIN(__builtin_ia32_vpopcntb_128, "V16cV16c" , "ncV:128:" , "avx512vl,avx512bitalg" ) |
1027 | TARGET_BUILTIN(__builtin_ia32_vpopcntw_128, "V8sV8s" , "ncV:128:" , "avx512vl,avx512bitalg" ) |
1028 | TARGET_BUILTIN(__builtin_ia32_vpopcntb_256, "V32cV32c" , "ncV:256:" , "avx512vl,avx512bitalg" ) |
1029 | TARGET_BUILTIN(__builtin_ia32_vpopcntw_256, "V16sV16s" , "ncV:256:" , "avx512vl,avx512bitalg" ) |
1030 | TARGET_BUILTIN(__builtin_ia32_vpopcntb_512, "V64cV64c" , "ncV:512:" , "avx512bitalg,evex512" ) |
1031 | TARGET_BUILTIN(__builtin_ia32_vpopcntw_512, "V32sV32s" , "ncV:512:" , "avx512bitalg,evex512" ) |
1032 | |
1033 | TARGET_BUILTIN(__builtin_ia32_vpshufbitqmb128_mask, "UsV16cV16cUs" , "ncV:128:" , "avx512vl,avx512bitalg" ) |
1034 | TARGET_BUILTIN(__builtin_ia32_vpshufbitqmb256_mask, "UiV32cV32cUi" , "ncV:256:" , "avx512vl,avx512bitalg" ) |
1035 | TARGET_BUILTIN(__builtin_ia32_vpshufbitqmb512_mask, "UOiV64cV64cUOi" , "ncV:512:" , "avx512bitalg,evex512" ) |
1036 | |
1037 | TARGET_BUILTIN(__builtin_ia32_pmulhrsw512, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1038 | TARGET_BUILTIN(__builtin_ia32_pmulhuw512, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1039 | TARGET_BUILTIN(__builtin_ia32_pmulhw512, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1040 | |
1041 | TARGET_BUILTIN(__builtin_ia32_addpd512, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1042 | TARGET_BUILTIN(__builtin_ia32_addps512, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
1043 | TARGET_BUILTIN(__builtin_ia32_divpd512, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1044 | TARGET_BUILTIN(__builtin_ia32_divps512, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
1045 | TARGET_BUILTIN(__builtin_ia32_mulpd512, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1046 | TARGET_BUILTIN(__builtin_ia32_mulps512, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
1047 | TARGET_BUILTIN(__builtin_ia32_subpd512, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1048 | TARGET_BUILTIN(__builtin_ia32_subps512, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
1049 | |
1050 | TARGET_BUILTIN(__builtin_ia32_pmaddubsw512, "V32sV64cV64c" , "ncV:512:" , "avx512bw,evex512" ) |
1051 | TARGET_BUILTIN(__builtin_ia32_pmaddwd512, "V16iV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1052 | |
1053 | TARGET_BUILTIN(__builtin_ia32_addss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1054 | TARGET_BUILTIN(__builtin_ia32_divss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1055 | TARGET_BUILTIN(__builtin_ia32_mulss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1056 | TARGET_BUILTIN(__builtin_ia32_subss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1057 | TARGET_BUILTIN(__builtin_ia32_maxss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1058 | TARGET_BUILTIN(__builtin_ia32_minss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1059 | TARGET_BUILTIN(__builtin_ia32_addsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1060 | TARGET_BUILTIN(__builtin_ia32_divsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1061 | TARGET_BUILTIN(__builtin_ia32_mulsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1062 | TARGET_BUILTIN(__builtin_ia32_subsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1063 | TARGET_BUILTIN(__builtin_ia32_maxsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1064 | TARGET_BUILTIN(__builtin_ia32_minsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1065 | |
1066 | TARGET_BUILTIN(__builtin_ia32_compressdf128_mask, "V2dV2dV2dUc" , "ncV:128:" , "avx512vl" ) |
1067 | TARGET_BUILTIN(__builtin_ia32_compressdf256_mask, "V4dV4dV4dUc" , "ncV:256:" , "avx512vl" ) |
1068 | TARGET_BUILTIN(__builtin_ia32_compressdi128_mask, "V2OiV2OiV2OiUc" , "ncV:128:" , "avx512vl" ) |
1069 | TARGET_BUILTIN(__builtin_ia32_compressdi256_mask, "V4OiV4OiV4OiUc" , "ncV:256:" , "avx512vl" ) |
1070 | |
1071 | TARGET_BUILTIN(__builtin_ia32_compresshi128_mask, "V8sV8sV8sUc" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1072 | TARGET_BUILTIN(__builtin_ia32_compresshi256_mask, "V16sV16sV16sUs" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1073 | TARGET_BUILTIN(__builtin_ia32_compressqi128_mask, "V16cV16cV16cUs" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1074 | TARGET_BUILTIN(__builtin_ia32_compressqi256_mask, "V32cV32cV32cUi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1075 | |
1076 | TARGET_BUILTIN(__builtin_ia32_compresssf128_mask, "V4fV4fV4fUc" , "ncV:128:" , "avx512vl" ) |
1077 | TARGET_BUILTIN(__builtin_ia32_compresssf256_mask, "V8fV8fV8fUc" , "ncV:256:" , "avx512vl" ) |
1078 | TARGET_BUILTIN(__builtin_ia32_compresssi128_mask, "V4iV4iV4iUc" , "ncV:128:" , "avx512vl" ) |
1079 | TARGET_BUILTIN(__builtin_ia32_compresssi256_mask, "V8iV8iV8iUc" , "ncV:256:" , "avx512vl" ) |
1080 | TARGET_BUILTIN(__builtin_ia32_compressstoredf128_mask, "vV2d*V2dUc" , "nV:128:" , "avx512vl" ) |
1081 | TARGET_BUILTIN(__builtin_ia32_compressstoredf256_mask, "vV4d*V4dUc" , "nV:256:" , "avx512vl" ) |
1082 | TARGET_BUILTIN(__builtin_ia32_compressstoredi128_mask, "vV2Oi*V2OiUc" , "nV:128:" , "avx512vl" ) |
1083 | TARGET_BUILTIN(__builtin_ia32_compressstoredi256_mask, "vV4Oi*V4OiUc" , "nV:256:" , "avx512vl" ) |
1084 | |
1085 | TARGET_BUILTIN(__builtin_ia32_compressstorehi128_mask, "vV8s*V8sUc" , "nV:128:" , "avx512vl,avx512vbmi2" ) |
1086 | TARGET_BUILTIN(__builtin_ia32_compressstorehi256_mask, "vV16s*V16sUs" , "nV:256:" , "avx512vl,avx512vbmi2" ) |
1087 | TARGET_BUILTIN(__builtin_ia32_compressstoreqi128_mask, "vV16c*V16cUs" , "nV:128:" , "avx512vl,avx512vbmi2" ) |
1088 | TARGET_BUILTIN(__builtin_ia32_compressstoreqi256_mask, "vV32c*V32cUi" , "nV:256:" , "avx512vl,avx512vbmi2" ) |
1089 | |
1090 | TARGET_BUILTIN(__builtin_ia32_compressstoresf128_mask, "vV4f*V4fUc" , "nV:128:" , "avx512vl" ) |
1091 | TARGET_BUILTIN(__builtin_ia32_compressstoresf256_mask, "vV8f*V8fUc" , "nV:256:" , "avx512vl" ) |
1092 | TARGET_BUILTIN(__builtin_ia32_compressstoresi128_mask, "vV4i*V4iUc" , "nV:128:" , "avx512vl" ) |
1093 | TARGET_BUILTIN(__builtin_ia32_compressstoresi256_mask, "vV8i*V8iUc" , "nV:256:" , "avx512vl" ) |
1094 | TARGET_BUILTIN(__builtin_ia32_cvtpd2dq128_mask, "V4iV2dV4iUc" , "ncV:128:" , "avx512vl" ) |
1095 | TARGET_BUILTIN(__builtin_ia32_cvtpd2ps_mask, "V4fV2dV4fUc" , "ncV:128:" , "avx512vl" ) |
1096 | TARGET_BUILTIN(__builtin_ia32_cvtpd2udq128_mask, "V4iV2dV4iUc" , "ncV:128:" , "avx512vl" ) |
1097 | TARGET_BUILTIN(__builtin_ia32_cvtpd2udq256_mask, "V4iV4dV4iUc" , "ncV:256:" , "avx512vl" ) |
1098 | TARGET_BUILTIN(__builtin_ia32_cvtps2udq128_mask, "V4iV4fV4iUc" , "ncV:128:" , "avx512vl" ) |
1099 | TARGET_BUILTIN(__builtin_ia32_cvtps2udq256_mask, "V8iV8fV8iUc" , "ncV:256:" , "avx512vl" ) |
1100 | TARGET_BUILTIN(__builtin_ia32_cvttpd2dq128_mask, "V4iV2dV4iUc" , "ncV:128:" , "avx512vl" ) |
1101 | TARGET_BUILTIN(__builtin_ia32_cvttpd2udq128_mask, "V4iV2dV4iUc" , "ncV:128:" , "avx512vl" ) |
1102 | TARGET_BUILTIN(__builtin_ia32_cvttpd2udq256_mask, "V4iV4dV4iUc" , "ncV:256:" , "avx512vl" ) |
1103 | TARGET_BUILTIN(__builtin_ia32_cvttps2udq128_mask, "V4iV4fV4iUc" , "ncV:128:" , "avx512vl" ) |
1104 | TARGET_BUILTIN(__builtin_ia32_cvttps2udq256_mask, "V8iV8fV8iUc" , "ncV:256:" , "avx512vl" ) |
1105 | TARGET_BUILTIN(__builtin_ia32_expanddf128_mask, "V2dV2dV2dUc" , "ncV:128:" , "avx512vl" ) |
1106 | TARGET_BUILTIN(__builtin_ia32_expanddf256_mask, "V4dV4dV4dUc" , "ncV:256:" , "avx512vl" ) |
1107 | TARGET_BUILTIN(__builtin_ia32_expanddi128_mask, "V2OiV2OiV2OiUc" , "ncV:128:" , "avx512vl" ) |
1108 | TARGET_BUILTIN(__builtin_ia32_expanddi256_mask, "V4OiV4OiV4OiUc" , "ncV:256:" , "avx512vl" ) |
1109 | |
1110 | TARGET_BUILTIN(__builtin_ia32_expandhi128_mask, "V8sV8sV8sUc" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1111 | TARGET_BUILTIN(__builtin_ia32_expandhi256_mask, "V16sV16sV16sUs" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1112 | TARGET_BUILTIN(__builtin_ia32_expandqi128_mask, "V16cV16cV16cUs" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1113 | TARGET_BUILTIN(__builtin_ia32_expandqi256_mask, "V32cV32cV32cUi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1114 | |
1115 | TARGET_BUILTIN(__builtin_ia32_expandloaddf128_mask, "V2dV2dC*V2dUc" , "nV:128:" , "avx512vl" ) |
1116 | TARGET_BUILTIN(__builtin_ia32_expandloaddf256_mask, "V4dV4dC*V4dUc" , "nV:256:" , "avx512vl" ) |
1117 | TARGET_BUILTIN(__builtin_ia32_expandloaddi128_mask, "V4iV2OiC*V2OiUc" , "nV:128:" , "avx512vl" ) |
1118 | TARGET_BUILTIN(__builtin_ia32_expandloaddi256_mask, "V4OiV4OiC*V4OiUc" , "nV:256:" , "avx512vl" ) |
1119 | |
1120 | TARGET_BUILTIN(__builtin_ia32_expandloadhi128_mask, "V8sV8sC*V8sUc" , "nV:128:" , "avx512vl,avx512vbmi2" ) |
1121 | TARGET_BUILTIN(__builtin_ia32_expandloadhi256_mask, "V16sV16sC*V16sUs" , "nV:256:" , "avx512vl,avx512vbmi2" ) |
1122 | TARGET_BUILTIN(__builtin_ia32_expandloadqi128_mask, "V16cV16cC*V16cUs" , "nV:128:" , "avx512vl,avx512vbmi2" ) |
1123 | TARGET_BUILTIN(__builtin_ia32_expandloadqi256_mask, "V32cV32cC*V32cUi" , "nV:256:" , "avx512vl,avx512vbmi2" ) |
1124 | |
1125 | TARGET_BUILTIN(__builtin_ia32_expandloadsf128_mask, "V4fV4fC*V4fUc" , "nV:128:" , "avx512vl" ) |
1126 | TARGET_BUILTIN(__builtin_ia32_expandloadsf256_mask, "V8fV8fC*V8fUc" , "nV:256:" , "avx512vl" ) |
1127 | TARGET_BUILTIN(__builtin_ia32_expandloadsi128_mask, "V4iV4iC*V4iUc" , "nV:128:" , "avx512vl" ) |
1128 | TARGET_BUILTIN(__builtin_ia32_expandloadsi256_mask, "V8iV8iC*V8iUc" , "nV:256:" , "avx512vl" ) |
1129 | TARGET_BUILTIN(__builtin_ia32_expandsf128_mask, "V4fV4fV4fUc" , "ncV:128:" , "avx512vl" ) |
1130 | TARGET_BUILTIN(__builtin_ia32_expandsf256_mask, "V8fV8fV8fUc" , "ncV:256:" , "avx512vl" ) |
1131 | TARGET_BUILTIN(__builtin_ia32_expandsi128_mask, "V4iV4iV4iUc" , "ncV:128:" , "avx512vl" ) |
1132 | TARGET_BUILTIN(__builtin_ia32_expandsi256_mask, "V8iV8iV8iUc" , "ncV:256:" , "avx512vl" ) |
1133 | TARGET_BUILTIN(__builtin_ia32_getexppd128_mask, "V2dV2dV2dUc" , "ncV:128:" , "avx512vl" ) |
1134 | TARGET_BUILTIN(__builtin_ia32_getexppd256_mask, "V4dV4dV4dUc" , "ncV:256:" , "avx512vl" ) |
1135 | TARGET_BUILTIN(__builtin_ia32_getexpps128_mask, "V4fV4fV4fUc" , "ncV:128:" , "avx512vl" ) |
1136 | TARGET_BUILTIN(__builtin_ia32_getexpps256_mask, "V8fV8fV8fUc" , "ncV:256:" , "avx512vl" ) |
1137 | TARGET_BUILTIN(__builtin_ia32_rndscalepd_128_mask, "V2dV2dIiV2dUc" , "ncV:128:" , "avx512vl" ) |
1138 | TARGET_BUILTIN(__builtin_ia32_rndscalepd_256_mask, "V4dV4dIiV4dUc" , "ncV:256:" , "avx512vl" ) |
1139 | TARGET_BUILTIN(__builtin_ia32_rndscaleps_128_mask, "V4fV4fIiV4fUc" , "ncV:128:" , "avx512vl" ) |
1140 | TARGET_BUILTIN(__builtin_ia32_rndscaleps_256_mask, "V8fV8fIiV8fUc" , "ncV:256:" , "avx512vl" ) |
1141 | TARGET_BUILTIN(__builtin_ia32_scalefpd128_mask, "V2dV2dV2dV2dUc" , "ncV:128:" , "avx512vl" ) |
1142 | TARGET_BUILTIN(__builtin_ia32_scalefpd256_mask, "V4dV4dV4dV4dUc" , "ncV:256:" , "avx512vl" ) |
1143 | TARGET_BUILTIN(__builtin_ia32_scalefps128_mask, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512vl" ) |
1144 | TARGET_BUILTIN(__builtin_ia32_scalefps256_mask, "V8fV8fV8fV8fUc" , "ncV:256:" , "avx512vl" ) |
1145 | |
1146 | TARGET_BUILTIN(__builtin_ia32_scatterdiv2df, "vv*UcV2OiV2dIi" , "nV:128:" , "avx512vl" ) |
1147 | TARGET_BUILTIN(__builtin_ia32_scatterdiv2di, "vv*UcV2OiV2OiIi" , "nV:128:" , "avx512vl" ) |
1148 | TARGET_BUILTIN(__builtin_ia32_scatterdiv4df, "vv*UcV4OiV4dIi" , "nV:256:" , "avx512vl" ) |
1149 | TARGET_BUILTIN(__builtin_ia32_scatterdiv4di, "vv*UcV4OiV4OiIi" , "nV:256:" , "avx512vl" ) |
1150 | TARGET_BUILTIN(__builtin_ia32_scatterdiv4sf, "vv*UcV2OiV4fIi" , "nV:128:" , "avx512vl" ) |
1151 | TARGET_BUILTIN(__builtin_ia32_scatterdiv4si, "vv*UcV2OiV4iIi" , "nV:128:" , "avx512vl" ) |
1152 | TARGET_BUILTIN(__builtin_ia32_scatterdiv8sf, "vv*UcV4OiV4fIi" , "nV:256:" , "avx512vl" ) |
1153 | TARGET_BUILTIN(__builtin_ia32_scatterdiv8si, "vv*UcV4OiV4iIi" , "nV:256:" , "avx512vl" ) |
1154 | TARGET_BUILTIN(__builtin_ia32_scattersiv2df, "vv*UcV4iV2dIi" , "nV:128:" , "avx512vl" ) |
1155 | TARGET_BUILTIN(__builtin_ia32_scattersiv2di, "vv*UcV4iV2OiIi" , "nV:128:" , "avx512vl" ) |
1156 | TARGET_BUILTIN(__builtin_ia32_scattersiv4df, "vv*UcV4iV4dIi" , "nV:256:" , "avx512vl" ) |
1157 | TARGET_BUILTIN(__builtin_ia32_scattersiv4di, "vv*UcV4iV4OiIi" , "nV:256:" , "avx512vl" ) |
1158 | TARGET_BUILTIN(__builtin_ia32_scattersiv4sf, "vv*UcV4iV4fIi" , "nV:128:" , "avx512vl" ) |
1159 | TARGET_BUILTIN(__builtin_ia32_scattersiv4si, "vv*UcV4iV4iIi" , "nV:128:" , "avx512vl" ) |
1160 | TARGET_BUILTIN(__builtin_ia32_scattersiv8sf, "vv*UcV8iV8fIi" , "nV:256:" , "avx512vl" ) |
1161 | TARGET_BUILTIN(__builtin_ia32_scattersiv8si, "vv*UcV8iV8iIi" , "nV:256:" , "avx512vl" ) |
1162 | |
1163 | TARGET_BUILTIN(__builtin_ia32_vpermi2vard128, "V4iV4iV4iV4i" , "ncV:128:" , "avx512vl" ) |
1164 | TARGET_BUILTIN(__builtin_ia32_vpermi2vard256, "V8iV8iV8iV8i" , "ncV:256:" , "avx512vl" ) |
1165 | TARGET_BUILTIN(__builtin_ia32_vpermi2vard512, "V16iV16iV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1166 | TARGET_BUILTIN(__builtin_ia32_vpermi2varpd128, "V2dV2dV2OiV2d" , "ncV:128:" , "avx512vl" ) |
1167 | TARGET_BUILTIN(__builtin_ia32_vpermi2varpd256, "V4dV4dV4OiV4d" , "ncV:256:" , "avx512vl" ) |
1168 | TARGET_BUILTIN(__builtin_ia32_vpermi2varpd512, "V8dV8dV8OiV8d" , "ncV:512:" , "avx512f,evex512" ) |
1169 | TARGET_BUILTIN(__builtin_ia32_vpermi2varps128, "V4fV4fV4iV4f" , "ncV:128:" , "avx512vl" ) |
1170 | TARGET_BUILTIN(__builtin_ia32_vpermi2varps256, "V8fV8fV8iV8f" , "ncV:256:" , "avx512vl" ) |
1171 | TARGET_BUILTIN(__builtin_ia32_vpermi2varps512, "V16fV16fV16iV16f" , "ncV:512:" , "avx512f,evex512" ) |
1172 | TARGET_BUILTIN(__builtin_ia32_vpermi2varq128, "V2OiV2OiV2OiV2Oi" , "ncV:128:" , "avx512vl" ) |
1173 | TARGET_BUILTIN(__builtin_ia32_vpermi2varq256, "V4OiV4OiV4OiV4Oi" , "ncV:256:" , "avx512vl" ) |
1174 | TARGET_BUILTIN(__builtin_ia32_vpermi2varq512, "V8OiV8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1175 | TARGET_BUILTIN(__builtin_ia32_vpermi2varqi128, "V16cV16cV16cV16c" , "ncV:128:" , "avx512vbmi,avx512vl" ) |
1176 | TARGET_BUILTIN(__builtin_ia32_vpermi2varqi256, "V32cV32cV32cV32c" , "ncV:256:" , "avx512vbmi,avx512vl" ) |
1177 | TARGET_BUILTIN(__builtin_ia32_vpermi2varqi512, "V64cV64cV64cV64c" , "ncV:512:" , "avx512vbmi,evex512" ) |
1178 | TARGET_BUILTIN(__builtin_ia32_vpermi2varhi128, "V8sV8sV8sV8s" , "ncV:128:" , "avx512vl,avx512bw" ) |
1179 | TARGET_BUILTIN(__builtin_ia32_vpermi2varhi256, "V16sV16sV16sV16s" , "ncV:256:" , "avx512vl,avx512bw" ) |
1180 | TARGET_BUILTIN(__builtin_ia32_vpermi2varhi512, "V32sV32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1181 | |
1182 | TARGET_BUILTIN(__builtin_ia32_vpshldd128, "V4iV4iV4iIi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1183 | TARGET_BUILTIN(__builtin_ia32_vpshldd256, "V8iV8iV8iIi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1184 | TARGET_BUILTIN(__builtin_ia32_vpshldd512, "V16iV16iV16iIi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1185 | TARGET_BUILTIN(__builtin_ia32_vpshldq128, "V2OiV2OiV2OiIi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1186 | TARGET_BUILTIN(__builtin_ia32_vpshldq256, "V4OiV4OiV4OiIi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1187 | TARGET_BUILTIN(__builtin_ia32_vpshldq512, "V8OiV8OiV8OiIi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1188 | TARGET_BUILTIN(__builtin_ia32_vpshldw128, "V8sV8sV8sIi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1189 | TARGET_BUILTIN(__builtin_ia32_vpshldw256, "V16sV16sV16sIi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1190 | TARGET_BUILTIN(__builtin_ia32_vpshldw512, "V32sV32sV32sIi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1191 | |
1192 | TARGET_BUILTIN(__builtin_ia32_vpshldvd128, "V4iV4iV4iV4i" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1193 | TARGET_BUILTIN(__builtin_ia32_vpshldvd256, "V8iV8iV8iV8i" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1194 | TARGET_BUILTIN(__builtin_ia32_vpshldvd512, "V16iV16iV16iV16i" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1195 | TARGET_BUILTIN(__builtin_ia32_vpshldvq128, "V2OiV2OiV2OiV2Oi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1196 | TARGET_BUILTIN(__builtin_ia32_vpshldvq256, "V4OiV4OiV4OiV4Oi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1197 | TARGET_BUILTIN(__builtin_ia32_vpshldvq512, "V8OiV8OiV8OiV8Oi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1198 | TARGET_BUILTIN(__builtin_ia32_vpshldvw128, "V8sV8sV8sV8s" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1199 | TARGET_BUILTIN(__builtin_ia32_vpshldvw256, "V16sV16sV16sV16s" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1200 | TARGET_BUILTIN(__builtin_ia32_vpshldvw512, "V32sV32sV32sV32s" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1201 | |
1202 | TARGET_BUILTIN(__builtin_ia32_vpshrdvd128, "V4iV4iV4iV4i" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1203 | TARGET_BUILTIN(__builtin_ia32_vpshrdvd256, "V8iV8iV8iV8i" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1204 | TARGET_BUILTIN(__builtin_ia32_vpshrdvd512, "V16iV16iV16iV16i" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1205 | TARGET_BUILTIN(__builtin_ia32_vpshrdvq128, "V2OiV2OiV2OiV2Oi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1206 | TARGET_BUILTIN(__builtin_ia32_vpshrdvq256, "V4OiV4OiV4OiV4Oi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1207 | TARGET_BUILTIN(__builtin_ia32_vpshrdvq512, "V8OiV8OiV8OiV8Oi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1208 | TARGET_BUILTIN(__builtin_ia32_vpshrdvw128, "V8sV8sV8sV8s" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1209 | TARGET_BUILTIN(__builtin_ia32_vpshrdvw256, "V16sV16sV16sV16s" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1210 | TARGET_BUILTIN(__builtin_ia32_vpshrdvw512, "V32sV32sV32sV32s" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1211 | |
1212 | TARGET_BUILTIN(__builtin_ia32_vpshrdd128, "V4iV4iV4iIi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1213 | TARGET_BUILTIN(__builtin_ia32_vpshrdd256, "V8iV8iV8iIi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1214 | TARGET_BUILTIN(__builtin_ia32_vpshrdd512, "V16iV16iV16iIi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1215 | TARGET_BUILTIN(__builtin_ia32_vpshrdq128, "V2OiV2OiV2OiIi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1216 | TARGET_BUILTIN(__builtin_ia32_vpshrdq256, "V4OiV4OiV4OiIi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1217 | TARGET_BUILTIN(__builtin_ia32_vpshrdq512, "V8OiV8OiV8OiIi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1218 | TARGET_BUILTIN(__builtin_ia32_vpshrdw128, "V8sV8sV8sIi" , "ncV:128:" , "avx512vl,avx512vbmi2" ) |
1219 | TARGET_BUILTIN(__builtin_ia32_vpshrdw256, "V16sV16sV16sIi" , "ncV:256:" , "avx512vl,avx512vbmi2" ) |
1220 | TARGET_BUILTIN(__builtin_ia32_vpshrdw512, "V32sV32sV32sIi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1221 | |
1222 | TARGET_BUILTIN(__builtin_ia32_pmovswb512_mask, "V32cV32sV32cUi" , "ncV:512:" , "avx512bw,evex512" ) |
1223 | TARGET_BUILTIN(__builtin_ia32_pmovuswb512_mask, "V32cV32sV32cUi" , "ncV:512:" , "avx512bw,evex512" ) |
1224 | TARGET_BUILTIN(__builtin_ia32_pmovwb512_mask, "V32cV32sV32cUi" , "ncV:512:" , "avx512bw,evex512" ) |
1225 | TARGET_BUILTIN(__builtin_ia32_cvtpd2qq128_mask, "V2OiV2dV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1226 | TARGET_BUILTIN(__builtin_ia32_cvtpd2qq256_mask, "V4OiV4dV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1227 | TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq128_mask, "V2OiV2dV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1228 | TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq256_mask, "V4OiV4dV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1229 | TARGET_BUILTIN(__builtin_ia32_cvtps2qq128_mask, "V2OiV4fV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1230 | TARGET_BUILTIN(__builtin_ia32_cvtps2qq256_mask, "V4OiV4fV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1231 | TARGET_BUILTIN(__builtin_ia32_cvtps2uqq128_mask, "V2OiV4fV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1232 | TARGET_BUILTIN(__builtin_ia32_cvtps2uqq256_mask, "V4OiV4fV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1233 | TARGET_BUILTIN(__builtin_ia32_cvtqq2ps128_mask, "V4fV2OiV4fUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1234 | TARGET_BUILTIN(__builtin_ia32_cvttpd2qq128_mask, "V2OiV2dV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1235 | TARGET_BUILTIN(__builtin_ia32_cvttpd2qq256_mask, "V4OiV4dV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1236 | TARGET_BUILTIN(__builtin_ia32_cvttpd2uqq128_mask, "V2OiV2dV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1237 | TARGET_BUILTIN(__builtin_ia32_cvttpd2uqq256_mask, "V4OiV4dV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1238 | TARGET_BUILTIN(__builtin_ia32_cvttps2qq128_mask, "V2OiV4fV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1239 | TARGET_BUILTIN(__builtin_ia32_cvttps2qq256_mask, "V4OiV4fV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1240 | TARGET_BUILTIN(__builtin_ia32_cvttps2uqq128_mask, "V2OiV4fV2OiUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1241 | TARGET_BUILTIN(__builtin_ia32_cvttps2uqq256_mask, "V4OiV4fV4OiUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1242 | TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps128_mask, "V4fV2OiV4fUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1243 | TARGET_BUILTIN(__builtin_ia32_rangepd128_mask, "V2dV2dV2dIiV2dUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1244 | TARGET_BUILTIN(__builtin_ia32_rangepd256_mask, "V4dV4dV4dIiV4dUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1245 | TARGET_BUILTIN(__builtin_ia32_rangeps128_mask, "V4fV4fV4fIiV4fUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1246 | TARGET_BUILTIN(__builtin_ia32_rangeps256_mask, "V8fV8fV8fIiV8fUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1247 | TARGET_BUILTIN(__builtin_ia32_rangesd128_round_mask, "V2dV2dV2dV2dUcIiIi" , "ncV:128:" , "avx512dq" ) |
1248 | TARGET_BUILTIN(__builtin_ia32_rangess128_round_mask, "V4fV4fV4fV4fUcIiIi" , "ncV:128:" , "avx512dq" ) |
1249 | TARGET_BUILTIN(__builtin_ia32_reducepd128_mask, "V2dV2dIiV2dUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1250 | TARGET_BUILTIN(__builtin_ia32_reducepd256_mask, "V4dV4dIiV4dUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1251 | TARGET_BUILTIN(__builtin_ia32_reduceps128_mask, "V4fV4fIiV4fUc" , "ncV:128:" , "avx512vl,avx512dq" ) |
1252 | TARGET_BUILTIN(__builtin_ia32_reduceps256_mask, "V8fV8fIiV8fUc" , "ncV:256:" , "avx512vl,avx512dq" ) |
1253 | TARGET_BUILTIN(__builtin_ia32_reducesd_mask, "V2dV2dV2dV2dUcIiIi" , "ncV:128:" , "avx512dq" ) |
1254 | TARGET_BUILTIN(__builtin_ia32_reducess_mask, "V4fV4fV4fV4fUcIiIi" , "ncV:128:" , "avx512dq" ) |
1255 | TARGET_BUILTIN(__builtin_ia32_pmovswb128_mask, "V16cV8sV16cUc" , "ncV:128:" , "avx512vl,avx512bw" ) |
1256 | TARGET_BUILTIN(__builtin_ia32_pmovswb256_mask, "V16cV16sV16cUs" , "ncV:256:" , "avx512vl,avx512bw" ) |
1257 | TARGET_BUILTIN(__builtin_ia32_pmovuswb128_mask, "V16cV8sV16cUc" , "ncV:128:" , "avx512vl,avx512bw" ) |
1258 | TARGET_BUILTIN(__builtin_ia32_pmovuswb256_mask, "V16cV16sV16cUs" , "ncV:256:" , "avx512vl,avx512bw" ) |
1259 | TARGET_BUILTIN(__builtin_ia32_pmovwb128_mask, "V16cV8sV16cUc" , "ncV:128:" , "avx512vl,avx512bw" ) |
1260 | TARGET_BUILTIN(__builtin_ia32_cvtpd2qq512_mask, "V8OiV8dV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1261 | TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq512_mask, "V8OiV8dV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1262 | TARGET_BUILTIN(__builtin_ia32_cvtps2qq512_mask, "V8OiV8fV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1263 | TARGET_BUILTIN(__builtin_ia32_cvtps2uqq512_mask, "V8OiV8fV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1264 | TARGET_BUILTIN(__builtin_ia32_cvtqq2pd512_mask, "V8dV8OiV8dUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1265 | TARGET_BUILTIN(__builtin_ia32_cvtqq2ps512_mask, "V8fV8OiV8fUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1266 | TARGET_BUILTIN(__builtin_ia32_cvttpd2qq512_mask, "V8OiV8dV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1267 | TARGET_BUILTIN(__builtin_ia32_cvttpd2uqq512_mask, "V8OiV8dV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1268 | TARGET_BUILTIN(__builtin_ia32_cvttps2qq512_mask, "V8OiV8fV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1269 | TARGET_BUILTIN(__builtin_ia32_cvttps2uqq512_mask, "V8OiV8fV8OiUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1270 | TARGET_BUILTIN(__builtin_ia32_cvtuqq2pd512_mask, "V8dV8OiV8dUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1271 | TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps512_mask, "V8fV8OiV8fUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1272 | TARGET_BUILTIN(__builtin_ia32_rangepd512_mask, "V8dV8dV8dIiV8dUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1273 | TARGET_BUILTIN(__builtin_ia32_rangeps512_mask, "V16fV16fV16fIiV16fUsIi" , "ncV:512:" , "avx512dq,evex512" ) |
1274 | TARGET_BUILTIN(__builtin_ia32_reducepd512_mask, "V8dV8dIiV8dUcIi" , "ncV:512:" , "avx512dq,evex512" ) |
1275 | TARGET_BUILTIN(__builtin_ia32_reduceps512_mask, "V16fV16fIiV16fUsIi" , "ncV:512:" , "avx512dq,evex512" ) |
1276 | TARGET_BUILTIN(__builtin_ia32_prold512, "V16iV16iIi" , "ncV:512:" , "avx512f,evex512" ) |
1277 | TARGET_BUILTIN(__builtin_ia32_prolq512, "V8OiV8OiIi" , "ncV:512:" , "avx512f,evex512" ) |
1278 | TARGET_BUILTIN(__builtin_ia32_prold128, "V4iV4iIi" , "ncV:128:" , "avx512vl" ) |
1279 | TARGET_BUILTIN(__builtin_ia32_prold256, "V8iV8iIi" , "ncV:256:" , "avx512vl" ) |
1280 | TARGET_BUILTIN(__builtin_ia32_prolq128, "V2OiV2OiIi" , "ncV:128:" , "avx512vl" ) |
1281 | TARGET_BUILTIN(__builtin_ia32_prolq256, "V4OiV4OiIi" , "ncV:256:" , "avx512vl" ) |
1282 | TARGET_BUILTIN(__builtin_ia32_prolvd512, "V16iV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1283 | TARGET_BUILTIN(__builtin_ia32_prolvq512, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1284 | TARGET_BUILTIN(__builtin_ia32_prord512, "V16iV16iIi" , "ncV:512:" , "avx512f,evex512" ) |
1285 | TARGET_BUILTIN(__builtin_ia32_prorq512, "V8OiV8OiIi" , "ncV:512:" , "avx512f,evex512" ) |
1286 | TARGET_BUILTIN(__builtin_ia32_prolvd128, "V4iV4iV4i" , "ncV:128:" , "avx512vl" ) |
1287 | TARGET_BUILTIN(__builtin_ia32_prolvd256, "V8iV8iV8i" , "ncV:256:" , "avx512vl" ) |
1288 | TARGET_BUILTIN(__builtin_ia32_prolvq128, "V2OiV2OiV2Oi" , "ncV:128:" , "avx512vl" ) |
1289 | TARGET_BUILTIN(__builtin_ia32_prolvq256, "V4OiV4OiV4Oi" , "ncV:256:" , "avx512vl" ) |
1290 | TARGET_BUILTIN(__builtin_ia32_prord128, "V4iV4iIi" , "ncV:128:" , "avx512vl" ) |
1291 | TARGET_BUILTIN(__builtin_ia32_prord256, "V8iV8iIi" , "ncV:256:" , "avx512vl" ) |
1292 | TARGET_BUILTIN(__builtin_ia32_prorq128, "V2OiV2OiIi" , "ncV:128:" , "avx512vl" ) |
1293 | TARGET_BUILTIN(__builtin_ia32_prorq256, "V4OiV4OiIi" , "ncV:256:" , "avx512vl" ) |
1294 | TARGET_BUILTIN(__builtin_ia32_prorvd512, "V16iV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1295 | TARGET_BUILTIN(__builtin_ia32_prorvq512, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1296 | TARGET_BUILTIN(__builtin_ia32_prorvd128, "V4iV4iV4i" , "ncV:128:" , "avx512vl" ) |
1297 | TARGET_BUILTIN(__builtin_ia32_prorvd256, "V8iV8iV8i" , "ncV:256:" , "avx512vl" ) |
1298 | TARGET_BUILTIN(__builtin_ia32_prorvq128, "V2OiV2OiV2Oi" , "ncV:128:" , "avx512vl" ) |
1299 | TARGET_BUILTIN(__builtin_ia32_prorvq256, "V4OiV4OiV4Oi" , "ncV:256:" , "avx512vl" ) |
1300 | TARGET_BUILTIN(__builtin_ia32_pshufhw512, "V32sV32sIi" , "ncV:512:" , "avx512bw,evex512" ) |
1301 | TARGET_BUILTIN(__builtin_ia32_pshuflw512, "V32sV32sIi" , "ncV:512:" , "avx512bw,evex512" ) |
1302 | TARGET_BUILTIN(__builtin_ia32_psllv32hi, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1303 | TARGET_BUILTIN(__builtin_ia32_psllw512, "V32sV32sV8s" , "ncV:512:" , "avx512bw,evex512" ) |
1304 | TARGET_BUILTIN(__builtin_ia32_psllwi512, "V32sV32si" , "ncV:512:" , "avx512bw,evex512" ) |
1305 | TARGET_BUILTIN(__builtin_ia32_psllv16hi, "V16sV16sV16s" , "ncV:256:" , "avx512bw,avx512vl" ) |
1306 | TARGET_BUILTIN(__builtin_ia32_psllv8hi, "V8sV8sV8s" , "ncV:128:" , "avx512bw,avx512vl" ) |
1307 | TARGET_BUILTIN(__builtin_ia32_pslldi512, "V16iV16ii" , "ncV:512:" , "avx512f,evex512" ) |
1308 | TARGET_BUILTIN(__builtin_ia32_psllqi512, "V8OiV8Oii" , "ncV:512:" , "avx512f,evex512" ) |
1309 | TARGET_BUILTIN(__builtin_ia32_psrlv32hi, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1310 | TARGET_BUILTIN(__builtin_ia32_psrlv16hi, "V16sV16sV16s" , "ncV:256:" , "avx512bw,avx512vl" ) |
1311 | TARGET_BUILTIN(__builtin_ia32_psrlv8hi, "V8sV8sV8s" , "ncV:128:" , "avx512bw,avx512vl" ) |
1312 | TARGET_BUILTIN(__builtin_ia32_psrldi512, "V16iV16ii" , "ncV:512:" , "avx512f,evex512" ) |
1313 | TARGET_BUILTIN(__builtin_ia32_psrlqi512, "V8OiV8Oii" , "ncV:512:" , "avx512f,evex512" ) |
1314 | TARGET_BUILTIN(__builtin_ia32_psrav32hi, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1315 | TARGET_BUILTIN(__builtin_ia32_psrav16hi, "V16sV16sV16s" , "ncV:256:" , "avx512bw,avx512vl" ) |
1316 | TARGET_BUILTIN(__builtin_ia32_psrav8hi, "V8sV8sV8s" , "ncV:128:" , "avx512bw,avx512vl" ) |
1317 | TARGET_BUILTIN(__builtin_ia32_psravq128, "V2OiV2OiV2Oi" , "ncV:128:" , "avx512vl" ) |
1318 | TARGET_BUILTIN(__builtin_ia32_psravq256, "V4OiV4OiV4Oi" , "ncV:256:" , "avx512vl" ) |
1319 | TARGET_BUILTIN(__builtin_ia32_psraw512, "V32sV32sV8s" , "ncV:512:" , "avx512bw,evex512" ) |
1320 | TARGET_BUILTIN(__builtin_ia32_psrawi512, "V32sV32si" , "ncV:512:" , "avx512bw,evex512" ) |
1321 | TARGET_BUILTIN(__builtin_ia32_psrlw512, "V32sV32sV8s" , "ncV:512:" , "avx512bw,evex512" ) |
1322 | TARGET_BUILTIN(__builtin_ia32_psrlwi512, "V32sV32si" , "ncV:512:" , "avx512bw,evex512" ) |
1323 | TARGET_BUILTIN(__builtin_ia32_pslldqi512_byteshift, "V8OiV8OiIi" , "ncV:512:" , "avx512bw,evex512" ) |
1324 | TARGET_BUILTIN(__builtin_ia32_psrldqi512_byteshift, "V8OiV8OiIi" , "ncV:512:" , "avx512bw,evex512" ) |
1325 | TARGET_BUILTIN(__builtin_ia32_movdqa32load128_mask, "V4iV4iC*V4iUc" , "nV:128:" , "avx512vl" ) |
1326 | TARGET_BUILTIN(__builtin_ia32_movdqa32load256_mask, "V8iV8iC*V8iUc" , "nV:256:" , "avx512vl" ) |
1327 | TARGET_BUILTIN(__builtin_ia32_movdqa32load512_mask, "V16iV16iC*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1328 | TARGET_BUILTIN(__builtin_ia32_movdqa32store512_mask, "vV16i*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1329 | TARGET_BUILTIN(__builtin_ia32_movdqa64load512_mask, "V8OiV8OiC*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1330 | TARGET_BUILTIN(__builtin_ia32_movdqa64store512_mask, "vV8Oi*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1331 | TARGET_BUILTIN(__builtin_ia32_movdqa32store128_mask, "vV4i*V4iUc" , "nV:128:" , "avx512vl" ) |
1332 | TARGET_BUILTIN(__builtin_ia32_movdqa32store256_mask, "vV8i*V8iUc" , "nV:256:" , "avx512vl" ) |
1333 | TARGET_BUILTIN(__builtin_ia32_movdqa64load128_mask, "V2OiV2OiC*V2OiUc" , "nV:128:" , "avx512vl" ) |
1334 | TARGET_BUILTIN(__builtin_ia32_movdqa64load256_mask, "V4OiV4OiC*V4OiUc" , "nV:256:" , "avx512vl" ) |
1335 | TARGET_BUILTIN(__builtin_ia32_movdqa64store128_mask, "vV2Oi*V2OiUc" , "nV:128:" , "avx512vl" ) |
1336 | TARGET_BUILTIN(__builtin_ia32_movdqa64store256_mask, "vV4Oi*V4OiUc" , "nV:256:" , "avx512vl" ) |
1337 | TARGET_BUILTIN(__builtin_ia32_vpmadd52huq512, "V8OiV8OiV8OiV8Oi" , "ncV:512:" , "avx512ifma,evex512" ) |
1338 | TARGET_BUILTIN(__builtin_ia32_vpmadd52luq512, "V8OiV8OiV8OiV8Oi" , "ncV:512:" , "avx512ifma,evex512" ) |
1339 | TARGET_BUILTIN(__builtin_ia32_vpmadd52huq128, "V2OiV2OiV2OiV2Oi" , "ncV:128:" , "avx512ifma,avx512vl|avxifma" ) |
1340 | TARGET_BUILTIN(__builtin_ia32_vpmadd52huq256, "V4OiV4OiV4OiV4Oi" , "ncV:256:" , "avx512ifma,avx512vl|avxifma" ) |
1341 | TARGET_BUILTIN(__builtin_ia32_vpmadd52luq128, "V2OiV2OiV2OiV2Oi" , "ncV:128:" , "avx512ifma,avx512vl|avxifma" ) |
1342 | TARGET_BUILTIN(__builtin_ia32_vpmadd52luq256, "V4OiV4OiV4OiV4Oi" , "ncV:256:" , "avx512ifma,avx512vl|avxifma" ) |
1343 | TARGET_BUILTIN(__builtin_ia32_vcomisd, "iV2dV2dIiIi" , "ncV:128:" , "avx512f" ) |
1344 | TARGET_BUILTIN(__builtin_ia32_vcomiss, "iV4fV4fIiIi" , "ncV:128:" , "avx512f" ) |
1345 | TARGET_BUILTIN(__builtin_ia32_kunpckdi, "UOiUOiUOi" , "nc" , "avx512bw" ) |
1346 | TARGET_BUILTIN(__builtin_ia32_kunpcksi, "UiUiUi" , "nc" , "avx512bw" ) |
1347 | TARGET_BUILTIN(__builtin_ia32_loaddquhi512_mask, "V32sV32sC*V32sUi" , "nV:512:" , "avx512bw,evex512" ) |
1348 | TARGET_BUILTIN(__builtin_ia32_loaddquqi512_mask, "V64cV64cC*V64cUOi" , "nV:512:" , "avx512bw,evex512" ) |
1349 | TARGET_BUILTIN(__builtin_ia32_fixupimmpd512_mask, "V8dV8dV8dV8OiIiUcIi" , "ncV:512:" , "avx512f,evex512" ) |
1350 | TARGET_BUILTIN(__builtin_ia32_fixupimmpd512_maskz, "V8dV8dV8dV8OiIiUcIi" , "ncV:512:" , "avx512f,evex512" ) |
1351 | TARGET_BUILTIN(__builtin_ia32_fixupimmps512_mask, "V16fV16fV16fV16iIiUsIi" , "ncV:512:" , "avx512f,evex512" ) |
1352 | TARGET_BUILTIN(__builtin_ia32_fixupimmps512_maskz, "V16fV16fV16fV16iIiUsIi" , "ncV:512:" , "avx512f,evex512" ) |
1353 | TARGET_BUILTIN(__builtin_ia32_fixupimmsd_mask, "V2dV2dV2dV2OiIiUcIi" , "ncV:128:" , "avx512f" ) |
1354 | TARGET_BUILTIN(__builtin_ia32_fixupimmsd_maskz, "V2dV2dV2dV2OiIiUcIi" , "ncV:128:" , "avx512f" ) |
1355 | TARGET_BUILTIN(__builtin_ia32_fixupimmss_mask, "V4fV4fV4fV4iIiUcIi" , "ncV:128:" , "avx512f" ) |
1356 | TARGET_BUILTIN(__builtin_ia32_fixupimmss_maskz, "V4fV4fV4fV4iIiUcIi" , "ncV:128:" , "avx512f" ) |
1357 | TARGET_BUILTIN(__builtin_ia32_getexpsd128_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1358 | TARGET_BUILTIN(__builtin_ia32_getexpss128_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1359 | TARGET_BUILTIN(__builtin_ia32_getmantsd_round_mask, "V2dV2dV2dIiV2dUcIi" , "ncV:128:" , "avx512f" ) |
1360 | TARGET_BUILTIN(__builtin_ia32_getmantss_round_mask, "V4fV4fV4fIiV4fUcIi" , "ncV:128:" , "avx512f" ) |
1361 | TARGET_BUILTIN(__builtin_ia32_loaddquhi128_mask, "V8sV8sC*V8sUc" , "nV:128:" , "avx512bw,avx512vl" ) |
1362 | TARGET_BUILTIN(__builtin_ia32_loaddquhi256_mask, "V16sV16sC*V16sUs" , "nV:256:" , "avx512bw,avx512vl" ) |
1363 | TARGET_BUILTIN(__builtin_ia32_loaddquqi128_mask, "V16cV16cC*V16cUs" , "nV:128:" , "avx512bw,avx512vl" ) |
1364 | TARGET_BUILTIN(__builtin_ia32_loaddquqi256_mask, "V32cV32cC*V32cUi" , "nV:256:" , "avx512bw,avx512vl" ) |
1365 | TARGET_BUILTIN(__builtin_ia32_fixupimmpd128_mask, "V2dV2dV2dV2OiIiUc" , "ncV:128:" , "avx512vl" ) |
1366 | TARGET_BUILTIN(__builtin_ia32_fixupimmpd128_maskz, "V2dV2dV2dV2OiIiUc" , "ncV:128:" , "avx512vl" ) |
1367 | TARGET_BUILTIN(__builtin_ia32_fixupimmpd256_mask, "V4dV4dV4dV4OiIiUc" , "ncV:256:" , "avx512vl" ) |
1368 | TARGET_BUILTIN(__builtin_ia32_fixupimmpd256_maskz, "V4dV4dV4dV4OiIiUc" , "ncV:256:" , "avx512vl" ) |
1369 | TARGET_BUILTIN(__builtin_ia32_fixupimmps128_mask, "V4fV4fV4fV4iIiUc" , "ncV:128:" , "avx512vl" ) |
1370 | TARGET_BUILTIN(__builtin_ia32_fixupimmps128_maskz, "V4fV4fV4fV4iIiUc" , "ncV:128:" , "avx512vl" ) |
1371 | TARGET_BUILTIN(__builtin_ia32_fixupimmps256_mask, "V8fV8fV8fV8iIiUc" , "ncV:256:" , "avx512vl" ) |
1372 | TARGET_BUILTIN(__builtin_ia32_fixupimmps256_maskz, "V8fV8fV8fV8iIiUc" , "ncV:256:" , "avx512vl" ) |
1373 | TARGET_BUILTIN(__builtin_ia32_loadapd128_mask, "V2dV2dC*V2dUc" , "nV:128:" , "avx512vl" ) |
1374 | TARGET_BUILTIN(__builtin_ia32_loadsd128_mask, "V2dV2dC*V2dUc" , "nV:128:" , "avx512f" ) |
1375 | TARGET_BUILTIN(__builtin_ia32_loadapd256_mask, "V4dV4dC*V4dUc" , "nV:256:" , "avx512vl" ) |
1376 | TARGET_BUILTIN(__builtin_ia32_loadaps128_mask, "V4fV4fC*V4fUc" , "nV:128:" , "avx512vl" ) |
1377 | TARGET_BUILTIN(__builtin_ia32_loadss128_mask, "V4fV4fC*V4fUc" , "nV:128:" , "avx512f" ) |
1378 | TARGET_BUILTIN(__builtin_ia32_loadaps256_mask, "V8fV8fC*V8fUc" , "nV:256:" , "avx512vl" ) |
1379 | TARGET_BUILTIN(__builtin_ia32_loaddqudi128_mask, "V2OiV2OiC*V2OiUc" , "nV:128:" , "avx512vl" ) |
1380 | TARGET_BUILTIN(__builtin_ia32_loaddqudi256_mask, "V4OiV4OiC*V4OiUc" , "nV:256:" , "avx512vl" ) |
1381 | TARGET_BUILTIN(__builtin_ia32_loaddqusi128_mask, "V4iV4iC*V4iUc" , "nV:128:" , "avx512vl" ) |
1382 | TARGET_BUILTIN(__builtin_ia32_loaddqusi256_mask, "V8iV8iC*V8iUc" , "nV:256:" , "avx512vl" ) |
1383 | TARGET_BUILTIN(__builtin_ia32_loadupd128_mask, "V2dV2dC*V2dUc" , "nV:128:" , "avx512vl" ) |
1384 | TARGET_BUILTIN(__builtin_ia32_loadupd256_mask, "V4dV4dC*V4dUc" , "nV:256:" , "avx512vl" ) |
1385 | TARGET_BUILTIN(__builtin_ia32_loadups128_mask, "V4fV4fC*V4fUc" , "nV:128:" , "avx512vl" ) |
1386 | TARGET_BUILTIN(__builtin_ia32_loadups256_mask, "V8fV8fC*V8fUc" , "nV:256:" , "avx512vl" ) |
1387 | TARGET_BUILTIN(__builtin_ia32_storedquhi512_mask, "vV32s*V32sUi" , "nV:512:" , "avx512bw,evex512" ) |
1388 | TARGET_BUILTIN(__builtin_ia32_storedquqi512_mask, "vV64c*V64cUOi" , "nV:512:" , "avx512bw,evex512" ) |
1389 | TARGET_BUILTIN(__builtin_ia32_storedquhi128_mask, "vV8s*V8sUc" , "nV:128:" , "avx512vl,avx512bw" ) |
1390 | TARGET_BUILTIN(__builtin_ia32_storedquhi256_mask, "vV16s*V16sUs" , "nV:256:" , "avx512vl,avx512bw" ) |
1391 | TARGET_BUILTIN(__builtin_ia32_storedquqi128_mask, "vV16c*V16cUs" , "nV:128:" , "avx512vl,avx512bw" ) |
1392 | TARGET_BUILTIN(__builtin_ia32_storedquqi256_mask, "vV32c*V32cUi" , "nV:256:" , "avx512vl,avx512bw" ) |
1393 | TARGET_BUILTIN(__builtin_ia32_storeapd128_mask, "vV2d*V2dUc" , "nV:128:" , "avx512vl" ) |
1394 | TARGET_BUILTIN(__builtin_ia32_storesd128_mask, "vV2d*V2dUc" , "nV:128:" , "avx512f" ) |
1395 | TARGET_BUILTIN(__builtin_ia32_storeapd256_mask, "vV4d*V4dUc" , "nV:256:" , "avx512vl" ) |
1396 | TARGET_BUILTIN(__builtin_ia32_storeaps128_mask, "vV4f*V4fUc" , "nV:128:" , "avx512vl" ) |
1397 | TARGET_BUILTIN(__builtin_ia32_storess128_mask, "vV4f*V4fUc" , "nV:128:" , "avx512f" ) |
1398 | TARGET_BUILTIN(__builtin_ia32_storeaps256_mask, "vV8f*V8fUc" , "nV:256:" , "avx512vl" ) |
1399 | TARGET_BUILTIN(__builtin_ia32_storedqudi128_mask, "vV2Oi*V2OiUc" , "nV:128:" , "avx512vl" ) |
1400 | TARGET_BUILTIN(__builtin_ia32_storedqudi256_mask, "vV4Oi*V4OiUc" , "nV:256:" , "avx512vl" ) |
1401 | TARGET_BUILTIN(__builtin_ia32_storedqusi128_mask, "vV4i*V4iUc" , "nV:128:" , "avx512vl" ) |
1402 | TARGET_BUILTIN(__builtin_ia32_storedqusi256_mask, "vV8i*V8iUc" , "nV:256:" , "avx512vl" ) |
1403 | TARGET_BUILTIN(__builtin_ia32_storeupd128_mask, "vV2d*V2dUc" , "nV:128:" , "avx512vl" ) |
1404 | TARGET_BUILTIN(__builtin_ia32_storeupd256_mask, "vV4d*V4dUc" , "nV:256:" , "avx512vl" ) |
1405 | TARGET_BUILTIN(__builtin_ia32_storeups128_mask, "vV4f*V4fUc" , "nV:128:" , "avx512vl" ) |
1406 | TARGET_BUILTIN(__builtin_ia32_storeups256_mask, "vV8f*V8fUc" , "nV:256:" , "avx512vl" ) |
1407 | TARGET_BUILTIN(__builtin_ia32_rcp14pd128_mask, "V2dV2dV2dUc" , "ncV:128:" , "avx512vl" ) |
1408 | TARGET_BUILTIN(__builtin_ia32_rcp14pd256_mask, "V4dV4dV4dUc" , "ncV:256:" , "avx512vl" ) |
1409 | TARGET_BUILTIN(__builtin_ia32_rcp14ps128_mask, "V4fV4fV4fUc" , "ncV:128:" , "avx512vl" ) |
1410 | TARGET_BUILTIN(__builtin_ia32_rcp14ps256_mask, "V8fV8fV8fUc" , "ncV:256:" , "avx512vl" ) |
1411 | TARGET_BUILTIN(__builtin_ia32_vplzcntd_128, "V4iV4i" , "ncV:128:" , "avx512cd,avx512vl" ) |
1412 | TARGET_BUILTIN(__builtin_ia32_vplzcntd_256, "V8iV8i" , "ncV:256:" , "avx512cd,avx512vl" ) |
1413 | TARGET_BUILTIN(__builtin_ia32_vplzcntq_128, "V2OiV2Oi" , "ncV:128:" , "avx512cd,avx512vl" ) |
1414 | TARGET_BUILTIN(__builtin_ia32_vplzcntq_256, "V4OiV4Oi" , "ncV:256:" , "avx512cd,avx512vl" ) |
1415 | TARGET_BUILTIN(__builtin_ia32_vcvtsd2si32, "iV2dIi" , "ncV:128:" , "avx512f" ) |
1416 | TARGET_BUILTIN(__builtin_ia32_vcvtsd2usi32, "UiV2dIi" , "ncV:128:" , "avx512f" ) |
1417 | TARGET_BUILTIN(__builtin_ia32_vcvtss2si32, "iV4fIi" , "ncV:128:" , "avx512f" ) |
1418 | TARGET_BUILTIN(__builtin_ia32_vcvtss2usi32, "UiV4fIi" , "ncV:128:" , "avx512f" ) |
1419 | TARGET_BUILTIN(__builtin_ia32_vcvttsd2si32, "iV2dIi" , "ncV:128:" , "avx512f" ) |
1420 | TARGET_BUILTIN(__builtin_ia32_vcvttsd2usi32, "UiV2dIi" , "ncV:128:" , "avx512f" ) |
1421 | TARGET_BUILTIN(__builtin_ia32_vcvttss2si32, "iV4fIi" , "ncV:128:" , "avx512f" ) |
1422 | TARGET_BUILTIN(__builtin_ia32_vcvttss2usi32, "UiV4fIi" , "ncV:128:" , "avx512f" ) |
1423 | TARGET_BUILTIN(__builtin_ia32_vpermilpd512, "V8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1424 | TARGET_BUILTIN(__builtin_ia32_vpermilps512, "V16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
1425 | TARGET_BUILTIN(__builtin_ia32_vpermilvarpd512, "V8dV8dV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1426 | TARGET_BUILTIN(__builtin_ia32_vpermilvarps512, "V16fV16fV16i" , "ncV:512:" , "avx512f,evex512" ) |
1427 | TARGET_BUILTIN(__builtin_ia32_rndscalesd_round_mask, "V2dV2dV2dV2dUcIiIi" , "ncV:128:" , "avx512f" ) |
1428 | TARGET_BUILTIN(__builtin_ia32_rndscaless_round_mask, "V4fV4fV4fV4fUcIiIi" , "ncV:128:" , "avx512f" ) |
1429 | TARGET_BUILTIN(__builtin_ia32_scalefpd512_mask, "V8dV8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
1430 | TARGET_BUILTIN(__builtin_ia32_scalefps512_mask, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
1431 | TARGET_BUILTIN(__builtin_ia32_scalefsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1432 | TARGET_BUILTIN(__builtin_ia32_scalefss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1433 | TARGET_BUILTIN(__builtin_ia32_psradi512, "V16iV16ii" , "ncV:512:" , "avx512f,evex512" ) |
1434 | TARGET_BUILTIN(__builtin_ia32_psraqi512, "V8OiV8Oii" , "ncV:512:" , "avx512f,evex512" ) |
1435 | TARGET_BUILTIN(__builtin_ia32_psraq128, "V2OiV2OiV2Oi" , "ncV:128:" , "avx512vl" ) |
1436 | TARGET_BUILTIN(__builtin_ia32_psraq256, "V4OiV4OiV2Oi" , "ncV:256:" , "avx512vl" ) |
1437 | TARGET_BUILTIN(__builtin_ia32_psraqi128, "V2OiV2Oii" , "ncV:128:" , "avx512vl" ) |
1438 | TARGET_BUILTIN(__builtin_ia32_psraqi256, "V4OiV4Oii" , "ncV:256:" , "avx512vl" ) |
1439 | TARGET_BUILTIN(__builtin_ia32_pslld512, "V16iV16iV4i" , "ncV:512:" , "avx512f,evex512" ) |
1440 | TARGET_BUILTIN(__builtin_ia32_psllq512, "V8OiV8OiV2Oi" , "ncV:512:" , "avx512f,evex512" ) |
1441 | TARGET_BUILTIN(__builtin_ia32_psllv16si, "V16iV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1442 | TARGET_BUILTIN(__builtin_ia32_psllv8di, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1443 | TARGET_BUILTIN(__builtin_ia32_psrad512, "V16iV16iV4i" , "ncV:512:" , "avx512f,evex512" ) |
1444 | TARGET_BUILTIN(__builtin_ia32_psraq512, "V8OiV8OiV2Oi" , "ncV:512:" , "avx512f,evex512" ) |
1445 | TARGET_BUILTIN(__builtin_ia32_psrav16si, "V16iV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1446 | TARGET_BUILTIN(__builtin_ia32_psrav8di, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1447 | TARGET_BUILTIN(__builtin_ia32_psrld512, "V16iV16iV4i" , "ncV:512:" , "avx512f,evex512" ) |
1448 | TARGET_BUILTIN(__builtin_ia32_psrlq512, "V8OiV8OiV2Oi" , "ncV:512:" , "avx512f,evex512" ) |
1449 | TARGET_BUILTIN(__builtin_ia32_psrlv16si, "V16iV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1450 | TARGET_BUILTIN(__builtin_ia32_psrlv8di, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1451 | TARGET_BUILTIN(__builtin_ia32_pternlogd512_mask, "V16iV16iV16iV16iIiUs" , "ncV:512:" , "avx512f,evex512" ) |
1452 | TARGET_BUILTIN(__builtin_ia32_pternlogd512_maskz, "V16iV16iV16iV16iIiUs" , "ncV:512:" , "avx512f,evex512" ) |
1453 | TARGET_BUILTIN(__builtin_ia32_pternlogq512_mask, "V8OiV8OiV8OiV8OiIiUc" , "ncV:512:" , "avx512f,evex512" ) |
1454 | TARGET_BUILTIN(__builtin_ia32_pternlogq512_maskz, "V8OiV8OiV8OiV8OiIiUc" , "ncV:512:" , "avx512f,evex512" ) |
1455 | TARGET_BUILTIN(__builtin_ia32_pternlogd128_mask, "V4iV4iV4iV4iIiUc" , "ncV:128:" , "avx512vl" ) |
1456 | TARGET_BUILTIN(__builtin_ia32_pternlogd128_maskz, "V4iV4iV4iV4iIiUc" , "ncV:128:" , "avx512vl" ) |
1457 | TARGET_BUILTIN(__builtin_ia32_pternlogd256_mask, "V8iV8iV8iV8iIiUc" , "ncV:256:" , "avx512vl" ) |
1458 | TARGET_BUILTIN(__builtin_ia32_pternlogd256_maskz, "V8iV8iV8iV8iIiUc" , "ncV:256:" , "avx512vl" ) |
1459 | TARGET_BUILTIN(__builtin_ia32_pternlogq128_mask, "V2OiV2OiV2OiV2OiIiUc" , "ncV:128:" , "avx512vl" ) |
1460 | TARGET_BUILTIN(__builtin_ia32_pternlogq128_maskz, "V2OiV2OiV2OiV2OiIiUc" , "ncV:128:" , "avx512vl" ) |
1461 | TARGET_BUILTIN(__builtin_ia32_pternlogq256_mask, "V4OiV4OiV4OiV4OiIiUc" , "ncV:256:" , "avx512vl" ) |
1462 | TARGET_BUILTIN(__builtin_ia32_pternlogq256_maskz, "V4OiV4OiV4OiV4OiIiUc" , "ncV:256:" , "avx512vl" ) |
1463 | TARGET_BUILTIN(__builtin_ia32_shuf_f32x4, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
1464 | TARGET_BUILTIN(__builtin_ia32_shuf_f64x2, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1465 | TARGET_BUILTIN(__builtin_ia32_shuf_i32x4, "V16iV16iV16iIi" , "ncV:512:" , "avx512f,evex512" ) |
1466 | TARGET_BUILTIN(__builtin_ia32_shuf_i64x2, "V8OiV8OiV8OiIi" , "ncV:512:" , "avx512f,evex512" ) |
1467 | TARGET_BUILTIN(__builtin_ia32_shufpd512, "V8dV8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1468 | TARGET_BUILTIN(__builtin_ia32_shufps512, "V16fV16fV16fIi" , "ncV:512:" , "avx512f,evex512" ) |
1469 | TARGET_BUILTIN(__builtin_ia32_shuf_f32x4_256, "V8fV8fV8fIi" , "ncV:256:" , "avx512vl" ) |
1470 | TARGET_BUILTIN(__builtin_ia32_shuf_f64x2_256, "V4dV4dV4dIi" , "ncV:256:" , "avx512vl" ) |
1471 | TARGET_BUILTIN(__builtin_ia32_shuf_i32x4_256, "V8iV8iV8iIi" , "ncV:256:" , "avx512vl" ) |
1472 | TARGET_BUILTIN(__builtin_ia32_shuf_i64x2_256, "V4OiV4OiV4OiIi" , "ncV:256:" , "avx512vl" ) |
1473 | TARGET_BUILTIN(__builtin_ia32_sqrtsd_round_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1474 | TARGET_BUILTIN(__builtin_ia32_sqrtss_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1475 | TARGET_BUILTIN(__builtin_ia32_rsqrt14pd128_mask, "V2dV2dV2dUc" , "ncV:128:" , "avx512vl" ) |
1476 | TARGET_BUILTIN(__builtin_ia32_rsqrt14pd256_mask, "V4dV4dV4dUc" , "ncV:256:" , "avx512vl" ) |
1477 | TARGET_BUILTIN(__builtin_ia32_rsqrt14ps128_mask, "V4fV4fV4fUc" , "ncV:128:" , "avx512vl" ) |
1478 | TARGET_BUILTIN(__builtin_ia32_rsqrt14ps256_mask, "V8fV8fV8fUc" , "ncV:256:" , "avx512vl" ) |
1479 | TARGET_BUILTIN(__builtin_ia32_cvtb2mask512, "UOiV64c" , "ncV:512:" , "avx512bw,evex512" ) |
1480 | TARGET_BUILTIN(__builtin_ia32_cvtmask2b512, "V64cUOi" , "ncV:512:" , "avx512bw,evex512" ) |
1481 | TARGET_BUILTIN(__builtin_ia32_cvtmask2w512, "V32sUi" , "ncV:512:" , "avx512bw,evex512" ) |
1482 | TARGET_BUILTIN(__builtin_ia32_cvtd2mask512, "UsV16i" , "ncV:512:" , "avx512dq,evex512" ) |
1483 | TARGET_BUILTIN(__builtin_ia32_cvtmask2d512, "V16iUs" , "ncV:512:" , "avx512dq,evex512" ) |
1484 | TARGET_BUILTIN(__builtin_ia32_cvtmask2q512, "V8OiUc" , "ncV:512:" , "avx512dq,evex512" ) |
1485 | TARGET_BUILTIN(__builtin_ia32_cvtq2mask512, "UcV8Oi" , "ncV:512:" , "avx512dq,evex512" ) |
1486 | TARGET_BUILTIN(__builtin_ia32_cvtb2mask128, "UsV16c" , "ncV:128:" , "avx512bw,avx512vl" ) |
1487 | TARGET_BUILTIN(__builtin_ia32_cvtb2mask256, "UiV32c" , "ncV:256:" , "avx512bw,avx512vl" ) |
1488 | TARGET_BUILTIN(__builtin_ia32_cvtmask2b128, "V16cUs" , "ncV:128:" , "avx512bw,avx512vl" ) |
1489 | TARGET_BUILTIN(__builtin_ia32_cvtmask2b256, "V32cUi" , "ncV:256:" , "avx512bw,avx512vl" ) |
1490 | TARGET_BUILTIN(__builtin_ia32_cvtmask2w128, "V8sUc" , "ncV:128:" , "avx512bw,avx512vl" ) |
1491 | TARGET_BUILTIN(__builtin_ia32_cvtmask2w256, "V16sUs" , "ncV:256:" , "avx512bw,avx512vl" ) |
1492 | TARGET_BUILTIN(__builtin_ia32_cvtd2mask128, "UcV4i" , "ncV:128:" , "avx512dq,avx512vl" ) |
1493 | TARGET_BUILTIN(__builtin_ia32_cvtd2mask256, "UcV8i" , "ncV:256:" , "avx512dq,avx512vl" ) |
1494 | TARGET_BUILTIN(__builtin_ia32_cvtmask2d128, "V4iUc" , "ncV:128:" , "avx512dq,avx512vl" ) |
1495 | TARGET_BUILTIN(__builtin_ia32_cvtmask2d256, "V8iUc" , "ncV:256:" , "avx512dq,avx512vl" ) |
1496 | TARGET_BUILTIN(__builtin_ia32_cvtmask2q128, "V2OiUc" , "ncV:128:" , "avx512dq,avx512vl" ) |
1497 | TARGET_BUILTIN(__builtin_ia32_cvtmask2q256, "V4OiUc" , "ncV:256:" , "avx512dq,avx512vl" ) |
1498 | TARGET_BUILTIN(__builtin_ia32_cvtq2mask128, "UcV2Oi" , "ncV:128:" , "avx512dq,avx512vl" ) |
1499 | TARGET_BUILTIN(__builtin_ia32_cvtq2mask256, "UcV4Oi" , "ncV:256:" , "avx512dq,avx512vl" ) |
1500 | TARGET_BUILTIN(__builtin_ia32_pmovsdb512_mask, "V16cV16iV16cUs" , "ncV:512:" , "avx512f,evex512" ) |
1501 | TARGET_BUILTIN(__builtin_ia32_pmovsdb512mem_mask, "vV16c*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1502 | TARGET_BUILTIN(__builtin_ia32_pmovswb512mem_mask, "vV32c*V32sUi" , "nV:512:" , "avx512bw,evex512" ) |
1503 | TARGET_BUILTIN(__builtin_ia32_pmovsdw512_mask, "V16sV16iV16sUs" , "ncV:512:" , "avx512f,evex512" ) |
1504 | TARGET_BUILTIN(__builtin_ia32_pmovsdw512mem_mask, "vV16s*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1505 | TARGET_BUILTIN(__builtin_ia32_pmovsqb512_mask, "V16cV8OiV16cUc" , "ncV:512:" , "avx512f,evex512" ) |
1506 | TARGET_BUILTIN(__builtin_ia32_pmovsqb512mem_mask, "vV16c*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1507 | TARGET_BUILTIN(__builtin_ia32_pmovsqd512_mask, "V8iV8OiV8iUc" , "ncV:512:" , "avx512f,evex512" ) |
1508 | TARGET_BUILTIN(__builtin_ia32_pmovsqd512mem_mask, "vV8i*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1509 | TARGET_BUILTIN(__builtin_ia32_pmovsqw512_mask, "V8sV8OiV8sUc" , "ncV:512:" , "avx512f,evex512" ) |
1510 | TARGET_BUILTIN(__builtin_ia32_pmovsqw512mem_mask, "vV8s*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1511 | TARGET_BUILTIN(__builtin_ia32_pmovsdb128_mask, "V16cV4iV16cUc" , "ncV:128:" , "avx512vl" ) |
1512 | TARGET_BUILTIN(__builtin_ia32_pmovsdb128mem_mask, "vV16c*V4iUc" , "nV:128:" , "avx512vl" ) |
1513 | TARGET_BUILTIN(__builtin_ia32_pmovswb128mem_mask, "vV16c*V8sUc" , "nV:128:" , "avx512vl,avx512bw" ) |
1514 | TARGET_BUILTIN(__builtin_ia32_pmovsdb256_mask, "V16cV8iV16cUc" , "ncV:256:" , "avx512vl" ) |
1515 | TARGET_BUILTIN(__builtin_ia32_pmovsdb256mem_mask, "vV16c*V8iUc" , "nV:256:" , "avx512vl" ) |
1516 | TARGET_BUILTIN(__builtin_ia32_pmovswb256mem_mask, "vV16c*V16sUs" , "nV:256:" , "avx512vl,avx512bw" ) |
1517 | TARGET_BUILTIN(__builtin_ia32_pmovsdw128_mask, "V8sV4iV8sUc" , "ncV:128:" , "avx512vl" ) |
1518 | TARGET_BUILTIN(__builtin_ia32_pmovsdw128mem_mask, "vV8s*V4iUc" , "nV:128:" , "avx512vl" ) |
1519 | TARGET_BUILTIN(__builtin_ia32_pmovsdw256_mask, "V8sV8iV8sUc" , "ncV:256:" , "avx512vl" ) |
1520 | TARGET_BUILTIN(__builtin_ia32_pmovsdw256mem_mask, "vV8s*V8iUc" , "nV:256:" , "avx512vl" ) |
1521 | TARGET_BUILTIN(__builtin_ia32_pmovsqb128_mask, "V16cV2OiV16cUc" , "ncV:128:" , "avx512vl" ) |
1522 | TARGET_BUILTIN(__builtin_ia32_pmovsqb128mem_mask, "vV16c*V2OiUc" , "nV:128:" , "avx512vl" ) |
1523 | TARGET_BUILTIN(__builtin_ia32_pmovsqb256_mask, "V16cV4OiV16cUc" , "ncV:256:" , "avx512vl" ) |
1524 | TARGET_BUILTIN(__builtin_ia32_pmovsqb256mem_mask, "vV16c*V4OiUc" , "nV:256:" , "avx512vl" ) |
1525 | TARGET_BUILTIN(__builtin_ia32_pmovsqd128_mask, "V4iV2OiV4iUc" , "ncV:128:" , "avx512vl" ) |
1526 | TARGET_BUILTIN(__builtin_ia32_pmovsqd128mem_mask, "vV4i*V2OiUc" , "nV:128:" , "avx512vl" ) |
1527 | TARGET_BUILTIN(__builtin_ia32_pmovsqd256_mask, "V4iV4OiV4iUc" , "ncV:256:" , "avx512vl" ) |
1528 | TARGET_BUILTIN(__builtin_ia32_pmovsqd256mem_mask, "vV4i*V4OiUc" , "nV:256:" , "avx512vl" ) |
1529 | TARGET_BUILTIN(__builtin_ia32_pmovsqw128_mask, "V8sV2OiV8sUc" , "ncV:128:" , "avx512vl" ) |
1530 | TARGET_BUILTIN(__builtin_ia32_pmovsqw128mem_mask, "vV8s*V2OiUc" , "nV:128:" , "avx512vl" ) |
1531 | TARGET_BUILTIN(__builtin_ia32_pmovsqw256_mask, "V8sV4OiV8sUc" , "ncV:256:" , "avx512vl" ) |
1532 | TARGET_BUILTIN(__builtin_ia32_pmovsqw256mem_mask, "vV8s*V4OiUc" , "nV:256:" , "avx512vl" ) |
1533 | TARGET_BUILTIN(__builtin_ia32_pmovusdb512_mask, "V16cV16iV16cUs" , "ncV:512:" , "avx512f,evex512" ) |
1534 | TARGET_BUILTIN(__builtin_ia32_pmovusdb512mem_mask, "vV16c*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1535 | TARGET_BUILTIN(__builtin_ia32_pmovuswb512mem_mask, "vV32c*V32sUi" , "nV:512:" , "avx512bw,evex512" ) |
1536 | TARGET_BUILTIN(__builtin_ia32_pmovusdw512_mask, "V16sV16iV16sUs" , "ncV:512:" , "avx512f,evex512" ) |
1537 | TARGET_BUILTIN(__builtin_ia32_pmovusdw512mem_mask, "vV16s*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1538 | TARGET_BUILTIN(__builtin_ia32_pmovusqb512_mask, "V16cV8OiV16cUc" , "ncV:512:" , "avx512f,evex512" ) |
1539 | TARGET_BUILTIN(__builtin_ia32_pmovusqb512mem_mask, "vV16c*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1540 | TARGET_BUILTIN(__builtin_ia32_pmovusqd512_mask, "V8iV8OiV8iUc" , "ncV:512:" , "avx512f,evex512" ) |
1541 | TARGET_BUILTIN(__builtin_ia32_pmovusqd512mem_mask, "vV8i*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1542 | TARGET_BUILTIN(__builtin_ia32_pmovusqw512_mask, "V8sV8OiV8sUc" , "ncV:512:" , "avx512f,evex512" ) |
1543 | TARGET_BUILTIN(__builtin_ia32_pmovusqw512mem_mask, "vV8s*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1544 | TARGET_BUILTIN(__builtin_ia32_pmovusdb128_mask, "V16cV4iV16cUc" , "ncV:128:" , "avx512vl" ) |
1545 | TARGET_BUILTIN(__builtin_ia32_pmovusdb128mem_mask, "vV16c*V4iUc" , "nV:128:" , "avx512vl" ) |
1546 | TARGET_BUILTIN(__builtin_ia32_pmovuswb128mem_mask, "vV16c*V8sUc" , "nV:128:" , "avx512vl,avx512bw" ) |
1547 | TARGET_BUILTIN(__builtin_ia32_pmovusdb256_mask, "V16cV8iV16cUc" , "ncV:256:" , "avx512vl" ) |
1548 | TARGET_BUILTIN(__builtin_ia32_pmovusdb256mem_mask, "vV16c*V8iUc" , "nV:256:" , "avx512vl" ) |
1549 | TARGET_BUILTIN(__builtin_ia32_pmovuswb256mem_mask, "vV16c*V16sUs" , "nV:256:" , "avx512vl,avx512bw" ) |
1550 | TARGET_BUILTIN(__builtin_ia32_pmovusdw128_mask, "V8sV4iV8sUc" , "ncV:128:" , "avx512vl" ) |
1551 | TARGET_BUILTIN(__builtin_ia32_pmovusdw128mem_mask, "vV8s*V4iUc" , "nV:128:" , "avx512vl" ) |
1552 | TARGET_BUILTIN(__builtin_ia32_pmovusdw256_mask, "V8sV8iV8sUc" , "ncV:256:" , "avx512vl" ) |
1553 | TARGET_BUILTIN(__builtin_ia32_pmovusdw256mem_mask, "vV8s*V8iUc" , "nV:256:" , "avx512vl" ) |
1554 | TARGET_BUILTIN(__builtin_ia32_pmovusqb128_mask, "V16cV2OiV16cUc" , "ncV:128:" , "avx512vl" ) |
1555 | TARGET_BUILTIN(__builtin_ia32_pmovusqb128mem_mask, "vV16c*V2OiUc" , "nV:128:" , "avx512vl" ) |
1556 | TARGET_BUILTIN(__builtin_ia32_pmovusqb256_mask, "V16cV4OiV16cUc" , "ncV:256:" , "avx512vl" ) |
1557 | TARGET_BUILTIN(__builtin_ia32_pmovusqb256mem_mask, "vV16c*V4OiUc" , "nV:256:" , "avx512vl" ) |
1558 | TARGET_BUILTIN(__builtin_ia32_pmovusqd128_mask, "V4iV2OiV4iUc" , "ncV:128:" , "avx512vl" ) |
1559 | TARGET_BUILTIN(__builtin_ia32_pmovusqd128mem_mask, "vV4i*V2OiUc" , "nV:128:" , "avx512vl" ) |
1560 | TARGET_BUILTIN(__builtin_ia32_pmovusqd256_mask, "V4iV4OiV4iUc" , "ncV:256:" , "avx512vl" ) |
1561 | TARGET_BUILTIN(__builtin_ia32_pmovusqd256mem_mask, "vV4i*V4OiUc" , "nV:256:" , "avx512vl" ) |
1562 | TARGET_BUILTIN(__builtin_ia32_pmovusqw128_mask, "V8sV2OiV8sUc" , "ncV:128:" , "avx512vl" ) |
1563 | TARGET_BUILTIN(__builtin_ia32_pmovusqw128mem_mask, "vV8s*V2OiUc" , "nV:128:" , "avx512vl" ) |
1564 | TARGET_BUILTIN(__builtin_ia32_pmovusqw256_mask, "V8sV4OiV8sUc" , "ncV:256:" , "avx512vl" ) |
1565 | TARGET_BUILTIN(__builtin_ia32_pmovusqw256mem_mask, "vV8s*V4OiUc" , "nV:256:" , "avx512vl" ) |
1566 | TARGET_BUILTIN(__builtin_ia32_pmovdb512_mask, "V16cV16iV16cUs" , "ncV:512:" , "avx512f,evex512" ) |
1567 | TARGET_BUILTIN(__builtin_ia32_pmovdb512mem_mask, "vV16c*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1568 | TARGET_BUILTIN(__builtin_ia32_pmovwb512mem_mask, "vV32c*V32sUi" , "nV:512:" , "avx512bw,evex512" ) |
1569 | TARGET_BUILTIN(__builtin_ia32_pmovdw512_mask, "V16sV16iV16sUs" , "ncV:512:" , "avx512f,evex512" ) |
1570 | TARGET_BUILTIN(__builtin_ia32_pmovdw512mem_mask, "vV16s*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1571 | TARGET_BUILTIN(__builtin_ia32_pmovqb512_mask, "V16cV8OiV16cUc" , "ncV:512:" , "avx512f,evex512" ) |
1572 | TARGET_BUILTIN(__builtin_ia32_pmovqb512mem_mask, "vV16c*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1573 | TARGET_BUILTIN(__builtin_ia32_pmovqd512_mask, "V8iV8OiV8iUc" , "ncV:512:" , "avx512f,evex512" ) |
1574 | TARGET_BUILTIN(__builtin_ia32_pmovqd512mem_mask, "vV8i*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1575 | TARGET_BUILTIN(__builtin_ia32_pmovqw512_mask, "V8sV8OiV8sUc" , "ncV:512:" , "avx512f,evex512" ) |
1576 | TARGET_BUILTIN(__builtin_ia32_pmovqw512mem_mask, "vV8s*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1577 | TARGET_BUILTIN(__builtin_ia32_pmovdb128_mask, "V16cV4iV16cUc" , "ncV:128:" , "avx512vl" ) |
1578 | TARGET_BUILTIN(__builtin_ia32_pmovwb128mem_mask, "vV16c*V8sUc" , "nV:128:" , "avx512vl,avx512bw" ) |
1579 | TARGET_BUILTIN(__builtin_ia32_pmovdb128mem_mask, "vV16c*V4iUc" , "nV:128:" , "avx512vl" ) |
1580 | TARGET_BUILTIN(__builtin_ia32_pmovdb256_mask, "V16cV8iV16cUc" , "ncV:256:" , "avx512vl" ) |
1581 | TARGET_BUILTIN(__builtin_ia32_pmovdb256mem_mask, "vV16c*V8iUc" , "nV:256:" , "avx512vl" ) |
1582 | TARGET_BUILTIN(__builtin_ia32_pmovwb256mem_mask, "vV16c*V16sUs" , "nV:256:" , "avx512vl,avx512bw" ) |
1583 | TARGET_BUILTIN(__builtin_ia32_pmovdw128_mask, "V8sV4iV8sUc" , "ncV:128:" , "avx512vl" ) |
1584 | TARGET_BUILTIN(__builtin_ia32_pmovdw128mem_mask, "vV8s*V4iUc" , "nV:128:" , "avx512vl" ) |
1585 | TARGET_BUILTIN(__builtin_ia32_pmovdw256_mask, "V8sV8iV8sUc" , "ncV:256:" , "avx512vl" ) |
1586 | TARGET_BUILTIN(__builtin_ia32_pmovdw256mem_mask, "vV8s*V8iUc" , "nV:256:" , "avx512vl" ) |
1587 | TARGET_BUILTIN(__builtin_ia32_pmovqb128_mask, "V16cV2OiV16cUc" , "ncV:128:" , "avx512vl" ) |
1588 | TARGET_BUILTIN(__builtin_ia32_pmovqb128mem_mask, "vV16c*V2OiUc" , "nV:128:" , "avx512vl" ) |
1589 | TARGET_BUILTIN(__builtin_ia32_pmovqb256_mask, "V16cV4OiV16cUc" , "ncV:256:" , "avx512vl" ) |
1590 | TARGET_BUILTIN(__builtin_ia32_pmovqb256mem_mask, "vV16c*V4OiUc" , "nV:256:" , "avx512vl" ) |
1591 | TARGET_BUILTIN(__builtin_ia32_pmovqd128_mask, "V4iV2OiV4iUc" , "ncV:128:" , "avx512vl" ) |
1592 | TARGET_BUILTIN(__builtin_ia32_pmovqd128mem_mask, "vV4i*V2OiUc" , "nV:128:" , "avx512vl" ) |
1593 | TARGET_BUILTIN(__builtin_ia32_pmovqd256mem_mask, "vV4i*V4OiUc" , "nV:256:" , "avx512vl" ) |
1594 | TARGET_BUILTIN(__builtin_ia32_pmovqw128_mask, "V8sV2OiV8sUc" , "ncV:128:" , "avx512vl" ) |
1595 | TARGET_BUILTIN(__builtin_ia32_pmovqw128mem_mask, "vV8s*V2OiUc" , "nV:128:" , "avx512vl" ) |
1596 | TARGET_BUILTIN(__builtin_ia32_pmovqw256_mask, "V8sV4OiV8sUc" , "ncV:256:" , "avx512vl" ) |
1597 | TARGET_BUILTIN(__builtin_ia32_pmovqw256mem_mask, "vV8s*V4OiUc" , "nV:256:" , "avx512vl" ) |
1598 | TARGET_BUILTIN(__builtin_ia32_extractf32x8_mask, "V8fV16fIiV8fUc" , "ncV:512:" , "avx512dq,evex512" ) |
1599 | TARGET_BUILTIN(__builtin_ia32_extractf64x2_512_mask, "V2dV8dIiV2dUc" , "ncV:512:" , "avx512dq,evex512" ) |
1600 | TARGET_BUILTIN(__builtin_ia32_extracti32x8_mask, "V8iV16iIiV8iUc" , "ncV:512:" , "avx512dq,evex512" ) |
1601 | TARGET_BUILTIN(__builtin_ia32_extracti64x2_512_mask, "V2OiV8OiIiV2OiUc" , "ncV:512:" , "avx512dq,evex512" ) |
1602 | TARGET_BUILTIN(__builtin_ia32_extracti32x4_mask, "V4iV16iIiV4iUc" , "ncV:512:" , "avx512f,evex512" ) |
1603 | TARGET_BUILTIN(__builtin_ia32_extracti64x4_mask, "V4OiV8OiIiV4OiUc" , "ncV:512:" , "avx512f,evex512" ) |
1604 | TARGET_BUILTIN(__builtin_ia32_extractf64x2_256_mask, "V2dV4dIiV2dUc" , "ncV:256:" , "avx512dq,avx512vl" ) |
1605 | TARGET_BUILTIN(__builtin_ia32_extracti64x2_256_mask, "V2OiV4OiIiV2OiUc" , "ncV:256:" , "avx512dq,avx512vl" ) |
1606 | TARGET_BUILTIN(__builtin_ia32_extractf32x4_256_mask, "V4fV8fIiV4fUc" , "ncV:256:" , "avx512vl" ) |
1607 | TARGET_BUILTIN(__builtin_ia32_extracti32x4_256_mask, "V4iV8iIiV4iUc" , "ncV:256:" , "avx512vl" ) |
1608 | TARGET_BUILTIN(__builtin_ia32_insertf32x8, "V16fV16fV8fIi" , "ncV:512:" , "avx512dq,evex512" ) |
1609 | TARGET_BUILTIN(__builtin_ia32_insertf64x2_512, "V8dV8dV2dIi" , "ncV:512:" , "avx512dq,evex512" ) |
1610 | TARGET_BUILTIN(__builtin_ia32_inserti32x8, "V16iV16iV8iIi" , "ncV:512:" , "avx512dq,evex512" ) |
1611 | TARGET_BUILTIN(__builtin_ia32_inserti64x2_512, "V8OiV8OiV2OiIi" , "ncV:512:" , "avx512dq,evex512" ) |
1612 | TARGET_BUILTIN(__builtin_ia32_insertf64x4, "V8dV8dV4dIi" , "ncV:512:" , "avx512f,evex512" ) |
1613 | TARGET_BUILTIN(__builtin_ia32_inserti64x4, "V8OiV8OiV4OiIi" , "ncV:512:" , "avx512f,evex512" ) |
1614 | TARGET_BUILTIN(__builtin_ia32_insertf64x2_256, "V4dV4dV2dIi" , "ncV:256:" , "avx512dq,avx512vl" ) |
1615 | TARGET_BUILTIN(__builtin_ia32_inserti64x2_256, "V4OiV4OiV2OiIi" , "ncV:256:" , "avx512dq,avx512vl" ) |
1616 | TARGET_BUILTIN(__builtin_ia32_insertf32x4_256, "V8fV8fV4fIi" , "ncV:256:" , "avx512vl" ) |
1617 | TARGET_BUILTIN(__builtin_ia32_inserti32x4_256, "V8iV8iV4iIi" , "ncV:256:" , "avx512vl" ) |
1618 | TARGET_BUILTIN(__builtin_ia32_insertf32x4, "V16fV16fV4fIi" , "ncV:512:" , "avx512f,evex512" ) |
1619 | TARGET_BUILTIN(__builtin_ia32_inserti32x4, "V16iV16iV4iIi" , "ncV:512:" , "avx512f,evex512" ) |
1620 | TARGET_BUILTIN(__builtin_ia32_getmantpd128_mask, "V2dV2dIiV2dUc" , "ncV:128:" , "avx512vl" ) |
1621 | TARGET_BUILTIN(__builtin_ia32_getmantpd256_mask, "V4dV4dIiV4dUc" , "ncV:256:" , "avx512vl" ) |
1622 | TARGET_BUILTIN(__builtin_ia32_getmantps128_mask, "V4fV4fIiV4fUc" , "ncV:128:" , "avx512vl" ) |
1623 | TARGET_BUILTIN(__builtin_ia32_getmantps256_mask, "V8fV8fIiV8fUc" , "ncV:256:" , "avx512vl" ) |
1624 | TARGET_BUILTIN(__builtin_ia32_getmantpd512_mask, "V8dV8dIiV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
1625 | TARGET_BUILTIN(__builtin_ia32_getmantps512_mask, "V16fV16fIiV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
1626 | TARGET_BUILTIN(__builtin_ia32_getexppd512_mask, "V8dV8dV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
1627 | TARGET_BUILTIN(__builtin_ia32_getexpps512_mask, "V16fV16fV16fUsIi" , "ncV:512:" , "avx512f,evex512" ) |
1628 | TARGET_BUILTIN(__builtin_ia32_vfmaddss3_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1629 | TARGET_BUILTIN(__builtin_ia32_vfmaddss3_maskz, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1630 | TARGET_BUILTIN(__builtin_ia32_vfmaddss3_mask3, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1631 | TARGET_BUILTIN(__builtin_ia32_vfmaddsd3_mask, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1632 | TARGET_BUILTIN(__builtin_ia32_vfmaddsd3_maskz, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1633 | TARGET_BUILTIN(__builtin_ia32_vfmaddsd3_mask3, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1634 | TARGET_BUILTIN(__builtin_ia32_vfmsubsd3_mask3, "V2dV2dV2dV2dUcIi" , "ncV:128:" , "avx512f" ) |
1635 | TARGET_BUILTIN(__builtin_ia32_vfmsubss3_mask3, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512f" ) |
1636 | TARGET_BUILTIN(__builtin_ia32_permdf512, "V8dV8dIi" , "ncV:512:" , "avx512f,evex512" ) |
1637 | TARGET_BUILTIN(__builtin_ia32_permdi512, "V8OiV8OiIi" , "ncV:512:" , "avx512f,evex512" ) |
1638 | TARGET_BUILTIN(__builtin_ia32_permvarhi512, "V32sV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1639 | TARGET_BUILTIN(__builtin_ia32_permvardf512, "V8dV8dV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1640 | TARGET_BUILTIN(__builtin_ia32_permvardi512, "V8OiV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1641 | TARGET_BUILTIN(__builtin_ia32_permvarsf512, "V16fV16fV16i" , "ncV:512:" , "avx512f,evex512" ) |
1642 | TARGET_BUILTIN(__builtin_ia32_permvarsi512, "V16iV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1643 | TARGET_BUILTIN(__builtin_ia32_permvarqi512, "V64cV64cV64c" , "ncV:512:" , "avx512vbmi,evex512" ) |
1644 | TARGET_BUILTIN(__builtin_ia32_permvarqi128, "V16cV16cV16c" , "ncV:128:" , "avx512vbmi,avx512vl" ) |
1645 | TARGET_BUILTIN(__builtin_ia32_permvarqi256, "V32cV32cV32c" , "ncV:256:" , "avx512vbmi,avx512vl" ) |
1646 | TARGET_BUILTIN(__builtin_ia32_permvarhi128, "V8sV8sV8s" , "ncV:128:" , "avx512bw,avx512vl" ) |
1647 | TARGET_BUILTIN(__builtin_ia32_permvarhi256, "V16sV16sV16s" , "ncV:256:" , "avx512bw,avx512vl" ) |
1648 | TARGET_BUILTIN(__builtin_ia32_permvardf256, "V4dV4dV4Oi" , "ncV:256:" , "avx512vl" ) |
1649 | TARGET_BUILTIN(__builtin_ia32_permvardi256, "V4OiV4OiV4Oi" , "ncV:256:" , "avx512vl" ) |
1650 | TARGET_BUILTIN(__builtin_ia32_fpclasspd128_mask, "UcV2dIiUc" , "ncV:128:" , "avx512dq,avx512vl" ) |
1651 | TARGET_BUILTIN(__builtin_ia32_fpclasspd256_mask, "UcV4dIiUc" , "ncV:256:" , "avx512dq,avx512vl" ) |
1652 | TARGET_BUILTIN(__builtin_ia32_fpclassps128_mask, "UcV4fIiUc" , "ncV:128:" , "avx512dq,avx512vl" ) |
1653 | TARGET_BUILTIN(__builtin_ia32_fpclassps256_mask, "UcV8fIiUc" , "ncV:256:" , "avx512dq,avx512vl" ) |
1654 | TARGET_BUILTIN(__builtin_ia32_fpclassps512_mask, "UsV16fIiUs" , "ncV:512:" , "avx512dq,evex512" ) |
1655 | TARGET_BUILTIN(__builtin_ia32_fpclasspd512_mask, "UcV8dIiUc" , "ncV:512:" , "avx512dq,evex512" ) |
1656 | TARGET_BUILTIN(__builtin_ia32_fpclasssd_mask, "UcV2dIiUc" , "ncV:128:" , "avx512dq" ) |
1657 | TARGET_BUILTIN(__builtin_ia32_fpclassss_mask, "UcV4fIiUc" , "ncV:128:" , "avx512dq" ) |
1658 | TARGET_BUILTIN(__builtin_ia32_kaddqi, "UcUcUc" , "nc" , "avx512dq" ) |
1659 | TARGET_BUILTIN(__builtin_ia32_kaddhi, "UsUsUs" , "nc" , "avx512dq" ) |
1660 | TARGET_BUILTIN(__builtin_ia32_kaddsi, "UiUiUi" , "nc" , "avx512bw" ) |
1661 | TARGET_BUILTIN(__builtin_ia32_kadddi, "UOiUOiUOi" , "nc" , "avx512bw" ) |
1662 | TARGET_BUILTIN(__builtin_ia32_kandqi, "UcUcUc" , "nc" , "avx512dq" ) |
1663 | TARGET_BUILTIN(__builtin_ia32_kandhi, "UsUsUs" , "nc" , "avx512f" ) |
1664 | TARGET_BUILTIN(__builtin_ia32_kandsi, "UiUiUi" , "nc" , "avx512bw" ) |
1665 | TARGET_BUILTIN(__builtin_ia32_kanddi, "UOiUOiUOi" , "nc" , "avx512bw" ) |
1666 | TARGET_BUILTIN(__builtin_ia32_kandnqi, "UcUcUc" , "nc" , "avx512dq" ) |
1667 | TARGET_BUILTIN(__builtin_ia32_kandnhi, "UsUsUs" , "nc" , "avx512f" ) |
1668 | TARGET_BUILTIN(__builtin_ia32_kandnsi, "UiUiUi" , "nc" , "avx512bw" ) |
1669 | TARGET_BUILTIN(__builtin_ia32_kandndi, "UOiUOiUOi" , "nc" , "avx512bw" ) |
1670 | TARGET_BUILTIN(__builtin_ia32_korqi, "UcUcUc" , "nc" , "avx512dq" ) |
1671 | TARGET_BUILTIN(__builtin_ia32_korhi, "UsUsUs" , "nc" , "avx512f" ) |
1672 | TARGET_BUILTIN(__builtin_ia32_korsi, "UiUiUi" , "nc" , "avx512bw" ) |
1673 | TARGET_BUILTIN(__builtin_ia32_kordi, "UOiUOiUOi" , "nc" , "avx512bw" ) |
1674 | TARGET_BUILTIN(__builtin_ia32_kortestcqi, "iUcUc" , "nc" , "avx512dq" ) |
1675 | TARGET_BUILTIN(__builtin_ia32_kortestzqi, "iUcUc" , "nc" , "avx512dq" ) |
1676 | TARGET_BUILTIN(__builtin_ia32_kortestchi, "iUsUs" , "nc" , "avx512f" ) |
1677 | TARGET_BUILTIN(__builtin_ia32_kortestzhi, "iUsUs" , "nc" , "avx512f" ) |
1678 | TARGET_BUILTIN(__builtin_ia32_kortestcsi, "iUiUi" , "nc" , "avx512bw" ) |
1679 | TARGET_BUILTIN(__builtin_ia32_kortestzsi, "iUiUi" , "nc" , "avx512bw" ) |
1680 | TARGET_BUILTIN(__builtin_ia32_kortestcdi, "iUOiUOi" , "nc" , "avx512bw" ) |
1681 | TARGET_BUILTIN(__builtin_ia32_kortestzdi, "iUOiUOi" , "nc" , "avx512bw" ) |
1682 | TARGET_BUILTIN(__builtin_ia32_ktestcqi, "iUcUc" , "nc" , "avx512dq" ) |
1683 | TARGET_BUILTIN(__builtin_ia32_ktestzqi, "iUcUc" , "nc" , "avx512dq" ) |
1684 | TARGET_BUILTIN(__builtin_ia32_ktestchi, "iUsUs" , "nc" , "avx512dq" ) |
1685 | TARGET_BUILTIN(__builtin_ia32_ktestzhi, "iUsUs" , "nc" , "avx512dq" ) |
1686 | TARGET_BUILTIN(__builtin_ia32_ktestcsi, "iUiUi" , "nc" , "avx512bw" ) |
1687 | TARGET_BUILTIN(__builtin_ia32_ktestzsi, "iUiUi" , "nc" , "avx512bw" ) |
1688 | TARGET_BUILTIN(__builtin_ia32_ktestcdi, "iUOiUOi" , "nc" , "avx512bw" ) |
1689 | TARGET_BUILTIN(__builtin_ia32_ktestzdi, "iUOiUOi" , "nc" , "avx512bw" ) |
1690 | TARGET_BUILTIN(__builtin_ia32_kunpckhi, "UsUsUs" , "nc" , "avx512f" ) |
1691 | TARGET_BUILTIN(__builtin_ia32_kxnorqi, "UcUcUc" , "nc" , "avx512dq" ) |
1692 | TARGET_BUILTIN(__builtin_ia32_kxnorhi, "UsUsUs" , "nc" , "avx512f" ) |
1693 | TARGET_BUILTIN(__builtin_ia32_kxnorsi, "UiUiUi" , "nc" , "avx512bw" ) |
1694 | TARGET_BUILTIN(__builtin_ia32_kxnordi, "UOiUOiUOi" , "nc" , "avx512bw" ) |
1695 | TARGET_BUILTIN(__builtin_ia32_kxorqi, "UcUcUc" , "nc" , "avx512dq" ) |
1696 | TARGET_BUILTIN(__builtin_ia32_kxorhi, "UsUsUs" , "nc" , "avx512f" ) |
1697 | TARGET_BUILTIN(__builtin_ia32_kxorsi, "UiUiUi" , "nc" , "avx512bw" ) |
1698 | TARGET_BUILTIN(__builtin_ia32_kxordi, "UOiUOiUOi" , "nc" , "avx512bw" ) |
1699 | TARGET_BUILTIN(__builtin_ia32_kshiftliqi, "UcUcIUi" , "nc" , "avx512dq" ) |
1700 | TARGET_BUILTIN(__builtin_ia32_kshiftlihi, "UsUsIUi" , "nc" , "avx512f" ) |
1701 | TARGET_BUILTIN(__builtin_ia32_kshiftlisi, "UiUiIUi" , "nc" , "avx512bw" ) |
1702 | TARGET_BUILTIN(__builtin_ia32_kshiftlidi, "UOiUOiIUi" , "nc" , "avx512bw" ) |
1703 | TARGET_BUILTIN(__builtin_ia32_kshiftriqi, "UcUcIUi" , "nc" , "avx512dq" ) |
1704 | TARGET_BUILTIN(__builtin_ia32_kshiftrihi, "UsUsIUi" , "nc" , "avx512f" ) |
1705 | TARGET_BUILTIN(__builtin_ia32_kshiftrisi, "UiUiIUi" , "nc" , "avx512bw" ) |
1706 | TARGET_BUILTIN(__builtin_ia32_kshiftridi, "UOiUOiIUi" , "nc" , "avx512bw" ) |
1707 | TARGET_BUILTIN(__builtin_ia32_kmovb, "UcUc" , "nc" , "avx512dq" ) |
1708 | TARGET_BUILTIN(__builtin_ia32_kmovw, "UsUs" , "nc" , "avx512f" ) |
1709 | TARGET_BUILTIN(__builtin_ia32_kmovd, "UiUi" , "nc" , "avx512bw" ) |
1710 | TARGET_BUILTIN(__builtin_ia32_kmovq, "UOiUOi" , "nc" , "avx512bw" ) |
1711 | TARGET_BUILTIN(__builtin_ia32_palignr512, "V64cV64cV64cIi" , "ncV:512:" , "avx512bw,evex512" ) |
1712 | TARGET_BUILTIN(__builtin_ia32_dbpsadbw128, "V8sV16cV16cIi" , "ncV:128:" , "avx512bw,avx512vl" ) |
1713 | TARGET_BUILTIN(__builtin_ia32_dbpsadbw256, "V16sV32cV32cIi" , "ncV:256:" , "avx512bw,avx512vl" ) |
1714 | TARGET_BUILTIN(__builtin_ia32_dbpsadbw512, "V32sV64cV64cIi" , "ncV:512:" , "avx512bw,evex512" ) |
1715 | TARGET_BUILTIN(__builtin_ia32_psadbw512, "V8OiV64cV64c" , "ncV:512:" , "avx512bw,evex512" ) |
1716 | TARGET_BUILTIN(__builtin_ia32_compressdf512_mask, "V8dV8dV8dUc" , "ncV:512:" , "avx512f,evex512" ) |
1717 | TARGET_BUILTIN(__builtin_ia32_compressdi512_mask, "V8OiV8OiV8OiUc" , "ncV:512:" , "avx512f,evex512" ) |
1718 | TARGET_BUILTIN(__builtin_ia32_compresshi512_mask, "V32sV32sV32sUi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1719 | TARGET_BUILTIN(__builtin_ia32_compressqi512_mask, "V64cV64cV64cUOi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1720 | TARGET_BUILTIN(__builtin_ia32_compresssf512_mask, "V16fV16fV16fUs" , "ncV:512:" , "avx512f,evex512" ) |
1721 | TARGET_BUILTIN(__builtin_ia32_compresssi512_mask, "V16iV16iV16iUs" , "ncV:512:" , "avx512f,evex512" ) |
1722 | TARGET_BUILTIN(__builtin_ia32_cmpsd_mask, "UcV2dV2dIiUcIi" , "ncV:128:" , "avx512f" ) |
1723 | TARGET_BUILTIN(__builtin_ia32_cmpss_mask, "UcV4fV4fIiUcIi" , "ncV:128:" , "avx512f" ) |
1724 | TARGET_BUILTIN(__builtin_ia32_pshufd512, "V16iV16iIi" , "ncV:512:" , "avx512f,evex512" ) |
1725 | TARGET_BUILTIN(__builtin_ia32_expanddf512_mask, "V8dV8dV8dUc" , "ncV:512:" , "avx512f,evex512" ) |
1726 | TARGET_BUILTIN(__builtin_ia32_expanddi512_mask, "V8OiV8OiV8OiUc" , "ncV:512:" , "avx512f,evex512" ) |
1727 | TARGET_BUILTIN(__builtin_ia32_expandhi512_mask, "V32sV32sV32sUi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1728 | TARGET_BUILTIN(__builtin_ia32_expandqi512_mask, "V64cV64cV64cUOi" , "ncV:512:" , "avx512vbmi2,evex512" ) |
1729 | TARGET_BUILTIN(__builtin_ia32_expandloaddf512_mask, "V8dV8dC*V8dUc" , "nV:512:" , "avx512f,evex512" ) |
1730 | TARGET_BUILTIN(__builtin_ia32_expandloaddi512_mask, "V8OiV8OiC*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1731 | TARGET_BUILTIN(__builtin_ia32_expandloadhi512_mask, "V32sV32sC*V32sUi" , "nV:512:" , "avx512vbmi2,evex512" ) |
1732 | TARGET_BUILTIN(__builtin_ia32_expandloadqi512_mask, "V64cV64cC*V64cUOi" , "nV:512:" , "avx512vbmi2,evex512" ) |
1733 | TARGET_BUILTIN(__builtin_ia32_expandloadsf512_mask, "V16fV16fC*V16fUs" , "nV:512:" , "avx512f,evex512" ) |
1734 | TARGET_BUILTIN(__builtin_ia32_expandloadsi512_mask, "V16iV16iC*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1735 | TARGET_BUILTIN(__builtin_ia32_expandsf512_mask, "V16fV16fV16fUs" , "ncV:512:" , "avx512f,evex512" ) |
1736 | TARGET_BUILTIN(__builtin_ia32_expandsi512_mask, "V16iV16iV16iUs" , "ncV:512:" , "avx512f,evex512" ) |
1737 | TARGET_BUILTIN(__builtin_ia32_cvtps2pd512_mask, "V8dV8fV8dUcIi" , "ncV:512:" , "avx512f,evex512" ) |
1738 | TARGET_BUILTIN(__builtin_ia32_compressstoredf512_mask, "vV8d*V8dUc" , "nV:512:" , "avx512f,evex512" ) |
1739 | TARGET_BUILTIN(__builtin_ia32_compressstoredi512_mask, "vV8Oi*V8OiUc" , "nV:512:" , "avx512f,evex512" ) |
1740 | TARGET_BUILTIN(__builtin_ia32_compressstorehi512_mask, "vV32s*V32sUi" , "nV:512:" , "avx512vbmi2,evex512" ) |
1741 | TARGET_BUILTIN(__builtin_ia32_compressstoreqi512_mask, "vV64c*V64cUOi" , "nV:512:" , "avx512vbmi2,evex512" ) |
1742 | TARGET_BUILTIN(__builtin_ia32_compressstoresf512_mask, "vV16f*V16fUs" , "nV:512:" , "avx512f,evex512" ) |
1743 | TARGET_BUILTIN(__builtin_ia32_compressstoresi512_mask, "vV16i*V16iUs" , "nV:512:" , "avx512f,evex512" ) |
1744 | TARGET_BUILTIN(__builtin_ia32_vcvtph2ps_mask, "V4fV8sV4fUc" , "ncV:128:" , "avx512vl" ) |
1745 | TARGET_BUILTIN(__builtin_ia32_vcvtph2ps256_mask, "V8fV8sV8fUc" , "ncV:256:" , "avx512vl" ) |
1746 | TARGET_BUILTIN(__builtin_ia32_vcvtps2ph_mask, "V8sV4fIiV8sUc" , "ncV:128:" , "avx512vl" ) |
1747 | TARGET_BUILTIN(__builtin_ia32_vcvtps2ph256_mask, "V8sV8fIiV8sUc" , "ncV:256:" , "avx512vl" ) |
1748 | TARGET_BUILTIN(__builtin_ia32_cvtw2mask512, "UiV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1749 | TARGET_BUILTIN(__builtin_ia32_cvtw2mask128, "UcV8s" , "ncV:128:" , "avx512bw,avx512vl" ) |
1750 | TARGET_BUILTIN(__builtin_ia32_cvtw2mask256, "UsV16s" , "ncV:256:" , "avx512bw,avx512vl" ) |
1751 | TARGET_BUILTIN(__builtin_ia32_cvtsd2ss_round_mask, "V4fV4fV2dV4fUcIi" , "ncV:128:" , "avx512f" ) |
1752 | TARGET_BUILTIN(__builtin_ia32_cvtsi2ss32, "V4fV4fiIi" , "ncV:128:" , "avx512f" ) |
1753 | TARGET_BUILTIN(__builtin_ia32_cvtss2sd_round_mask, "V2dV2dV4fV2dUcIi" , "ncV:128:" , "avx512f" ) |
1754 | TARGET_BUILTIN(__builtin_ia32_cvtusi2ss32, "V4fV4fUiIi" , "ncV:128:" , "avx512f" ) |
1755 | TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb512, "V64cV64cV64c" , "ncV:512:" , "avx512vbmi,evex512" ) |
1756 | TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb128, "V16cV16cV16c" , "ncV:128:" , "avx512vbmi,avx512vl" ) |
1757 | TARGET_BUILTIN(__builtin_ia32_vpmultishiftqb256, "V32cV32cV32c" , "ncV:256:" , "avx512vbmi,avx512vl" ) |
1758 | |
1759 | // bf16 intrinsics |
1760 | TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_128, "V8yV4fV4f" , "ncV:128:" , "avx512bf16,avx512vl" ) |
1761 | TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_256, "V16yV8fV8f" , "ncV:256:" , "avx512bf16,avx512vl" ) |
1762 | TARGET_BUILTIN(__builtin_ia32_cvtne2ps2bf16_512, "V32yV16fV16f" , "ncV:512:" , "avx512bf16,evex512" ) |
1763 | TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_128_mask, "V8yV4fV8yUc" , "ncV:128:" , "avx512bf16,avx512vl" ) |
1764 | TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_256_mask, "V8yV8fV8yUc" , "ncV:256:" , "avx512bf16,avx512vl" ) |
1765 | TARGET_BUILTIN(__builtin_ia32_cvtneps2bf16_512_mask, "V16yV16fV16yUs" , "ncV:512:" , "avx512bf16,evex512" ) |
1766 | TARGET_BUILTIN(__builtin_ia32_dpbf16ps_128, "V4fV4fV8yV8y" , "ncV:128:" , "avx512bf16,avx512vl" ) |
1767 | TARGET_BUILTIN(__builtin_ia32_dpbf16ps_256, "V8fV8fV16yV16y" , "ncV:256:" , "avx512bf16,avx512vl" ) |
1768 | TARGET_BUILTIN(__builtin_ia32_dpbf16ps_512, "V16fV16fV32yV32y" , "ncV:512:" , "avx512bf16,evex512" ) |
1769 | TARGET_BUILTIN(__builtin_ia32_cvtsbf162ss_32, "fy" , "nc" , "avx512bf16" ) |
1770 | |
1771 | TARGET_BUILTIN(__builtin_ia32_vp2intersect_q_512, "vV8OiV8OiUc*Uc*" , "nV:512:" , "avx512vp2intersect,evex512" ) |
1772 | TARGET_BUILTIN(__builtin_ia32_vp2intersect_q_256, "vV4OiV4OiUc*Uc*" , "nV:256:" , "avx512vp2intersect,avx512vl" ) |
1773 | TARGET_BUILTIN(__builtin_ia32_vp2intersect_q_128, "vV2OiV2OiUc*Uc*" , "nV:128:" , "avx512vp2intersect,avx512vl" ) |
1774 | TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_512, "vV16iV16iUs*Us*" , "nV:512:" , "avx512vp2intersect,evex512" ) |
1775 | TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_256, "vV8iV8iUc*Uc*" , "nV:256:" , "avx512vp2intersect,avx512vl" ) |
1776 | TARGET_BUILTIN(__builtin_ia32_vp2intersect_d_128, "vV4iV4iUc*Uc*" , "nV:128:" , "avx512vp2intersect,avx512vl" ) |
1777 | |
1778 | // AVX512 fp16 intrinsics |
1779 | TARGET_BUILTIN(__builtin_ia32_vcomish, "iV8xV8xIiIi" , "ncV:128:" , "avx512fp16" ) |
1780 | TARGET_BUILTIN(__builtin_ia32_addph512, "V32xV32xV32xIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1781 | TARGET_BUILTIN(__builtin_ia32_subph512, "V32xV32xV32xIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1782 | TARGET_BUILTIN(__builtin_ia32_mulph512, "V32xV32xV32xIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1783 | TARGET_BUILTIN(__builtin_ia32_divph512, "V32xV32xV32xIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1784 | TARGET_BUILTIN(__builtin_ia32_maxph512, "V32xV32xV32xIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1785 | TARGET_BUILTIN(__builtin_ia32_minph512, "V32xV32xV32xIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1786 | |
1787 | TARGET_BUILTIN(__builtin_ia32_minph256, "V16xV16xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1788 | TARGET_BUILTIN(__builtin_ia32_minph128, "V8xV8xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1789 | TARGET_BUILTIN(__builtin_ia32_maxph256, "V16xV16xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1790 | TARGET_BUILTIN(__builtin_ia32_maxph128, "V8xV8xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1791 | |
1792 | TARGET_BUILTIN(__builtin_ia32_addsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1793 | TARGET_BUILTIN(__builtin_ia32_divsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1794 | TARGET_BUILTIN(__builtin_ia32_mulsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1795 | TARGET_BUILTIN(__builtin_ia32_subsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1796 | TARGET_BUILTIN(__builtin_ia32_maxsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1797 | TARGET_BUILTIN(__builtin_ia32_minsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1798 | TARGET_BUILTIN(__builtin_ia32_cmpph512_mask, "UiV32xV32xIiUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1799 | TARGET_BUILTIN(__builtin_ia32_cmpph256_mask, "UsV16xV16xIiUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1800 | TARGET_BUILTIN(__builtin_ia32_cmpph128_mask, "UcV8xV8xIiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1801 | TARGET_BUILTIN(__builtin_ia32_cmpsh_mask, "UcV8xV8xIiUcIi" , "ncV:128:" , "avx512fp16" ) |
1802 | TARGET_BUILTIN(__builtin_ia32_loadsh128_mask, "V8xV8xC*V8xUc" , "nV:128:" , "avx512fp16" ) |
1803 | TARGET_BUILTIN(__builtin_ia32_storesh128_mask, "vV8x*V8xUc" , "nV:128:" , "avx512fp16" ) |
1804 | |
1805 | TARGET_BUILTIN(__builtin_ia32_rcpph128_mask, "V8xV8xV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1806 | TARGET_BUILTIN(__builtin_ia32_rcpph256_mask, "V16xV16xV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1807 | TARGET_BUILTIN(__builtin_ia32_rcpph512_mask, "V32xV32xV32xUi" , "ncV:512:" , "avx512fp16,evex512" ) |
1808 | TARGET_BUILTIN(__builtin_ia32_rsqrtph128_mask, "V8xV8xV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1809 | TARGET_BUILTIN(__builtin_ia32_rsqrtph256_mask, "V16xV16xV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1810 | TARGET_BUILTIN(__builtin_ia32_rsqrtph512_mask, "V32xV32xV32xUi" , "ncV:512:" , "avx512fp16,evex512" ) |
1811 | TARGET_BUILTIN(__builtin_ia32_getmantph128_mask, "V8xV8xIiV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1812 | TARGET_BUILTIN(__builtin_ia32_getmantph256_mask, "V16xV16xIiV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1813 | TARGET_BUILTIN(__builtin_ia32_getmantph512_mask, "V32xV32xIiV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1814 | |
1815 | TARGET_BUILTIN(__builtin_ia32_getexpph128_mask, "V8xV8xV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1816 | TARGET_BUILTIN(__builtin_ia32_getexpph256_mask, "V16xV16xV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1817 | TARGET_BUILTIN(__builtin_ia32_getexpph512_mask, "V32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1818 | |
1819 | TARGET_BUILTIN(__builtin_ia32_scalefph128_mask, "V8xV8xV8xV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1820 | TARGET_BUILTIN(__builtin_ia32_scalefph256_mask, "V16xV16xV16xV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1821 | TARGET_BUILTIN(__builtin_ia32_scalefph512_mask, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1822 | |
1823 | TARGET_BUILTIN(__builtin_ia32_rndscaleph_128_mask, "V8xV8xIiV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1824 | TARGET_BUILTIN(__builtin_ia32_rndscaleph_256_mask, "V16xV16xIiV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1825 | TARGET_BUILTIN(__builtin_ia32_rndscaleph_mask, "V32xV32xIiV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1826 | TARGET_BUILTIN(__builtin_ia32_reduceph128_mask, "V8xV8xIiV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1827 | TARGET_BUILTIN(__builtin_ia32_reduceph256_mask, "V16xV16xIiV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1828 | TARGET_BUILTIN(__builtin_ia32_reduceph512_mask, "V32xV32xIiV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1829 | TARGET_BUILTIN(__builtin_ia32_rcpsh_mask, "V8xV8xV8xV8xUc" , "ncV:128:" , "avx512fp16" ) |
1830 | TARGET_BUILTIN(__builtin_ia32_rsqrtsh_mask, "V8xV8xV8xV8xUc" , "ncV:128:" , "avx512fp16" ) |
1831 | TARGET_BUILTIN(__builtin_ia32_getmantsh_round_mask, "V8xV8xV8xIiV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1832 | TARGET_BUILTIN(__builtin_ia32_getexpsh128_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1833 | TARGET_BUILTIN(__builtin_ia32_scalefsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1834 | TARGET_BUILTIN(__builtin_ia32_rndscalesh_round_mask, "V8xV8xV8xV8xUcIiIi" , "ncV:128:" , "avx512fp16" ) |
1835 | TARGET_BUILTIN(__builtin_ia32_reducesh_mask, "V8xV8xV8xV8xUcIiIi" , "ncV:128:" , "avx512fp16" ) |
1836 | |
1837 | TARGET_BUILTIN(__builtin_ia32_sqrtph, "V8xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1838 | TARGET_BUILTIN(__builtin_ia32_sqrtph256, "V16xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1839 | TARGET_BUILTIN(__builtin_ia32_sqrtph512, "V32xV32xIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1840 | TARGET_BUILTIN(__builtin_ia32_sqrtsh_round_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1841 | TARGET_BUILTIN(__builtin_ia32_fpclassph128_mask, "UcV8xIiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1842 | TARGET_BUILTIN(__builtin_ia32_fpclassph256_mask, "UsV16xIiUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1843 | TARGET_BUILTIN(__builtin_ia32_fpclassph512_mask, "UiV32xIiUi" , "ncV:512:" , "avx512fp16,evex512" ) |
1844 | TARGET_BUILTIN(__builtin_ia32_fpclasssh_mask, "UcV8xIiUc" , "ncV:128:" , "avx512fp16" ) |
1845 | |
1846 | TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph128_mask, "V8xV2dV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1847 | TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph256_mask, "V8xV4dV8xUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1848 | TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph512_mask, "V8xV8dV8xUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1849 | TARGET_BUILTIN(__builtin_ia32_vcvtph2pd128_mask, "V2dV8xV2dUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1850 | TARGET_BUILTIN(__builtin_ia32_vcvtph2pd256_mask, "V4dV8xV4dUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1851 | TARGET_BUILTIN(__builtin_ia32_vcvtph2pd512_mask, "V8dV8xV8dUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1852 | TARGET_BUILTIN(__builtin_ia32_vcvtsh2ss_round_mask, "V4fV4fV8xV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1853 | TARGET_BUILTIN(__builtin_ia32_vcvtss2sh_round_mask, "V8xV8xV4fV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1854 | TARGET_BUILTIN(__builtin_ia32_vcvtsd2sh_round_mask, "V8xV8xV2dV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1855 | TARGET_BUILTIN(__builtin_ia32_vcvtsh2sd_round_mask, "V2dV2dV8xV2dUcIi" , "ncV:128:" , "avx512fp16" ) |
1856 | TARGET_BUILTIN(__builtin_ia32_vcvtph2w128_mask, "V8sV8xV8sUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1857 | TARGET_BUILTIN(__builtin_ia32_vcvtph2w256_mask, "V16sV16xV16sUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1858 | TARGET_BUILTIN(__builtin_ia32_vcvtph2w512_mask, "V32sV32xV32sUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1859 | TARGET_BUILTIN(__builtin_ia32_vcvttph2w128_mask, "V8sV8xV8sUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1860 | TARGET_BUILTIN(__builtin_ia32_vcvttph2w256_mask, "V16sV16xV16sUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1861 | TARGET_BUILTIN(__builtin_ia32_vcvttph2w512_mask, "V32sV32xV32sUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1862 | TARGET_BUILTIN(__builtin_ia32_vcvtw2ph128_mask, "V8xV8sV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1863 | TARGET_BUILTIN(__builtin_ia32_vcvtw2ph256_mask, "V16xV16sV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1864 | TARGET_BUILTIN(__builtin_ia32_vcvtw2ph512_mask, "V32xV32sV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1865 | TARGET_BUILTIN(__builtin_ia32_vcvtph2uw128_mask, "V8UsV8xV8UsUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1866 | TARGET_BUILTIN(__builtin_ia32_vcvtph2uw256_mask, "V16UsV16xV16UsUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1867 | TARGET_BUILTIN(__builtin_ia32_vcvtph2uw512_mask, "V32UsV32xV32UsUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1868 | TARGET_BUILTIN(__builtin_ia32_vcvttph2uw128_mask, "V8UsV8xV8UsUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1869 | TARGET_BUILTIN(__builtin_ia32_vcvttph2uw256_mask, "V16UsV16xV16UsUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1870 | TARGET_BUILTIN(__builtin_ia32_vcvttph2uw512_mask, "V32UsV32xV32UsUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1871 | TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph128_mask, "V8xV8UsV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1872 | TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph256_mask, "V16xV16UsV16xUs" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1873 | TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph512_mask, "V32xV32UsV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1874 | TARGET_BUILTIN(__builtin_ia32_vcvtph2dq128_mask, "V4iV8xV4iUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1875 | TARGET_BUILTIN(__builtin_ia32_vcvtph2dq256_mask, "V8iV8xV8iUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1876 | TARGET_BUILTIN(__builtin_ia32_vcvtph2dq512_mask, "V16iV16xV16iUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1877 | TARGET_BUILTIN(__builtin_ia32_vcvtph2udq128_mask, "V4UiV8xV4UiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1878 | TARGET_BUILTIN(__builtin_ia32_vcvtph2udq256_mask, "V8UiV8xV8UiUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1879 | TARGET_BUILTIN(__builtin_ia32_vcvtph2udq512_mask, "V16UiV16xV16UiUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1880 | TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph128_mask, "V8xV4iV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1881 | TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph256_mask, "V8xV8iV8xUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1882 | TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph512_mask, "V16xV16iV16xUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1883 | TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph128_mask, "V8xV4UiV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1884 | TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph256_mask, "V8xV8UiV8xUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1885 | TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph512_mask, "V16xV16UiV16xUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1886 | TARGET_BUILTIN(__builtin_ia32_vcvttph2dq128_mask, "V4iV8xV4iUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1887 | TARGET_BUILTIN(__builtin_ia32_vcvttph2dq256_mask, "V8iV8xV8iUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1888 | TARGET_BUILTIN(__builtin_ia32_vcvttph2dq512_mask, "V16iV16xV16iUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1889 | TARGET_BUILTIN(__builtin_ia32_vcvttph2udq128_mask, "V4UiV8xV4UiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1890 | TARGET_BUILTIN(__builtin_ia32_vcvttph2udq256_mask, "V8UiV8xV8UiUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1891 | TARGET_BUILTIN(__builtin_ia32_vcvttph2udq512_mask, "V16UiV16xV16UiUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1892 | TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph128_mask, "V8xV2OiV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1893 | TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph256_mask, "V8xV4OiV8xUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1894 | TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph512_mask, "V8xV8OiV8xUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1895 | TARGET_BUILTIN(__builtin_ia32_vcvtph2qq128_mask, "V2OiV8xV2OiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1896 | TARGET_BUILTIN(__builtin_ia32_vcvtph2qq256_mask, "V4OiV8xV4OiUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1897 | TARGET_BUILTIN(__builtin_ia32_vcvtph2qq512_mask, "V8OiV8xV8OiUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1898 | TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph128_mask, "V8xV2UOiV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1899 | TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph256_mask, "V8xV4UOiV8xUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1900 | TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph512_mask, "V8xV8UOiV8xUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1901 | TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq128_mask, "V2UOiV8xV2UOiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1902 | TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq256_mask, "V4UOiV8xV4UOiUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1903 | TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq512_mask, "V8UOiV8xV8UOiUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1904 | TARGET_BUILTIN(__builtin_ia32_vcvttph2qq128_mask, "V2OiV8xV2OiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1905 | TARGET_BUILTIN(__builtin_ia32_vcvttph2qq256_mask, "V4OiV8xV4OiUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1906 | TARGET_BUILTIN(__builtin_ia32_vcvttph2qq512_mask, "V8OiV8xV8OiUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1907 | TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq128_mask, "V2UOiV8xV2UOiUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1908 | TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq256_mask, "V4UOiV8xV4UOiUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1909 | TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq512_mask, "V8UOiV8xV8UOiUcIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1910 | TARGET_BUILTIN(__builtin_ia32_vcvtsh2si32, "iV8xIi" , "ncV:128:" , "avx512fp16" ) |
1911 | TARGET_BUILTIN(__builtin_ia32_vcvtsh2usi32, "UiV8xIi" , "ncV:128:" , "avx512fp16" ) |
1912 | TARGET_BUILTIN(__builtin_ia32_vcvtusi2sh, "V8xV8xUiIi" , "ncV:128:" , "avx512fp16" ) |
1913 | TARGET_BUILTIN(__builtin_ia32_vcvtsi2sh, "V8xV8xiIi" , "ncV:128:" , "avx512fp16" ) |
1914 | TARGET_BUILTIN(__builtin_ia32_vcvttsh2si32, "iV8xIi" , "ncV:128:" , "avx512fp16" ) |
1915 | TARGET_BUILTIN(__builtin_ia32_vcvttsh2usi32, "UiV8xIi" , "ncV:128:" , "avx512fp16" ) |
1916 | |
1917 | TARGET_BUILTIN(__builtin_ia32_vcvtph2psx128_mask, "V4fV8xV4fUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1918 | TARGET_BUILTIN(__builtin_ia32_vcvtph2psx256_mask, "V8fV8xV8fUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1919 | TARGET_BUILTIN(__builtin_ia32_vcvtph2psx512_mask, "V16fV16xV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1920 | TARGET_BUILTIN(__builtin_ia32_vcvtps2phx128_mask, "V8xV4fV8xUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1921 | TARGET_BUILTIN(__builtin_ia32_vcvtps2phx256_mask, "V8xV8fV8xUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1922 | TARGET_BUILTIN(__builtin_ia32_vcvtps2phx512_mask, "V16xV16fV16xUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1923 | |
1924 | TARGET_BUILTIN(__builtin_ia32_vfmaddph, "V8xV8xV8xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1925 | TARGET_BUILTIN(__builtin_ia32_vfmaddph256, "V16xV16xV16xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1926 | TARGET_BUILTIN(__builtin_ia32_vfmaddph512_mask, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1927 | TARGET_BUILTIN(__builtin_ia32_vfmaddph512_mask3, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1928 | TARGET_BUILTIN(__builtin_ia32_vfmaddph512_maskz, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1929 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubph, "V8xV8xV8xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1930 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubph256, "V16xV16xV16xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1931 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubph512_mask, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1932 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubph512_maskz, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1933 | TARGET_BUILTIN(__builtin_ia32_vfmaddsubph512_mask3, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1934 | |
1935 | TARGET_BUILTIN(__builtin_ia32_vfmsubaddph512_mask3, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1936 | TARGET_BUILTIN(__builtin_ia32_vfmsubph512_mask3, "V32xV32xV32xV32xUiIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1937 | |
1938 | TARGET_BUILTIN(__builtin_ia32_vfmaddsh3_mask, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1939 | TARGET_BUILTIN(__builtin_ia32_vfmaddsh3_maskz, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1940 | TARGET_BUILTIN(__builtin_ia32_vfmaddsh3_mask3, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1941 | TARGET_BUILTIN(__builtin_ia32_vfmsubsh3_mask3, "V8xV8xV8xV8xUcIi" , "ncV:128:" , "avx512fp16" ) |
1942 | |
1943 | TARGET_BUILTIN(__builtin_ia32_vfmaddcph128_mask, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1944 | TARGET_BUILTIN(__builtin_ia32_vfmaddcph128_maskz, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1945 | TARGET_BUILTIN(__builtin_ia32_vfmaddcph256_mask, "V8fV8fV8fV8fUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1946 | TARGET_BUILTIN(__builtin_ia32_vfmaddcph256_maskz, "V8fV8fV8fV8fUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1947 | TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_mask, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1948 | TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_maskz, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1949 | TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_mask3, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1950 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcph128_mask, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1951 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcph128_maskz, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1952 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcph256_mask, "V8fV8fV8fV8fUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1953 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcph256_maskz, "V8fV8fV8fV8fUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1954 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcph512_mask, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1955 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcph512_maskz, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1956 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcph512_mask3, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1957 | TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1958 | TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_maskz, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1959 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1960 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_maskz, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1961 | TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1962 | TARGET_BUILTIN(__builtin_ia32_vfmaddcsh_round_mask3, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1963 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_round_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1964 | TARGET_BUILTIN(__builtin_ia32_vfcmaddcsh_round_mask3, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1965 | |
1966 | TARGET_BUILTIN(__builtin_ia32_vfmulcsh_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1967 | TARGET_BUILTIN(__builtin_ia32_vfcmulcsh_mask, "V4fV4fV4fV4fUcIi" , "ncV:128:" , "avx512fp16" ) |
1968 | TARGET_BUILTIN(__builtin_ia32_vfmulcph128_mask, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1969 | TARGET_BUILTIN(__builtin_ia32_vfmulcph256_mask, "V8fV8fV8fV8fUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1970 | TARGET_BUILTIN(__builtin_ia32_vfmulcph512_mask, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1971 | TARGET_BUILTIN(__builtin_ia32_vfcmulcph128_mask, "V4fV4fV4fV4fUc" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1972 | TARGET_BUILTIN(__builtin_ia32_vfcmulcph256_mask, "V8fV8fV8fV8fUc" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1973 | TARGET_BUILTIN(__builtin_ia32_vfcmulcph512_mask, "V16fV16fV16fV16fUsIi" , "ncV:512:" , "avx512fp16,evex512" ) |
1974 | |
1975 | // generic select intrinsics |
1976 | TARGET_BUILTIN(__builtin_ia32_selectb_128, "V16cUsV16cV16c" , "ncV:128:" , "avx512bw,avx512vl" ) |
1977 | TARGET_BUILTIN(__builtin_ia32_selectb_256, "V32cUiV32cV32c" , "ncV:256:" , "avx512bw,avx512vl" ) |
1978 | TARGET_BUILTIN(__builtin_ia32_selectb_512, "V64cUOiV64cV64c" , "ncV:512:" , "avx512bw,evex512" ) |
1979 | TARGET_BUILTIN(__builtin_ia32_selectw_128, "V8sUcV8sV8s" , "ncV:128:" , "avx512bw,avx512vl" ) |
1980 | TARGET_BUILTIN(__builtin_ia32_selectw_256, "V16sUsV16sV16s" , "ncV:256:" , "avx512bw,avx512vl" ) |
1981 | TARGET_BUILTIN(__builtin_ia32_selectw_512, "V32sUiV32sV32s" , "ncV:512:" , "avx512bw,evex512" ) |
1982 | TARGET_BUILTIN(__builtin_ia32_selectd_128, "V4iUcV4iV4i" , "ncV:128:" , "avx512vl" ) |
1983 | TARGET_BUILTIN(__builtin_ia32_selectd_256, "V8iUcV8iV8i" , "ncV:256:" , "avx512vl" ) |
1984 | TARGET_BUILTIN(__builtin_ia32_selectd_512, "V16iUsV16iV16i" , "ncV:512:" , "avx512f,evex512" ) |
1985 | TARGET_BUILTIN(__builtin_ia32_selectph_128, "V8xUcV8xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
1986 | TARGET_BUILTIN(__builtin_ia32_selectph_256, "V16xUsV16xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
1987 | TARGET_BUILTIN(__builtin_ia32_selectph_512, "V32xUiV32xV32x" , "ncV:512:" , "avx512fp16,evex512" ) |
1988 | TARGET_BUILTIN(__builtin_ia32_selectpbf_128, "V8yUcV8yV8y" , "ncV:128:" , "avx512bf16,avx512vl" ) |
1989 | TARGET_BUILTIN(__builtin_ia32_selectpbf_256, "V16yUsV16yV16y" , "ncV:256:" , "avx512bf16,avx512vl" ) |
1990 | TARGET_BUILTIN(__builtin_ia32_selectpbf_512, "V32yUiV32yV32y" , "ncV:512:" , "avx512bf16,evex512" ) |
1991 | TARGET_BUILTIN(__builtin_ia32_selectq_128, "V2OiUcV2OiV2Oi" , "ncV:128:" , "avx512vl" ) |
1992 | TARGET_BUILTIN(__builtin_ia32_selectq_256, "V4OiUcV4OiV4Oi" , "ncV:256:" , "avx512vl" ) |
1993 | TARGET_BUILTIN(__builtin_ia32_selectq_512, "V8OiUcV8OiV8Oi" , "ncV:512:" , "avx512f,evex512" ) |
1994 | TARGET_BUILTIN(__builtin_ia32_selectps_128, "V4fUcV4fV4f" , "ncV:128:" , "avx512vl" ) |
1995 | TARGET_BUILTIN(__builtin_ia32_selectps_256, "V8fUcV8fV8f" , "ncV:256:" , "avx512vl" ) |
1996 | TARGET_BUILTIN(__builtin_ia32_selectps_512, "V16fUsV16fV16f" , "ncV:512:" , "avx512f,evex512" ) |
1997 | TARGET_BUILTIN(__builtin_ia32_selectpd_128, "V2dUcV2dV2d" , "ncV:128:" , "avx512vl" ) |
1998 | TARGET_BUILTIN(__builtin_ia32_selectpd_256, "V4dUcV4dV4d" , "ncV:256:" , "avx512vl" ) |
1999 | TARGET_BUILTIN(__builtin_ia32_selectpd_512, "V8dUcV8dV8d" , "ncV:512:" , "avx512f,evex512" ) |
2000 | TARGET_BUILTIN(__builtin_ia32_selectsh_128, "V8xUcV8xV8x" , "ncV:128:" , "avx512fp16" ) |
2001 | TARGET_BUILTIN(__builtin_ia32_selectsbf_128, "V8yUcV8yV8y" , "ncV:128:" , "avx512bf16" ) |
2002 | TARGET_BUILTIN(__builtin_ia32_selectss_128, "V4fUcV4fV4f" , "ncV:128:" , "avx512f" ) |
2003 | TARGET_BUILTIN(__builtin_ia32_selectsd_128, "V2dUcV2dV2d" , "ncV:128:" , "avx512f" ) |
2004 | |
2005 | // generic reduction intrinsics |
2006 | TARGET_BUILTIN(__builtin_ia32_reduce_fadd_pd512, "ddV8d" , "ncV:512:" , "avx512f,evex512" ) |
2007 | TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ps512, "ffV16f" , "ncV:512:" , "avx512f,evex512" ) |
2008 | TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph512, "xxV32x" , "ncV:512:" , "avx512fp16,evex512" ) |
2009 | TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph256, "xxV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
2010 | TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ph128, "xxV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
2011 | TARGET_BUILTIN(__builtin_ia32_reduce_fmax_pd512, "dV8d" , "ncV:512:" , "avx512f,evex512" ) |
2012 | TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ps512, "fV16f" , "ncV:512:" , "avx512f,evex512" ) |
2013 | TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph512, "xV32x" , "ncV:512:" , "avx512fp16,evex512" ) |
2014 | TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph256, "xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
2015 | TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ph128, "xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
2016 | TARGET_BUILTIN(__builtin_ia32_reduce_fmin_pd512, "dV8d" , "ncV:512:" , "avx512f,evex512" ) |
2017 | TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ps512, "fV16f" , "ncV:512:" , "avx512f,evex512" ) |
2018 | TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph512, "xV32x" , "ncV:512:" , "avx512fp16,evex512" ) |
2019 | TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph256, "xV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
2020 | TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ph128, "xV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
2021 | TARGET_BUILTIN(__builtin_ia32_reduce_fmul_pd512, "ddV8d" , "ncV:512:" , "avx512f,evex512" ) |
2022 | TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ps512, "ffV16f" , "ncV:512:" , "avx512f,evex512" ) |
2023 | TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph512, "xxV32x" , "ncV:512:" , "avx512fp16,evex512" ) |
2024 | TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph256, "xxV16x" , "ncV:256:" , "avx512fp16,avx512vl" ) |
2025 | TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ph128, "xxV8x" , "ncV:128:" , "avx512fp16,avx512vl" ) |
2026 | |
2027 | // MONITORX/MWAITX |
2028 | TARGET_BUILTIN(__builtin_ia32_monitorx, "vvC*UiUi" , "n" , "mwaitx" ) |
2029 | TARGET_BUILTIN(__builtin_ia32_mwaitx, "vUiUiUi" , "n" , "mwaitx" ) |
2030 | |
2031 | // WAITPKG |
2032 | TARGET_BUILTIN(__builtin_ia32_umonitor, "vvC*" , "n" , "waitpkg" ) |
2033 | TARGET_BUILTIN(__builtin_ia32_umwait, "UcUiUiUi" , "n" , "waitpkg" ) |
2034 | TARGET_BUILTIN(__builtin_ia32_tpause, "UcUiUiUi" , "n" , "waitpkg" ) |
2035 | |
2036 | // CLZERO |
2037 | TARGET_BUILTIN(__builtin_ia32_clzero, "vv*" , "n" , "clzero" ) |
2038 | |
2039 | // CLDEMOTE |
2040 | TARGET_BUILTIN(__builtin_ia32_cldemote, "vvC*" , "n" , "cldemote" ) |
2041 | |
2042 | // Direct Move |
2043 | TARGET_BUILTIN(__builtin_ia32_directstore_u32, "vUi*Ui" , "n" , "movdiri" ) |
2044 | TARGET_BUILTIN(__builtin_ia32_movdir64b, "vv*vC*" , "n" , "movdir64b" ) |
2045 | |
2046 | // PTWRITE |
2047 | TARGET_BUILTIN(__builtin_ia32_ptwrite32, "vUi" , "n" , "ptwrite" ) |
2048 | |
2049 | // INVPCID |
2050 | TARGET_BUILTIN(__builtin_ia32_invpcid, "vUiv*" , "nc" , "invpcid" ) |
2051 | |
2052 | // ENQCMD |
2053 | TARGET_BUILTIN(__builtin_ia32_enqcmd, "Ucv*vC*" , "n" , "enqcmd" ) |
2054 | TARGET_BUILTIN(__builtin_ia32_enqcmds, "Ucv*vC*" , "n" , "enqcmd" ) |
2055 | |
2056 | // KEY LOCKER |
2057 | TARGET_BUILTIN(__builtin_ia32_loadiwkey, "vV2OiV2OiV2OiUi" , "nV:128:" , "kl" ) |
2058 | TARGET_BUILTIN(__builtin_ia32_encodekey128_u32, "UiUiV2Oiv*" , "nV:128:" , "kl" ) |
2059 | TARGET_BUILTIN(__builtin_ia32_encodekey256_u32, "UiUiV2OiV2Oiv*" , "nV:128:" , "kl" ) |
2060 | TARGET_BUILTIN(__builtin_ia32_aesenc128kl_u8, "UcV2Oi*V2OivC*" , "nV:128:" , "kl" ) |
2061 | TARGET_BUILTIN(__builtin_ia32_aesenc256kl_u8, "UcV2Oi*V2OivC*" , "nV:128:" , "kl" ) |
2062 | TARGET_BUILTIN(__builtin_ia32_aesdec128kl_u8, "UcV2Oi*V2OivC*" , "nV:128:" , "kl" ) |
2063 | TARGET_BUILTIN(__builtin_ia32_aesdec256kl_u8, "UcV2Oi*V2OivC*" , "nV:128:" , "kl" ) |
2064 | TARGET_BUILTIN(__builtin_ia32_aesencwide128kl_u8, "UcV2Oi*V2OiC*vC*" , "nV:128:" , "kl,widekl" ) |
2065 | TARGET_BUILTIN(__builtin_ia32_aesencwide256kl_u8, "UcV2Oi*V2OiC*vC*" , "nV:128:" , "kl,widekl" ) |
2066 | TARGET_BUILTIN(__builtin_ia32_aesdecwide128kl_u8, "UcV2Oi*V2OiC*vC*" , "nV:128:" , "kl,widekl" ) |
2067 | TARGET_BUILTIN(__builtin_ia32_aesdecwide256kl_u8, "UcV2Oi*V2OiC*vC*" , "nV:128:" , "kl,widekl" ) |
2068 | |
2069 | // SERIALIZE |
2070 | TARGET_BUILTIN(__builtin_ia32_serialize, "v" , "n" , "serialize" ) |
2071 | |
2072 | // TSXLDTRK |
2073 | TARGET_BUILTIN(__builtin_ia32_xsusldtrk, "v" , "n" , "tsxldtrk" ) |
2074 | TARGET_BUILTIN(__builtin_ia32_xresldtrk, "v" , "n" , "tsxldtrk" ) |
2075 | |
2076 | // RAO-INT |
2077 | TARGET_BUILTIN(__builtin_ia32_aadd32, "vv*Si" , "n" , "raoint" ) |
2078 | TARGET_BUILTIN(__builtin_ia32_aand32, "vv*Si" , "n" , "raoint" ) |
2079 | TARGET_BUILTIN(__builtin_ia32_aor32, "vv*Si" , "n" , "raoint" ) |
2080 | TARGET_BUILTIN(__builtin_ia32_axor32, "vv*Si" , "n" , "raoint" ) |
2081 | |
2082 | // MSVC |
2083 | TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2084 | TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2085 | |
2086 | TARGET_HEADER_BUILTIN(_ReadWriteBarrier, "v" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2087 | TARGET_HEADER_BUILTIN(_ReadBarrier, "v" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2088 | TARGET_HEADER_BUILTIN(_WriteBarrier, "v" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2089 | |
2090 | TARGET_HEADER_BUILTIN(__cpuid, "vi*i" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2091 | TARGET_HEADER_BUILTIN(__cpuidex, "vi*ii" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2092 | |
2093 | TARGET_HEADER_BUILTIN(__emul, "LLiii" , "nch" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2094 | TARGET_HEADER_BUILTIN(__emulu, "ULLiUiUi" , "nch" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2095 | |
2096 | TARGET_HEADER_BUILTIN(_AddressOfReturnAddress, "v*" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2097 | |
2098 | TARGET_HEADER_BUILTIN(__stosb, "vUc*Ucz" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2099 | TARGET_HEADER_BUILTIN(__int2c, "v" , "nhr" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2100 | TARGET_HEADER_BUILTIN(__ud2, "v" , "nhr" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2101 | |
2102 | TARGET_HEADER_BUILTIN(__readfsbyte, "UcUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2103 | TARGET_HEADER_BUILTIN(__readfsword, "UsUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2104 | TARGET_HEADER_BUILTIN(__readfsdword, "UNiUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2105 | TARGET_HEADER_BUILTIN(__readfsqword, "ULLiUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2106 | |
2107 | TARGET_HEADER_BUILTIN(__readgsbyte, "UcUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2108 | TARGET_HEADER_BUILTIN(__readgsword, "UsUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2109 | TARGET_HEADER_BUILTIN(__readgsdword, "UNiUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2110 | TARGET_HEADER_BUILTIN(__readgsqword, "ULLiUNi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2111 | |
2112 | // AVX-VNNI-INT16 |
2113 | TARGET_BUILTIN(__builtin_ia32_vpdpwsud128, "V4iV4iV4iV4i" , "nV:128:" , "avxvnniint16" ) |
2114 | TARGET_BUILTIN(__builtin_ia32_vpdpwsud256, "V8iV8iV8iV8i" , "nV:256:" , "avxvnniint16" ) |
2115 | TARGET_BUILTIN(__builtin_ia32_vpdpwsuds128, "V4iV4iV4iV4i" , "nV:128:" , "avxvnniint16" ) |
2116 | TARGET_BUILTIN(__builtin_ia32_vpdpwsuds256, "V8iV8iV8iV8i" , "nV:256:" , "avxvnniint16" ) |
2117 | TARGET_BUILTIN(__builtin_ia32_vpdpwusd128, "V4iV4iV4iV4i" , "nV:128:" , "avxvnniint16" ) |
2118 | TARGET_BUILTIN(__builtin_ia32_vpdpwusd256, "V8iV8iV8iV8i" , "nV:256:" , "avxvnniint16" ) |
2119 | TARGET_BUILTIN(__builtin_ia32_vpdpwusds128, "V4iV4iV4iV4i" , "nV:128:" , "avxvnniint16" ) |
2120 | TARGET_BUILTIN(__builtin_ia32_vpdpwusds256, "V8iV8iV8iV8i" , "nV:256:" , "avxvnniint16" ) |
2121 | TARGET_BUILTIN(__builtin_ia32_vpdpwuud128, "V4iV4iV4iV4i" , "nV:128:" , "avxvnniint16" ) |
2122 | TARGET_BUILTIN(__builtin_ia32_vpdpwuud256, "V8iV8iV8iV8i" , "nV:256:" , "avxvnniint16" ) |
2123 | TARGET_BUILTIN(__builtin_ia32_vpdpwuuds128, "V4iV4iV4iV4i" , "nV:128:" , "avxvnniint16" ) |
2124 | TARGET_BUILTIN(__builtin_ia32_vpdpwuuds256, "V8iV8iV8iV8i" , "nV:256:" , "avxvnniint16" ) |
2125 | |
2126 | // AVX-NE-CONVERT |
2127 | TARGET_BUILTIN(__builtin_ia32_vbcstnebf162ps128, "V4fyC*" , "nV:128:" , "avxneconvert" ) |
2128 | TARGET_BUILTIN(__builtin_ia32_vbcstnebf162ps256, "V8fyC*" , "nV:256:" , "avxneconvert" ) |
2129 | TARGET_BUILTIN(__builtin_ia32_vbcstnesh2ps128, "V4fxC*" , "nV:128:" , "avxneconvert" ) |
2130 | TARGET_BUILTIN(__builtin_ia32_vbcstnesh2ps256, "V8fxC*" , "nV:256:" , "avxneconvert" ) |
2131 | TARGET_BUILTIN(__builtin_ia32_vcvtneebf162ps128, "V4fV8yC*" , "nV:128:" , "avxneconvert" ) |
2132 | TARGET_BUILTIN(__builtin_ia32_vcvtneebf162ps256, "V8fV16yC*" , "nV:256:" , "avxneconvert" ) |
2133 | TARGET_BUILTIN(__builtin_ia32_vcvtneeph2ps128, "V4fV8xC*" , "nV:128:" , "avxneconvert" ) |
2134 | TARGET_BUILTIN(__builtin_ia32_vcvtneeph2ps256, "V8fV16xC*" , "nV:256:" , "avxneconvert" ) |
2135 | TARGET_BUILTIN(__builtin_ia32_vcvtneobf162ps128, "V4fV8yC*" , "nV:128:" , "avxneconvert" ) |
2136 | TARGET_BUILTIN(__builtin_ia32_vcvtneobf162ps256, "V8fV16yC*" , "nV:256:" , "avxneconvert" ) |
2137 | TARGET_BUILTIN(__builtin_ia32_vcvtneoph2ps128, "V4fV8xC*" , "nV:128:" , "avxneconvert" ) |
2138 | TARGET_BUILTIN(__builtin_ia32_vcvtneoph2ps256, "V8fV16xC*" , "nV:256:" , "avxneconvert" ) |
2139 | TARGET_BUILTIN(__builtin_ia32_vcvtneps2bf16128, "V8yV4f" , "nV:128:" , "avx512bf16,avx512vl|avxneconvert" ) |
2140 | TARGET_BUILTIN(__builtin_ia32_vcvtneps2bf16256, "V8yV8f" , "nV:256:" , "avx512bf16,avx512vl|avxneconvert" ) |
2141 | |
2142 | // SHA512 |
2143 | TARGET_BUILTIN(__builtin_ia32_vsha512msg1, "V4ULLiV4ULLiV2ULLi" , "nV:256:" , "sha512" ) |
2144 | TARGET_BUILTIN(__builtin_ia32_vsha512msg2, "V4ULLiV4ULLiV4ULLi" , "nV:256:" , "sha512" ) |
2145 | TARGET_BUILTIN(__builtin_ia32_vsha512rnds2, "V4ULLiV4ULLiV4ULLiV2ULLi" , "nV:256:" , "sha512" ) |
2146 | |
2147 | TARGET_HEADER_BUILTIN(_InterlockedAnd64, "WiWiD*Wi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2148 | TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "WiWiD*" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2149 | TARGET_HEADER_BUILTIN(_InterlockedExchange64, "WiWiD*Wi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2150 | TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "WiWiD*Wi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2151 | TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "WiWiD*Wi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2152 | TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "WiWiD*" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2153 | TARGET_HEADER_BUILTIN(_InterlockedOr64, "WiWiD*Wi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2154 | TARGET_HEADER_BUILTIN(_InterlockedXor64, "WiWiD*Wi" , "nh" , INTRIN_H, ALL_MS_LANGUAGES, "" ) |
2155 | |
2156 | // SM3 |
2157 | TARGET_BUILTIN(__builtin_ia32_vsm3msg1, "V4UiV4UiV4UiV4Ui" , "nV:128:" , "sm3" ) |
2158 | TARGET_BUILTIN(__builtin_ia32_vsm3msg2, "V4UiV4UiV4UiV4Ui" , "nV:128:" , "sm3" ) |
2159 | TARGET_BUILTIN(__builtin_ia32_vsm3rnds2, "V4UiV4UiV4UiV4UiIUi" , "nV:128:" , "sm3" ) |
2160 | |
2161 | // SM4 |
2162 | TARGET_BUILTIN(__builtin_ia32_vsm4key4128, "V4UiV4UiV4Ui" , "nV:128:" , "sm4" ) |
2163 | TARGET_BUILTIN(__builtin_ia32_vsm4key4256, "V8UiV8UiV8Ui" , "nV:256:" , "sm4" ) |
2164 | TARGET_BUILTIN(__builtin_ia32_vsm4rnds4128, "V4UiV4UiV4Ui" , "nV:128:" , "sm4" ) |
2165 | TARGET_BUILTIN(__builtin_ia32_vsm4rnds4256, "V8UiV8UiV8Ui" , "nV:256:" , "sm4" ) |
2166 | |
2167 | #undef BUILTIN |
2168 | #undef TARGET_BUILTIN |
2169 | #undef TARGET_HEADER_BUILTIN |
2170 | |