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1 | /*===---- xsavecintrin.h - XSAVEC intrinsic --------------------------------=== |
---|---|
2 | * |
3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | * See https://llvm.org/LICENSE.txt for license information. |
5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | * |
7 | *===-----------------------------------------------------------------------=== |
8 | */ |
9 | |
10 | #ifndef __IMMINTRIN_H |
11 | #error "Never use <xsavecintrin.h> directly; include <immintrin.h> instead." |
12 | #endif |
13 | |
14 | #ifndef __XSAVECINTRIN_H |
15 | #define __XSAVECINTRIN_H |
16 | |
17 | /* Define the default attributes for the functions in this file. */ |
18 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xsavec"))) |
19 | |
20 | /// Performs a full or partial save of processor state to the memory at |
21 | /// \a __p. The exact state saved depends on the 64-bit mask \a __m and |
22 | /// processor control register \c XCR0. |
23 | /// |
24 | /// \code{.operation} |
25 | /// mask[62:0] := __m[62:0] AND XCR0[62:0] |
26 | /// FOR i := 0 TO 62 |
27 | /// IF mask[i] == 1 |
28 | /// CASE (i) OF |
29 | /// 0: save X87 FPU state |
30 | /// 1: save SSE state |
31 | /// DEFAULT: __p.Ext_Save_Area[i] := ProcessorState[i] |
32 | /// FI |
33 | /// ENDFOR |
34 | /// __p.Header.XSTATE_BV[62:0] := INIT_FUNCTION(mask[62:0]) |
35 | /// \endcode |
36 | /// |
37 | /// \headerfile <immintrin.h> |
38 | /// |
39 | /// This intrinsic corresponds to the \c XSAVEC instruction. |
40 | /// |
41 | /// \param __p |
42 | /// Pointer to the save area; must be 64-byte aligned. |
43 | /// \param __m |
44 | /// A 64-bit mask indicating what state should be saved. |
45 | static __inline__ void __DEFAULT_FN_ATTRS |
46 | _xsavec(void *__p, unsigned long long __m) { |
47 | __builtin_ia32_xsavec(__p, __m); |
48 | } |
49 | |
50 | #ifdef __x86_64__ |
51 | /// Performs a full or partial save of processor state to the memory at |
52 | /// \a __p. The exact state saved depends on the 64-bit mask \a __m and |
53 | /// processor control register \c XCR0. |
54 | /// |
55 | /// \code{.operation} |
56 | /// mask[62:0] := __m[62:0] AND XCR0[62:0] |
57 | /// FOR i := 0 TO 62 |
58 | /// IF mask[i] == 1 |
59 | /// CASE (i) OF |
60 | /// 0: save X87 FPU state |
61 | /// 1: save SSE state |
62 | /// DEFAULT: __p.Ext_Save_Area[i] := ProcessorState[i] |
63 | /// FI |
64 | /// ENDFOR |
65 | /// __p.Header.XSTATE_BV[62:0] := INIT_FUNCTION(mask[62:0]) |
66 | /// \endcode |
67 | /// |
68 | /// \headerfile <immintrin.h> |
69 | /// |
70 | /// This intrinsic corresponds to the \c XSAVEC64 instruction. |
71 | /// |
72 | /// \param __p |
73 | /// Pointer to the save area; must be 64-byte aligned. |
74 | /// \param __m |
75 | /// A 64-bit mask indicating what state should be saved. |
76 | static __inline__ void __DEFAULT_FN_ATTRS |
77 | _xsavec64(void *__p, unsigned long long __m) { |
78 | __builtin_ia32_xsavec64(__p, __m); |
79 | } |
80 | #endif |
81 | |
82 | #undef __DEFAULT_FN_ATTRS |
83 | |
84 | #endif |
85 |
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