1//===- ARM64_32.cpp
2//----------------------------------------------------------===//
3//
4// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5// See https://llvm.org/LICENSE.txt for license information.
6// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7//
8//===----------------------------------------------------------------------===//
9
10#include "Arch/ARM64Common.h"
11#include "InputFiles.h"
12#include "Symbols.h"
13#include "SyntheticSections.h"
14#include "Target.h"
15
16#include "lld/Common/ErrorHandler.h"
17#include "llvm/ADT/SmallVector.h"
18#include "llvm/ADT/StringRef.h"
19#include "llvm/BinaryFormat/MachO.h"
20#include "llvm/Support/Endian.h"
21#include "llvm/Support/MathExtras.h"
22
23using namespace llvm::MachO;
24using namespace llvm::support::endian;
25using namespace lld;
26using namespace lld::macho;
27
28namespace {
29
30struct ARM64_32 : ARM64Common {
31 ARM64_32();
32 void writeStub(uint8_t *buf, const Symbol &) const override;
33 void writeStubHelperHeader(uint8_t *buf) const override;
34 void writeStubHelperEntry(uint8_t *buf, const DylibSymbol &,
35 uint64_t entryAddr) const override;
36 const RelocAttrs &getRelocAttrs(uint8_t type) const override;
37};
38
39} // namespace
40
41// These are very similar to ARM64's relocation attributes, except that we don't
42// have the BYTE8 flag set.
43const RelocAttrs &ARM64_32::getRelocAttrs(uint8_t type) const {
44 static const std::array<RelocAttrs, 11> relocAttrsArray{{
45#define B(x) RelocAttrBits::x
46 {"UNSIGNED", B(UNSIGNED) | B(ABSOLUTE) | B(EXTERN) | B(LOCAL) | B(BYTE4)},
47 {"SUBTRACTOR", B(SUBTRAHEND) | B(EXTERN) | B(BYTE4)},
48 {"BRANCH26", B(PCREL) | B(EXTERN) | B(BRANCH) | B(BYTE4)},
49 {"PAGE21", B(PCREL) | B(EXTERN) | B(BYTE4)},
50 {"PAGEOFF12", B(ABSOLUTE) | B(EXTERN) | B(BYTE4)},
51 {"GOT_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(GOT) | B(BYTE4)},
52 {"GOT_LOAD_PAGEOFF12",
53 B(ABSOLUTE) | B(EXTERN) | B(GOT) | B(LOAD) | B(BYTE4)},
54 {"POINTER_TO_GOT", B(PCREL) | B(EXTERN) | B(GOT) | B(POINTER) | B(BYTE4)},
55 {"TLVP_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(TLV) | B(BYTE4)},
56 {"TLVP_LOAD_PAGEOFF12",
57 B(ABSOLUTE) | B(EXTERN) | B(TLV) | B(LOAD) | B(BYTE4)},
58 {"ADDEND", B(ADDEND)},
59#undef B
60 }};
61 assert(type < relocAttrsArray.size() && "invalid relocation type");
62 if (type >= relocAttrsArray.size())
63 return invalidRelocAttrs;
64 return relocAttrsArray[type];
65}
66
67// The stub code is fairly similar to ARM64's, except that we load pointers into
68// 32-bit 'w' registers, instead of the 64-bit 'x' ones.
69
70static constexpr uint32_t stubCode[] = {
71 0x90000010, // 00: adrp x16, __la_symbol_ptr@page
72 0xb9400210, // 04: ldr w16, [x16, __la_symbol_ptr@pageoff]
73 0xd61f0200, // 08: br x16
74};
75
76void ARM64_32::writeStub(uint8_t *buf8, const Symbol &sym) const {
77 ::writeStub<ILP32>(buf8, stubCode, sym);
78}
79
80static constexpr uint32_t stubHelperHeaderCode[] = {
81 0x90000011, // 00: adrp x17, _dyld_private@page
82 0x91000231, // 04: add x17, x17, _dyld_private@pageoff
83 0xa9bf47f0, // 08: stp x16/x17, [sp, #-16]!
84 0x90000010, // 0c: adrp x16, dyld_stub_binder@page
85 0xb9400210, // 10: ldr w16, [x16, dyld_stub_binder@pageoff]
86 0xd61f0200, // 14: br x16
87};
88
89void ARM64_32::writeStubHelperHeader(uint8_t *buf8) const {
90 ::writeStubHelperHeader<ILP32>(buf8, stubHelperHeaderCode);
91}
92
93static constexpr uint32_t stubHelperEntryCode[] = {
94 0x18000050, // 00: ldr w16, l0
95 0x14000000, // 04: b stubHelperHeader
96 0x00000000, // 08: l0: .long 0
97};
98
99void ARM64_32::writeStubHelperEntry(uint8_t *buf8, const DylibSymbol &sym,
100 uint64_t entryVA) const {
101 ::writeStubHelperEntry(buf8, stubHelperEntryCode, sym, entryVA);
102}
103
104ARM64_32::ARM64_32() : ARM64Common(ILP32()) {
105 cpuType = CPU_TYPE_ARM64_32;
106 cpuSubtype = CPU_SUBTYPE_ARM64_V8;
107
108 stubSize = sizeof(stubCode);
109 stubHelperHeaderSize = sizeof(stubHelperHeaderCode);
110 stubHelperEntrySize = sizeof(stubHelperEntryCode);
111}
112
113TargetInfo *macho::createARM64_32TargetInfo() {
114 static ARM64_32 t;
115 return &t;
116}
117