1 | //===-- Architecture.h ------------------------------------------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #ifndef LLDB_CORE_ARCHITECTURE_H |
10 | #define LLDB_CORE_ARCHITECTURE_H |
11 | |
12 | #include "lldb/Core/PluginInterface.h" |
13 | #include "lldb/Target/DynamicRegisterInfo.h" |
14 | #include "lldb/Target/MemoryTagManager.h" |
15 | |
16 | namespace lldb_private { |
17 | |
18 | class Architecture : public PluginInterface { |
19 | public: |
20 | /// This is currently intended to handle cases where a |
21 | /// program stops at an instruction that won't get executed and it |
22 | /// allows the stop reason, like "breakpoint hit", to be replaced |
23 | /// with a different stop reason like "no stop reason". |
24 | /// |
25 | /// This is specifically used for ARM in Thumb code when we stop in |
26 | /// an IT instruction (if/then/else) where the instruction won't get |
27 | /// executed and therefore it wouldn't be correct to show the program |
28 | /// stopped at the current PC. The code is generic and applies to all |
29 | /// ARM CPUs. |
30 | virtual void OverrideStopInfo(Thread &thread) const = 0; |
31 | |
32 | /// This method is used to get the number of bytes that should be |
33 | /// skipped, from function start address, to reach the first |
34 | /// instruction after the prologue. If overrode, it must return |
35 | /// non-zero only if the current address matches one of the known |
36 | /// function entry points. |
37 | /// |
38 | /// This method is called only if the standard platform-independent |
39 | /// code fails to get the number of bytes to skip, giving the plugin |
40 | /// a chance to try to find the missing info. |
41 | /// |
42 | /// This is specifically used for PPC64, where functions may have |
43 | /// more than one entry point, global and local, so both should |
44 | /// be compared with current address, in order to find out the |
45 | /// number of bytes that should be skipped, in case we are stopped |
46 | /// at either function entry point. |
47 | virtual size_t GetBytesToSkip(Symbol &func, const Address &curr_addr) const { |
48 | return 0; |
49 | } |
50 | |
51 | /// Adjust function breakpoint address, if needed. In some cases, |
52 | /// the function start address is not the right place to set the |
53 | /// breakpoint, specially in functions with multiple entry points. |
54 | /// |
55 | /// This is specifically used for PPC64, for functions that have |
56 | /// both a global and a local entry point. In this case, the |
57 | /// breakpoint is adjusted to the first function address reached |
58 | /// by both entry points. |
59 | virtual void AdjustBreakpointAddress(const Symbol &func, |
60 | Address &addr) const {} |
61 | |
62 | |
63 | /// Get \a load_addr as a callable code load address for this target |
64 | /// |
65 | /// Take \a load_addr and potentially add any address bits that are |
66 | /// needed to make the address callable. For ARM this can set bit |
67 | /// zero (if it already isn't) if \a load_addr is a thumb function. |
68 | /// If \a addr_class is set to AddressClass::eInvalid, then the address |
69 | /// adjustment will always happen. If it is set to an address class |
70 | /// that doesn't have code in it, LLDB_INVALID_ADDRESS will be |
71 | /// returned. |
72 | virtual lldb::addr_t GetCallableLoadAddress( |
73 | lldb::addr_t addr, AddressClass addr_class = AddressClass::eInvalid) const { |
74 | return addr; |
75 | } |
76 | |
77 | /// Get \a load_addr as an opcode for this target. |
78 | /// |
79 | /// Take \a load_addr and potentially strip any address bits that are |
80 | /// needed to make the address point to an opcode. For ARM this can |
81 | /// clear bit zero (if it already isn't) if \a load_addr is a |
82 | /// thumb function and load_addr is in code. |
83 | /// If \a addr_class is set to AddressClass::eInvalid, then the address |
84 | /// adjustment will always happen. If it is set to an address class |
85 | /// that doesn't have code in it, LLDB_INVALID_ADDRESS will be |
86 | /// returned. |
87 | |
88 | virtual lldb::addr_t GetOpcodeLoadAddress( |
89 | lldb::addr_t addr, AddressClass addr_class = AddressClass::eInvalid) const { |
90 | return addr; |
91 | } |
92 | |
93 | // Get load_addr as breakable load address for this target. Take a addr and |
94 | // check if for any reason there is a better address than this to put a |
95 | // breakpoint on. If there is then return that address. For MIPS, if |
96 | // instruction at addr is a delay slot instruction then this method will find |
97 | // the address of its previous instruction and return that address. |
98 | virtual lldb::addr_t GetBreakableLoadAddress(lldb::addr_t addr, |
99 | Target &target) const { |
100 | return addr; |
101 | } |
102 | |
103 | // Returns a pointer to an object that can manage memory tags for this |
104 | // Architecture E.g. masking out tags, unpacking tag streams etc. Returns |
105 | // nullptr if the architecture does not have a memory tagging extension. |
106 | // |
107 | // The return pointer being valid does not mean that the current process has |
108 | // memory tagging enabled, just that a tagging technology exists for this |
109 | // architecture. |
110 | virtual const MemoryTagManager *GetMemoryTagManager() const { |
111 | return nullptr; |
112 | } |
113 | |
114 | // This returns true if a write to the named register should cause lldb to |
115 | // reconfigure its register information. For example on AArch64 writing to vg |
116 | // to change the vector length means lldb has to change the size of registers. |
117 | virtual bool |
118 | RegisterWriteCausesReconfigure(const llvm::StringRef name) const { |
119 | return false; |
120 | } |
121 | |
122 | // Call this after writing a register for which RegisterWriteCausesReconfigure |
123 | // returns true. This method will update the layout of registers according to |
124 | // the new state e.g. the new length of scalable vector registers. |
125 | // Returns true if anything changed, which means existing register values must |
126 | // be invalidated. |
127 | virtual bool (DynamicRegisterInfo ®_info, |
128 | DataExtractor ®_data, |
129 | RegisterContext ®_context) const { |
130 | return false; |
131 | } |
132 | }; |
133 | |
134 | } // namespace lldb_private |
135 | |
136 | #endif // LLDB_CORE_ARCHITECTURE_H |
137 | |