1 | //===-- RegisterInfos_powerpc.h ---------------------------------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===---------------------------------------------------------------------===// |
8 | |
9 | #include <cstddef> |
10 | |
11 | // Computes the offset of the given GPR in the user data area. |
12 | #define GPR_OFFSET(regname) (offsetof(GPR, regname)) |
13 | #define FPR_OFFSET(regname) (sizeof(GPR) + offsetof(FPR, regname)) |
14 | #define VMX_OFFSET(regname) (sizeof(GPR) + sizeof(FPR) + offsetof(VMX, regname)) |
15 | #define GPR_SIZE(regname) (sizeof(((GPR *)NULL)->regname)) |
16 | |
17 | #ifdef DECLARE_REGISTER_INFOS_POWERPC_STRUCT |
18 | |
19 | // Note that the size and offset will be updated by platform-specific classes. |
20 | #define DEFINE_GPR(reg, alt, lldb_kind) \ |
21 | { \ |
22 | #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ |
23 | {dwarf_##reg##_powerpc, \ |
24 | dwarf_##reg##_powerpc, lldb_kind, \ |
25 | LLDB_INVALID_REGNUM, \ |
26 | gpr_##reg##_powerpc }, \ |
27 | NULL, NULL, NULL, \ |
28 | } |
29 | #define DEFINE_FPR(reg, lldb_kind) \ |
30 | { \ |
31 | #reg, NULL, 8, FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \ |
32 | {dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, \ |
33 | lldb_kind, LLDB_INVALID_REGNUM, \ |
34 | fpr_##reg##_powerpc }, \ |
35 | NULL, NULL, NULL, \ |
36 | } |
37 | #define DEFINE_VMX(reg, lldb_kind) \ |
38 | { \ |
39 | #reg, NULL, 16, VMX_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt32, \ |
40 | {dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, \ |
41 | lldb_kind, LLDB_INVALID_REGNUM, \ |
42 | vmx_##reg##_powerpc }, \ |
43 | NULL, NULL, NULL, \ |
44 | } |
45 | |
46 | // General purpose registers. EH_Frame, DWARF, |
47 | // Generic, Process Plugin |
48 | #define POWERPC_REGS \ |
49 | DEFINE_GPR(r0, NULL, LLDB_INVALID_REGNUM) \ |
50 | , DEFINE_GPR(r1, NULL, LLDB_REGNUM_GENERIC_SP), \ |
51 | DEFINE_GPR(r2, NULL, LLDB_INVALID_REGNUM), \ |
52 | DEFINE_GPR(r3, NULL, LLDB_REGNUM_GENERIC_ARG1), \ |
53 | DEFINE_GPR(r4, NULL, LLDB_REGNUM_GENERIC_ARG2), \ |
54 | DEFINE_GPR(r5, NULL, LLDB_REGNUM_GENERIC_ARG3), \ |
55 | DEFINE_GPR(r6, NULL, LLDB_REGNUM_GENERIC_ARG4), \ |
56 | DEFINE_GPR(r7, NULL, LLDB_REGNUM_GENERIC_ARG5), \ |
57 | DEFINE_GPR(r8, NULL, LLDB_REGNUM_GENERIC_ARG6), \ |
58 | DEFINE_GPR(r9, NULL, LLDB_REGNUM_GENERIC_ARG7), \ |
59 | DEFINE_GPR(r10, NULL, LLDB_REGNUM_GENERIC_ARG8), \ |
60 | DEFINE_GPR(r11, NULL, LLDB_INVALID_REGNUM), \ |
61 | DEFINE_GPR(r12, NULL, LLDB_INVALID_REGNUM), \ |
62 | DEFINE_GPR(r13, NULL, LLDB_INVALID_REGNUM), \ |
63 | DEFINE_GPR(r14, NULL, LLDB_INVALID_REGNUM), \ |
64 | DEFINE_GPR(r15, NULL, LLDB_INVALID_REGNUM), \ |
65 | DEFINE_GPR(r16, NULL, LLDB_INVALID_REGNUM), \ |
66 | DEFINE_GPR(r17, NULL, LLDB_INVALID_REGNUM), \ |
67 | DEFINE_GPR(r18, NULL, LLDB_INVALID_REGNUM), \ |
68 | DEFINE_GPR(r19, NULL, LLDB_INVALID_REGNUM), \ |
69 | DEFINE_GPR(r20, NULL, LLDB_INVALID_REGNUM), \ |
70 | DEFINE_GPR(r21, NULL, LLDB_INVALID_REGNUM), \ |
71 | DEFINE_GPR(r22, NULL, LLDB_INVALID_REGNUM), \ |
72 | DEFINE_GPR(r23, NULL, LLDB_INVALID_REGNUM), \ |
73 | DEFINE_GPR(r24, NULL, LLDB_INVALID_REGNUM), \ |
74 | DEFINE_GPR(r25, NULL, LLDB_INVALID_REGNUM), \ |
75 | DEFINE_GPR(r26, NULL, LLDB_INVALID_REGNUM), \ |
76 | DEFINE_GPR(r27, NULL, LLDB_INVALID_REGNUM), \ |
77 | DEFINE_GPR(r28, NULL, LLDB_INVALID_REGNUM), \ |
78 | DEFINE_GPR(r29, NULL, LLDB_INVALID_REGNUM), \ |
79 | DEFINE_GPR(r30, NULL, LLDB_INVALID_REGNUM), \ |
80 | DEFINE_GPR(r31, NULL, LLDB_INVALID_REGNUM), \ |
81 | DEFINE_GPR(lr, NULL, LLDB_REGNUM_GENERIC_RA), \ |
82 | DEFINE_GPR(cr, NULL, LLDB_REGNUM_GENERIC_FLAGS), \ |
83 | DEFINE_GPR(xer, NULL, LLDB_INVALID_REGNUM), \ |
84 | DEFINE_GPR(ctr, NULL, LLDB_INVALID_REGNUM), \ |
85 | DEFINE_GPR(pc, NULL, LLDB_REGNUM_GENERIC_PC), \ |
86 | DEFINE_FPR(f0, LLDB_INVALID_REGNUM), \ |
87 | DEFINE_FPR(f1, LLDB_INVALID_REGNUM), \ |
88 | DEFINE_FPR(f2, LLDB_INVALID_REGNUM), \ |
89 | DEFINE_FPR(f3, LLDB_INVALID_REGNUM), \ |
90 | DEFINE_FPR(f4, LLDB_INVALID_REGNUM), \ |
91 | DEFINE_FPR(f5, LLDB_INVALID_REGNUM), \ |
92 | DEFINE_FPR(f6, LLDB_INVALID_REGNUM), \ |
93 | DEFINE_FPR(f7, LLDB_INVALID_REGNUM), \ |
94 | DEFINE_FPR(f8, LLDB_INVALID_REGNUM), \ |
95 | DEFINE_FPR(f9, LLDB_INVALID_REGNUM), \ |
96 | DEFINE_FPR(f10, LLDB_INVALID_REGNUM), \ |
97 | DEFINE_FPR(f11, LLDB_INVALID_REGNUM), \ |
98 | DEFINE_FPR(f12, LLDB_INVALID_REGNUM), \ |
99 | DEFINE_FPR(f13, LLDB_INVALID_REGNUM), \ |
100 | DEFINE_FPR(f14, LLDB_INVALID_REGNUM), \ |
101 | DEFINE_FPR(f15, LLDB_INVALID_REGNUM), \ |
102 | DEFINE_FPR(f16, LLDB_INVALID_REGNUM), \ |
103 | DEFINE_FPR(f17, LLDB_INVALID_REGNUM), \ |
104 | DEFINE_FPR(f18, LLDB_INVALID_REGNUM), \ |
105 | DEFINE_FPR(f19, LLDB_INVALID_REGNUM), \ |
106 | DEFINE_FPR(f20, LLDB_INVALID_REGNUM), \ |
107 | DEFINE_FPR(f21, LLDB_INVALID_REGNUM), \ |
108 | DEFINE_FPR(f22, LLDB_INVALID_REGNUM), \ |
109 | DEFINE_FPR(f23, LLDB_INVALID_REGNUM), \ |
110 | DEFINE_FPR(f24, LLDB_INVALID_REGNUM), \ |
111 | DEFINE_FPR(f25, LLDB_INVALID_REGNUM), \ |
112 | DEFINE_FPR(f26, LLDB_INVALID_REGNUM), \ |
113 | DEFINE_FPR(f27, LLDB_INVALID_REGNUM), \ |
114 | DEFINE_FPR(f28, LLDB_INVALID_REGNUM), \ |
115 | DEFINE_FPR(f29, LLDB_INVALID_REGNUM), \ |
116 | DEFINE_FPR(f30, LLDB_INVALID_REGNUM), \ |
117 | DEFINE_FPR(f31, LLDB_INVALID_REGNUM), \ |
118 | {"fpscr", \ |
119 | NULL, \ |
120 | 8, \ |
121 | FPR_OFFSET(fpscr), \ |
122 | eEncodingUint, \ |
123 | eFormatHex, \ |
124 | {dwarf_fpscr_powerpc, dwarf_fpscr_powerpc, LLDB_INVALID_REGNUM, \ |
125 | LLDB_INVALID_REGNUM, fpr_fpscr_powerpc}, \ |
126 | NULL, \ |
127 | NULL, \ |
128 | NULL, \ |
129 | }, \ |
130 | DEFINE_VMX(v0, LLDB_INVALID_REGNUM), \ |
131 | DEFINE_VMX(v1, LLDB_INVALID_REGNUM), \ |
132 | DEFINE_VMX(v2, LLDB_INVALID_REGNUM), \ |
133 | DEFINE_VMX(v3, LLDB_INVALID_REGNUM), \ |
134 | DEFINE_VMX(v4, LLDB_INVALID_REGNUM), \ |
135 | DEFINE_VMX(v5, LLDB_INVALID_REGNUM), \ |
136 | DEFINE_VMX(v6, LLDB_INVALID_REGNUM), \ |
137 | DEFINE_VMX(v7, LLDB_INVALID_REGNUM), \ |
138 | DEFINE_VMX(v8, LLDB_INVALID_REGNUM), \ |
139 | DEFINE_VMX(v9, LLDB_INVALID_REGNUM), \ |
140 | DEFINE_VMX(v10, LLDB_INVALID_REGNUM), \ |
141 | DEFINE_VMX(v11, LLDB_INVALID_REGNUM), \ |
142 | DEFINE_VMX(v12, LLDB_INVALID_REGNUM), \ |
143 | DEFINE_VMX(v13, LLDB_INVALID_REGNUM), \ |
144 | DEFINE_VMX(v14, LLDB_INVALID_REGNUM), \ |
145 | DEFINE_VMX(v15, LLDB_INVALID_REGNUM), \ |
146 | DEFINE_VMX(v16, LLDB_INVALID_REGNUM), \ |
147 | DEFINE_VMX(v17, LLDB_INVALID_REGNUM), \ |
148 | DEFINE_VMX(v18, LLDB_INVALID_REGNUM), \ |
149 | DEFINE_VMX(v19, LLDB_INVALID_REGNUM), \ |
150 | DEFINE_VMX(v20, LLDB_INVALID_REGNUM), \ |
151 | DEFINE_VMX(v21, LLDB_INVALID_REGNUM), \ |
152 | DEFINE_VMX(v22, LLDB_INVALID_REGNUM), \ |
153 | DEFINE_VMX(v23, LLDB_INVALID_REGNUM), \ |
154 | DEFINE_VMX(v24, LLDB_INVALID_REGNUM), \ |
155 | DEFINE_VMX(v25, LLDB_INVALID_REGNUM), \ |
156 | DEFINE_VMX(v26, LLDB_INVALID_REGNUM), \ |
157 | DEFINE_VMX(v27, LLDB_INVALID_REGNUM), \ |
158 | DEFINE_VMX(v28, LLDB_INVALID_REGNUM), \ |
159 | DEFINE_VMX(v29, LLDB_INVALID_REGNUM), \ |
160 | DEFINE_VMX(v30, LLDB_INVALID_REGNUM), \ |
161 | DEFINE_VMX(v31, LLDB_INVALID_REGNUM), \ |
162 | {"vrsave", \ |
163 | NULL, \ |
164 | 4, \ |
165 | VMX_OFFSET(vrsave), \ |
166 | eEncodingUint, \ |
167 | eFormatHex, \ |
168 | {dwarf_vrsave_powerpc, dwarf_vrsave_powerpc, LLDB_INVALID_REGNUM, \ |
169 | LLDB_INVALID_REGNUM, vmx_vrsave_powerpc}, \ |
170 | NULL, \ |
171 | NULL, \ |
172 | NULL, \ |
173 | }, \ |
174 | {"vscr", \ |
175 | NULL, \ |
176 | 4, \ |
177 | VMX_OFFSET(vscr), \ |
178 | eEncodingUint, \ |
179 | eFormatHex, \ |
180 | {dwarf_vscr_powerpc, dwarf_vscr_powerpc, LLDB_INVALID_REGNUM, \ |
181 | LLDB_INVALID_REGNUM, vmx_vscr_powerpc}, \ |
182 | NULL, \ |
183 | NULL, \ |
184 | NULL, \ |
185 | }, |
186 | |
187 | static RegisterInfo g_register_infos_powerpc64[] = { |
188 | #define GPR GPR64 |
189 | POWERPC_REGS |
190 | #undef GPR |
191 | }; |
192 | |
193 | static RegisterInfo g_register_infos_powerpc32[] = { |
194 | #define GPR GPR32 |
195 | POWERPC_REGS |
196 | #undef GPR |
197 | }; |
198 | |
199 | static RegisterInfo g_register_infos_powerpc64_32[] = { |
200 | #define GPR GPR64 |
201 | #undef GPR_SIZE |
202 | #define GPR_SIZE(reg) (sizeof(uint32_t)) |
203 | #undef GPR_OFFSET |
204 | #define GPR_OFFSET(regname) \ |
205 | (offsetof(GPR, regname) + (sizeof(((GPR *)NULL)->regname) - GPR_SIZE(reg))) |
206 | POWERPC_REGS |
207 | #undef GPR |
208 | }; |
209 | |
210 | static_assert((sizeof(g_register_infos_powerpc32) / |
211 | sizeof(g_register_infos_powerpc32[0])) == |
212 | k_num_registers_powerpc, |
213 | "g_register_infos_powerpc32 has wrong number of register infos" ); |
214 | static_assert((sizeof(g_register_infos_powerpc64) / |
215 | sizeof(g_register_infos_powerpc64[0])) == |
216 | k_num_registers_powerpc, |
217 | "g_register_infos_powerpc64 has wrong number of register infos" ); |
218 | static_assert(sizeof(g_register_infos_powerpc64_32) == |
219 | sizeof(g_register_infos_powerpc64), |
220 | "g_register_infos_powerpc64_32 doesn't match size of " |
221 | "g_register_infos_powerpc64" ); |
222 | |
223 | #undef DEFINE_FPR |
224 | #undef DEFINE_GPR |
225 | |
226 | #endif // DECLARE_REGISTER_INFOS_POWERPC_STRUCT |
227 | |
228 | #undef GPR_OFFSET |
229 | |