1 | //===-- RegisterInfos_x86_64_with_base.h ------------------------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #include "RegisterInfos_x86_64_with_base_shared.h" |
10 | |
11 | // This file is meant to be textually included. Do not #include modular |
12 | // headers here. |
13 | |
14 | // Computes the offset of the given GPR in the user data area. |
15 | #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname)) |
16 | |
17 | // Computes the offset of the given FPR in the extended data area. |
18 | #define FPR_OFFSET(regname) \ |
19 | (LLVM_EXTENSION offsetof(UserArea, fpr) + \ |
20 | LLVM_EXTENSION offsetof(FPR, fxsave) + \ |
21 | LLVM_EXTENSION offsetof(FXSAVE, regname)) |
22 | |
23 | // Computes the offset of the YMM register assembled from register halves. |
24 | // Based on DNBArchImplX86_64.cpp from debugserver |
25 | #define YMM_OFFSET(reg_index) \ |
26 | (LLVM_EXTENSION offsetof(UserArea, fpr) + \ |
27 | LLVM_EXTENSION offsetof(FPR, xsave) + \ |
28 | LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index)) |
29 | |
30 | // Guarantees BNDR/BNDC offsets do not overlap with YMM offsets. |
31 | #define GDB_REMOTE_OFFSET 128 |
32 | |
33 | #define BNDR_OFFSET(reg_index) \ |
34 | (LLVM_EXTENSION offsetof(UserArea, fpr) + \ |
35 | LLVM_EXTENSION offsetof(FPR, xsave) + \ |
36 | LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]) + GDB_REMOTE_OFFSET) |
37 | |
38 | #define BNDC_OFFSET(reg_index) \ |
39 | (LLVM_EXTENSION offsetof(UserArea, fpr) + \ |
40 | LLVM_EXTENSION offsetof(FPR, xsave) + \ |
41 | LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]) + GDB_REMOTE_OFFSET) |
42 | |
43 | #ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT |
44 | |
45 | // Number of bytes needed to represent a FPR. |
46 | #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg) |
47 | |
48 | // Number of bytes needed to represent the i'th FP register. |
49 | #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes) |
50 | |
51 | // Number of bytes needed to represent an XMM register. |
52 | #define XMM_SIZE sizeof(XMMReg) |
53 | |
54 | // Number of bytes needed to represent a YMM register. |
55 | #define YMM_SIZE sizeof(YMMReg) |
56 | |
57 | // Number of bytes needed to represent MPX registers. |
58 | #define BNDR_SIZE sizeof(MPXReg) |
59 | #define BNDC_SIZE sizeof(MPXCsr) |
60 | |
61 | #define DR_SIZE sizeof(((DBG *)nullptr)->dr[0]) |
62 | |
63 | // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB |
64 | |
65 | // Note that the size and offset will be updated by platform-specific classes. |
66 | #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ |
67 | { \ |
68 | #reg, alt, sizeof(((GPR *)nullptr)->reg), GPR_OFFSET(reg), eEncodingUint, \ |
69 | eFormatHex, \ |
70 | {kind1, kind2, kind3, kind4, x86_64_with_base::lldb_##reg}, nullptr, \ |
71 | nullptr, nullptr, \ |
72 | } |
73 | |
74 | #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \ |
75 | { \ |
76 | #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ |
77 | {kind1, kind2, kind3, kind4, x86_64_with_base::lldb_##name}, nullptr, \ |
78 | nullptr, nullptr, \ |
79 | } |
80 | |
81 | #define DEFINE_FP_ST(reg, i) \ |
82 | { \ |
83 | #reg #i, nullptr, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ |
84 | eEncodingVector, eFormatVectorOfUInt8, \ |
85 | {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \ |
86 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_st##i}, \ |
87 | nullptr, nullptr, nullptr, \ |
88 | } |
89 | |
90 | #define DEFINE_FP_MM(reg, i, streg) \ |
91 | { \ |
92 | #reg #i, nullptr, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \ |
93 | eEncodingUint, eFormatHex, \ |
94 | {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, \ |
95 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_mm##i}, \ |
96 | RegisterInfos_x86_64_with_base_shared::g_contained_##streg##_64, \ |
97 | RegisterInfos_x86_64_with_base_shared::g_invalidate_##streg##_64, \ |
98 | nullptr, \ |
99 | } |
100 | |
101 | #define DEFINE_XMM(reg, i) \ |
102 | { \ |
103 | #reg #i, nullptr, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \ |
104 | eEncodingVector, eFormatVectorOfUInt8, \ |
105 | {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \ |
106 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
107 | x86_64_with_base::lldb_##reg##i}, \ |
108 | nullptr, nullptr, nullptr, \ |
109 | } |
110 | |
111 | #define DEFINE_YMM(reg, i) \ |
112 | { \ |
113 | #reg #i, nullptr, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, \ |
114 | eFormatVectorOfUInt8, \ |
115 | {dwarf_##reg##i##h_x86_64, dwarf_##reg##i##h_x86_64, \ |
116 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
117 | x86_64_with_base::lldb_##reg##i}, \ |
118 | nullptr, nullptr, nullptr, \ |
119 | } |
120 | |
121 | #define DEFINE_BNDR(reg, i) \ |
122 | { \ |
123 | #reg #i, nullptr, BNDR_SIZE, LLVM_EXTENSION BNDR_OFFSET(i), \ |
124 | eEncodingVector, eFormatVectorOfUInt64, \ |
125 | {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \ |
126 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
127 | x86_64_with_base::lldb_##reg##i}, \ |
128 | nullptr, nullptr, nullptr, \ |
129 | } |
130 | |
131 | #define DEFINE_BNDC(name, i) \ |
132 | { \ |
133 | #name, nullptr, BNDC_SIZE, LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, \ |
134 | eFormatVectorOfUInt8, \ |
135 | {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
136 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_##name}, \ |
137 | nullptr, nullptr, nullptr, \ |
138 | } |
139 | |
140 | #define DEFINE_DR(reg, i) \ |
141 | { \ |
142 | #reg #i, nullptr, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex, \ |
143 | {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
144 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_##reg##i}, \ |
145 | nullptr, nullptr, nullptr, \ |
146 | } |
147 | |
148 | #define DEFINE_GPR_PSEUDO_32(reg32, reg64) \ |
149 | { \ |
150 | #reg32, nullptr, 4, GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ |
151 | {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
152 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_##reg32}, \ |
153 | RegisterInfos_x86_64_with_base_shared::g_contained_##reg64, \ |
154 | RegisterInfos_x86_64_with_base_shared::g_invalidate_##reg64, nullptr, \ |
155 | } |
156 | |
157 | #define DEFINE_GPR_PSEUDO_16(reg16, reg64) \ |
158 | { \ |
159 | #reg16, nullptr, 2, GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ |
160 | {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
161 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_##reg16}, \ |
162 | RegisterInfos_x86_64_with_base_shared::g_contained_##reg64, \ |
163 | RegisterInfos_x86_64_with_base_shared::g_invalidate_##reg64, nullptr, \ |
164 | } |
165 | |
166 | #define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \ |
167 | { \ |
168 | #reg8, nullptr, 1, GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \ |
169 | {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
170 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_##reg8}, \ |
171 | RegisterInfos_x86_64_with_base_shared::g_contained_##reg64, \ |
172 | RegisterInfos_x86_64_with_base_shared::g_invalidate_##reg64, nullptr, \ |
173 | } |
174 | |
175 | #define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \ |
176 | { \ |
177 | #reg8, nullptr, 1, GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ |
178 | {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ |
179 | LLDB_INVALID_REGNUM, x86_64_with_base::lldb_##reg8}, \ |
180 | RegisterInfos_x86_64_with_base_shared::g_contained_##reg64, \ |
181 | RegisterInfos_x86_64_with_base_shared::g_invalidate_##reg64, nullptr \ |
182 | } |
183 | |
184 | #define DEFINE_FPR_32(name, reg, kind1, kind2, kind3, kind4, reg64) \ |
185 | { \ |
186 | #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ |
187 | {kind1, kind2, kind3, kind4, x86_64_with_base::lldb_##name}, \ |
188 | RegisterInfos_x86_64_with_base_shared::g_contained_##reg64, \ |
189 | RegisterInfos_x86_64_with_base_shared::g_invalidate_##reg64, nullptr, \ |
190 | } |
191 | |
192 | // clang-format off |
193 | static RegisterInfo g_register_infos_x86_64_with_base[] = { |
194 | // General purpose registers EH_Frame DWARF Generic Process Plugin |
195 | // =========================== ================== ================ ========================= ==================== |
196 | DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
197 | DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
198 | DEFINE_GPR(rcx, nullptr, dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), |
199 | DEFINE_GPR(rdx, nullptr, dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), |
200 | DEFINE_GPR(rdi, nullptr, dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), |
201 | DEFINE_GPR(rsi, nullptr, dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), |
202 | DEFINE_GPR(rbp, nullptr, dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), |
203 | DEFINE_GPR(rsp, nullptr, dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), |
204 | DEFINE_GPR(r8, nullptr, dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), |
205 | DEFINE_GPR(r9, nullptr, dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), |
206 | DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
207 | DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
208 | DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
209 | DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
210 | DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
211 | DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
212 | DEFINE_GPR(rip, nullptr, dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), |
213 | DEFINE_GPR(rflags, nullptr, dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), |
214 | DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
215 | DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
216 | DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
217 | DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
218 | DEFINE_GPR(fs_base,nullptr, dwarf_fs_base_x86_64, dwarf_fs_base_x86_64, LLDB_REGNUM_GENERIC_TP, LLDB_INVALID_REGNUM), |
219 | DEFINE_GPR(gs_base,nullptr, dwarf_gs_base_x86_64, dwarf_gs_base_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
220 | DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
221 | DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
222 | |
223 | DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx), |
224 | DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx), |
225 | DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi), |
226 | DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp), |
227 | DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9), |
228 | DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11), |
229 | DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13), |
230 | DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15), |
231 | DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx), |
232 | DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx), |
233 | DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi), |
234 | DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp), |
235 | DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9), |
236 | DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11), |
237 | DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13), |
238 | DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15), |
239 | DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx), |
240 | DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx), |
241 | DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx), |
242 | DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx), |
243 | DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi), |
244 | DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp), |
245 | DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9), |
246 | DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11), |
247 | DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13), |
248 | DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15), |
249 | |
250 | // i387 Floating point registers. EH_frame DWARF Generic Process Plugin reg64 |
251 | // ====================================== =============== ================== =================== ==================== ===== |
252 | DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
253 | DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
254 | DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
255 | DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
256 | DEFINE_FPR_32(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fip), |
257 | DEFINE_FPR_32(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fip), |
258 | DEFINE_FPR(fip, ptr.x86_64.fip, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
259 | DEFINE_FPR_32(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fdp), |
260 | DEFINE_FPR_32(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, fdp), |
261 | DEFINE_FPR(fdp, ptr.x86_64.fdp, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
262 | DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
263 | DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), |
264 | |
265 | // FP registers. |
266 | DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2), |
267 | DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5), |
268 | DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), |
269 | |
270 | DEFINE_FP_MM(mm, 0, st0), DEFINE_FP_MM(mm, 1, st1), |
271 | DEFINE_FP_MM(mm, 2, st2), DEFINE_FP_MM(mm, 3, st3), |
272 | DEFINE_FP_MM(mm, 4, st4), DEFINE_FP_MM(mm, 5, st5), |
273 | DEFINE_FP_MM(mm, 6, st6), DEFINE_FP_MM(mm, 7, st7), |
274 | |
275 | // XMM registers |
276 | DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2), |
277 | DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5), |
278 | DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8), |
279 | DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11), |
280 | DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14), |
281 | DEFINE_XMM(xmm, 15), |
282 | |
283 | // Copy of YMM registers assembled from xmm and ymmh |
284 | DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2), |
285 | DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5), |
286 | DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8), |
287 | DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11), |
288 | DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14), |
289 | DEFINE_YMM(ymm, 15), |
290 | |
291 | // MPX registers |
292 | DEFINE_BNDR(bnd, 0), |
293 | DEFINE_BNDR(bnd, 1), |
294 | DEFINE_BNDR(bnd, 2), |
295 | DEFINE_BNDR(bnd, 3), |
296 | |
297 | DEFINE_BNDC(bndcfgu, 0), |
298 | DEFINE_BNDC(bndstatus, 1), |
299 | |
300 | // Debug registers for lldb internal use |
301 | DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3), |
302 | DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)}; |
303 | |
304 | // clang-format on |
305 | |
306 | static_assert( |
307 | (sizeof(g_register_infos_x86_64_with_base) / |
308 | sizeof(g_register_infos_x86_64_with_base[0])) == |
309 | x86_64_with_base::k_num_registers, |
310 | "g_register_infos_x86_64_with_base has wrong number of register infos" ); |
311 | |
312 | #undef FPR_SIZE |
313 | #undef FP_SIZE |
314 | #undef XMM_SIZE |
315 | #undef YMM_SIZE |
316 | #undef DEFINE_GPR |
317 | #undef DEFINE_FPR |
318 | #undef DEFINE_FP |
319 | #undef DEFINE_XMM |
320 | #undef DEFINE_YMM |
321 | #undef DEFINE_BNDR |
322 | #undef DEFINE_BNDC |
323 | #undef DEFINE_DR |
324 | #undef DEFINE_GPR_PSEUDO_32 |
325 | #undef DEFINE_GPR_PSEUDO_16 |
326 | #undef DEFINE_GPR_PSEUDO_8H |
327 | #undef DEFINE_GPR_PSEUDO_8L |
328 | |
329 | #endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT |
330 | |
331 | #ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS |
332 | |
333 | #define UPDATE_GPR_INFO(reg, reg64) \ |
334 | do { \ |
335 | g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \ |
336 | } while (false); |
337 | |
338 | #define UPDATE_GPR_INFO_8H(reg, reg64) \ |
339 | do { \ |
340 | g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \ |
341 | } while (false); |
342 | |
343 | #define UPDATE_FPR_INFO(reg, reg64) \ |
344 | do { \ |
345 | g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \ |
346 | } while (false); |
347 | |
348 | #define UPDATE_FP_INFO(reg, i) \ |
349 | do { \ |
350 | g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \ |
351 | } while (false); |
352 | |
353 | #define UPDATE_XMM_INFO(reg, i) \ |
354 | do { \ |
355 | g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \ |
356 | } while (false); |
357 | |
358 | #define UPDATE_YMM_INFO(reg, i) \ |
359 | do { \ |
360 | g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i); \ |
361 | } while (false); |
362 | |
363 | #define UPDATE_DR_INFO(reg_index) \ |
364 | do { \ |
365 | g_register_infos[lldb_dr##reg_index##_i386].byte_offset = \ |
366 | DR_OFFSET(reg_index); \ |
367 | } while (false); |
368 | |
369 | // Update the register offsets |
370 | UPDATE_GPR_INFO(eax, rax); |
371 | UPDATE_GPR_INFO(ebx, rbx); |
372 | UPDATE_GPR_INFO(ecx, rcx); |
373 | UPDATE_GPR_INFO(edx, rdx); |
374 | UPDATE_GPR_INFO(edi, rdi); |
375 | UPDATE_GPR_INFO(esi, rsi); |
376 | UPDATE_GPR_INFO(ebp, rbp); |
377 | UPDATE_GPR_INFO(esp, rsp); |
378 | UPDATE_GPR_INFO(eip, rip); |
379 | UPDATE_GPR_INFO(eflags, rflags); |
380 | UPDATE_GPR_INFO(cs, cs); |
381 | UPDATE_GPR_INFO(fs, fs); |
382 | UPDATE_GPR_INFO(gs, gs); |
383 | UPDATE_GPR_INFO(ss, ss); |
384 | UPDATE_GPR_INFO(ds, ds); |
385 | UPDATE_GPR_INFO(es, es); |
386 | |
387 | UPDATE_GPR_INFO(ax, rax); |
388 | UPDATE_GPR_INFO(bx, rbx); |
389 | UPDATE_GPR_INFO(cx, rcx); |
390 | UPDATE_GPR_INFO(dx, rdx); |
391 | UPDATE_GPR_INFO(di, rdi); |
392 | UPDATE_GPR_INFO(si, rsi); |
393 | UPDATE_GPR_INFO(bp, rbp); |
394 | UPDATE_GPR_INFO(sp, rsp); |
395 | UPDATE_GPR_INFO_8H(ah, rax); |
396 | UPDATE_GPR_INFO_8H(bh, rbx); |
397 | UPDATE_GPR_INFO_8H(ch, rcx); |
398 | UPDATE_GPR_INFO_8H(dh, rdx); |
399 | UPDATE_GPR_INFO(al, rax); |
400 | UPDATE_GPR_INFO(bl, rbx); |
401 | UPDATE_GPR_INFO(cl, rcx); |
402 | UPDATE_GPR_INFO(dl, rdx); |
403 | |
404 | UPDATE_FPR_INFO(fctrl, fctrl); |
405 | UPDATE_FPR_INFO(fstat, fstat); |
406 | UPDATE_FPR_INFO(ftag, ftag); |
407 | UPDATE_FPR_INFO(fop, fop); |
408 | UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg); |
409 | UPDATE_FPR_INFO(fioff, ptr.i386_.fioff); |
410 | UPDATE_FPR_INFO(fooff, ptr.i386_.fooff); |
411 | UPDATE_FPR_INFO(foseg, ptr.i386_.foseg); |
412 | UPDATE_FPR_INFO(mxcsr, mxcsr); |
413 | UPDATE_FPR_INFO(mxcsrmask, mxcsrmask); |
414 | |
415 | UPDATE_FP_INFO(st, 0); |
416 | UPDATE_FP_INFO(st, 1); |
417 | UPDATE_FP_INFO(st, 2); |
418 | UPDATE_FP_INFO(st, 3); |
419 | UPDATE_FP_INFO(st, 4); |
420 | UPDATE_FP_INFO(st, 5); |
421 | UPDATE_FP_INFO(st, 6); |
422 | UPDATE_FP_INFO(st, 7); |
423 | UPDATE_FP_INFO(mm, 0); |
424 | UPDATE_FP_INFO(mm, 1); |
425 | UPDATE_FP_INFO(mm, 2); |
426 | UPDATE_FP_INFO(mm, 3); |
427 | UPDATE_FP_INFO(mm, 4); |
428 | UPDATE_FP_INFO(mm, 5); |
429 | UPDATE_FP_INFO(mm, 6); |
430 | UPDATE_FP_INFO(mm, 7); |
431 | |
432 | UPDATE_XMM_INFO(xmm, 0); |
433 | UPDATE_XMM_INFO(xmm, 1); |
434 | UPDATE_XMM_INFO(xmm, 2); |
435 | UPDATE_XMM_INFO(xmm, 3); |
436 | UPDATE_XMM_INFO(xmm, 4); |
437 | UPDATE_XMM_INFO(xmm, 5); |
438 | UPDATE_XMM_INFO(xmm, 6); |
439 | UPDATE_XMM_INFO(xmm, 7); |
440 | |
441 | UPDATE_YMM_INFO(ymm, 0); |
442 | UPDATE_YMM_INFO(ymm, 1); |
443 | UPDATE_YMM_INFO(ymm, 2); |
444 | UPDATE_YMM_INFO(ymm, 3); |
445 | UPDATE_YMM_INFO(ymm, 4); |
446 | UPDATE_YMM_INFO(ymm, 5); |
447 | UPDATE_YMM_INFO(ymm, 6); |
448 | UPDATE_YMM_INFO(ymm, 7); |
449 | |
450 | UPDATE_DR_INFO(0); |
451 | UPDATE_DR_INFO(1); |
452 | UPDATE_DR_INFO(2); |
453 | UPDATE_DR_INFO(3); |
454 | UPDATE_DR_INFO(4); |
455 | UPDATE_DR_INFO(5); |
456 | UPDATE_DR_INFO(6); |
457 | UPDATE_DR_INFO(7); |
458 | |
459 | #undef UPDATE_GPR_INFO |
460 | #undef UPDATE_GPR_INFO_8H |
461 | #undef UPDATE_FPR_INFO |
462 | #undef UPDATE_FP_INFO |
463 | #undef UPDATE_XMM_INFO |
464 | #undef UPDATE_YMM_INFO |
465 | #undef UPDATE_DR_INFO |
466 | |
467 | #endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS |
468 | |
469 | #undef GPR_OFFSET |
470 | #undef FPR_OFFSET |
471 | #undef YMM_OFFSET |
472 | |