1 | //===-- CodeViewRegisterMapping.cpp ---------------------------------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #include "CodeViewRegisterMapping.h" |
10 | |
11 | #include "lldb/lldb-defines.h" |
12 | |
13 | #include "Plugins/Process/Utility/lldb-arm64-register-enums.h" |
14 | #include "Plugins/Process/Utility/lldb-x86-register-enums.h" |
15 | |
16 | using namespace lldb_private; |
17 | |
18 | static const uint32_t g_code_view_to_lldb_registers_arm64[] = { |
19 | LLDB_INVALID_REGNUM, // NONE |
20 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
21 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
22 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
23 | gpr_w0_arm64, // ARM64_W0, 10) |
24 | gpr_w1_arm64, // ARM64_W1, 11) |
25 | gpr_w2_arm64, // ARM64_W2, 12) |
26 | gpr_w3_arm64, // ARM64_W3, 13) |
27 | gpr_w4_arm64, // ARM64_W4, 14) |
28 | gpr_w5_arm64, // ARM64_W5, 15) |
29 | gpr_w6_arm64, // ARM64_W6, 16) |
30 | gpr_w7_arm64, // ARM64_W7, 17) |
31 | gpr_w8_arm64, // ARM64_W8, 18) |
32 | gpr_w9_arm64, // ARM64_W9, 19) |
33 | gpr_w10_arm64, // ARM64_W10, 20) |
34 | gpr_w11_arm64, // ARM64_W11, 21) |
35 | gpr_w12_arm64, // ARM64_W12, 22) |
36 | gpr_w13_arm64, // ARM64_W13, 23) |
37 | gpr_w14_arm64, // ARM64_W14, 24) |
38 | gpr_w15_arm64, // ARM64_W15, 25) |
39 | gpr_w16_arm64, // ARM64_W16, 26) |
40 | gpr_w17_arm64, // ARM64_W17, 27) |
41 | gpr_w18_arm64, // ARM64_W18, 28) |
42 | gpr_w19_arm64, // ARM64_W19, 29) |
43 | gpr_w20_arm64, // ARM64_W20, 30) |
44 | gpr_w21_arm64, // ARM64_W21, 31) |
45 | gpr_w22_arm64, // ARM64_W22, 32) |
46 | gpr_w23_arm64, // ARM64_W23, 33) |
47 | gpr_w24_arm64, // ARM64_W24, 34) |
48 | gpr_w25_arm64, // ARM64_W25, 35) |
49 | gpr_w26_arm64, // ARM64_W26, 36) |
50 | gpr_w27_arm64, // ARM64_W27, 37) |
51 | gpr_w28_arm64, // ARM64_W28, 38) |
52 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
53 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
54 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
55 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
56 | gpr_x0_arm64, // ARM64_X0, 50) |
57 | gpr_x1_arm64, // ARM64_X1, 51) |
58 | gpr_x2_arm64, // ARM64_X2, 52) |
59 | gpr_x3_arm64, // ARM64_X3, 53) |
60 | gpr_x4_arm64, // ARM64_X4, 54) |
61 | gpr_x5_arm64, // ARM64_X5, 55) |
62 | gpr_x6_arm64, // ARM64_X6, 56) |
63 | gpr_x7_arm64, // ARM64_X7, 57) |
64 | gpr_x8_arm64, // ARM64_X8, 58) |
65 | gpr_x9_arm64, // ARM64_X9, 59) |
66 | gpr_x10_arm64, // ARM64_X10, 60) |
67 | gpr_x11_arm64, // ARM64_X11, 61) |
68 | gpr_x12_arm64, // ARM64_X12, 62) |
69 | gpr_x13_arm64, // ARM64_X13, 63) |
70 | gpr_x14_arm64, // ARM64_X14, 64) |
71 | gpr_x15_arm64, // ARM64_X15, 65) |
72 | gpr_x16_arm64, // ARM64_X16, 66) |
73 | gpr_x17_arm64, // ARM64_X17, 67) |
74 | gpr_x18_arm64, // ARM64_X18, 68) |
75 | gpr_x19_arm64, // ARM64_X19, 69) |
76 | gpr_x20_arm64, // ARM64_X20, 70) |
77 | gpr_x21_arm64, // ARM64_X21, 71) |
78 | gpr_x22_arm64, // ARM64_X22, 72) |
79 | gpr_x23_arm64, // ARM64_X23, 73) |
80 | gpr_x24_arm64, // ARM64_X24, 74) |
81 | gpr_x25_arm64, // ARM64_X25, 75) |
82 | gpr_x26_arm64, // ARM64_X26, 76) |
83 | gpr_x27_arm64, // ARM64_X27, 77) |
84 | gpr_x28_arm64, // ARM64_X28, 78) |
85 | gpr_fp_arm64, // ARM64_FP, 79) |
86 | gpr_lr_arm64, // ARM64_LR, 80) |
87 | gpr_sp_arm64, // ARM64_SP, 81) |
88 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
89 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
90 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
91 | gpr_cpsr_arm64, // ARM64_NZCV, 90) |
92 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
93 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
94 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
95 | fpu_s0_arm64, // (ARM64_S0, 100) |
96 | fpu_s1_arm64, // (ARM64_S1, 101) |
97 | fpu_s2_arm64, // (ARM64_S2, 102) |
98 | fpu_s3_arm64, // (ARM64_S3, 103) |
99 | fpu_s4_arm64, // (ARM64_S4, 104) |
100 | fpu_s5_arm64, // (ARM64_S5, 105) |
101 | fpu_s6_arm64, // (ARM64_S6, 106) |
102 | fpu_s7_arm64, // (ARM64_S7, 107) |
103 | fpu_s8_arm64, // (ARM64_S8, 108) |
104 | fpu_s9_arm64, // (ARM64_S9, 109) |
105 | fpu_s10_arm64, // (ARM64_S10, 110) |
106 | fpu_s11_arm64, // (ARM64_S11, 111) |
107 | fpu_s12_arm64, // (ARM64_S12, 112) |
108 | fpu_s13_arm64, // (ARM64_S13, 113) |
109 | fpu_s14_arm64, // (ARM64_S14, 114) |
110 | fpu_s15_arm64, // (ARM64_S15, 115) |
111 | fpu_s16_arm64, // (ARM64_S16, 116) |
112 | fpu_s17_arm64, // (ARM64_S17, 117) |
113 | fpu_s18_arm64, // (ARM64_S18, 118) |
114 | fpu_s19_arm64, // (ARM64_S19, 119) |
115 | fpu_s20_arm64, // (ARM64_S20, 120) |
116 | fpu_s21_arm64, // (ARM64_S21, 121) |
117 | fpu_s22_arm64, // (ARM64_S22, 122) |
118 | fpu_s23_arm64, // (ARM64_S23, 123) |
119 | fpu_s24_arm64, // (ARM64_S24, 124) |
120 | fpu_s25_arm64, // (ARM64_S25, 125) |
121 | fpu_s26_arm64, // (ARM64_S26, 126) |
122 | fpu_s27_arm64, // (ARM64_S27, 127) |
123 | fpu_s28_arm64, // (ARM64_S28, 128) |
124 | fpu_s29_arm64, // (ARM64_S29, 129) |
125 | fpu_s30_arm64, // (ARM64_S30, 130) |
126 | fpu_s31_arm64, // (ARM64_S31, 131) |
127 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
128 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
129 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
130 | fpu_d0_arm64, // (ARM64_D0, 140) |
131 | fpu_d1_arm64, // (ARM64_D1, 141) |
132 | fpu_d2_arm64, // (ARM64_D2, 142) |
133 | fpu_d3_arm64, // (ARM64_D3, 143) |
134 | fpu_d4_arm64, // (ARM64_D4, 144) |
135 | fpu_d5_arm64, // (ARM64_D5, 145) |
136 | fpu_d6_arm64, // (ARM64_D6, 146) |
137 | fpu_d7_arm64, // (ARM64_D7, 147) |
138 | fpu_d8_arm64, // (ARM64_D8, 148) |
139 | fpu_d9_arm64, // (ARM64_D9, 149) |
140 | fpu_d10_arm64, // (ARM64_D10, 150) |
141 | fpu_d11_arm64, // (ARM64_D11, 151) |
142 | fpu_d12_arm64, // (ARM64_D12, 152) |
143 | fpu_d13_arm64, // (ARM64_D13, 153) |
144 | fpu_d14_arm64, // (ARM64_D14, 154) |
145 | fpu_d15_arm64, // (ARM64_D15, 155) |
146 | fpu_d16_arm64, // (ARM64_D16, 156) |
147 | fpu_d17_arm64, // (ARM64_D17, 157) |
148 | fpu_d18_arm64, // (ARM64_D18, 158) |
149 | fpu_d19_arm64, // (ARM64_D19, 159) |
150 | fpu_d20_arm64, // (ARM64_D20, 160) |
151 | fpu_d21_arm64, // (ARM64_D21, 161) |
152 | fpu_d22_arm64, // (ARM64_D22, 162) |
153 | fpu_d23_arm64, // (ARM64_D23, 163) |
154 | fpu_d24_arm64, // (ARM64_D24, 164) |
155 | fpu_d25_arm64, // (ARM64_D25, 165) |
156 | fpu_d26_arm64, // (ARM64_D26, 166) |
157 | fpu_d27_arm64, // (ARM64_D27, 167) |
158 | fpu_d28_arm64, // (ARM64_D28, 168) |
159 | fpu_d29_arm64, // (ARM64_D29, 169) |
160 | fpu_d30_arm64, // (ARM64_D30, 170) |
161 | fpu_d31_arm64, // (ARM64_D31, 171) |
162 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
163 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
164 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
165 | fpu_v0_arm64, // (ARM64_Q0, 180) |
166 | fpu_v1_arm64, // (ARM64_Q1, 181) |
167 | fpu_v2_arm64, // (ARM64_Q2, 182) |
168 | fpu_v3_arm64, // (ARM64_Q3, 183) |
169 | fpu_v4_arm64, // (ARM64_Q4, 184) |
170 | fpu_v5_arm64, // (ARM64_Q5, 185) |
171 | fpu_v6_arm64, // (ARM64_Q6, 186) |
172 | fpu_v7_arm64, // (ARM64_Q7, 187) |
173 | fpu_v8_arm64, // (ARM64_Q8, 188) |
174 | fpu_v9_arm64, // (ARM64_Q9, 189) |
175 | fpu_v10_arm64, // (ARM64_Q10, 190) |
176 | fpu_v11_arm64, // (ARM64_Q11, 191) |
177 | fpu_v12_arm64, // (ARM64_Q12, 192) |
178 | fpu_v13_arm64, // (ARM64_Q13, 193) |
179 | fpu_v14_arm64, // (ARM64_Q14, 194) |
180 | fpu_v15_arm64, // (ARM64_Q15, 195) |
181 | fpu_v16_arm64, // (ARM64_Q16, 196) |
182 | fpu_v17_arm64, // (ARM64_Q17, 197) |
183 | fpu_v18_arm64, // (ARM64_Q18, 198) |
184 | fpu_v19_arm64, // (ARM64_Q19, 199) |
185 | fpu_v20_arm64, // (ARM64_Q20, 200) |
186 | fpu_v21_arm64, // (ARM64_Q21, 201) |
187 | fpu_v22_arm64, // (ARM64_Q22, 202) |
188 | fpu_v23_arm64, // (ARM64_Q23, 203) |
189 | fpu_v24_arm64, // (ARM64_Q24, 204) |
190 | fpu_v25_arm64, // (ARM64_Q25, 205) |
191 | fpu_v26_arm64, // (ARM64_Q26, 206) |
192 | fpu_v27_arm64, // (ARM64_Q27, 207) |
193 | fpu_v28_arm64, // (ARM64_Q28, 208) |
194 | fpu_v29_arm64, // (ARM64_Q29, 209) |
195 | fpu_v30_arm64, // (ARM64_Q30, 210) |
196 | fpu_v31_arm64, // (ARM64_Q31, 211) |
197 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
198 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
199 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
200 | fpu_fpsr_arm64 // ARM64_FPSR, 220) |
201 | }; |
202 | |
203 | static const uint32_t g_code_view_to_lldb_registers_x86[] = { |
204 | LLDB_INVALID_REGNUM, // NONE |
205 | lldb_al_i386, // AL |
206 | lldb_cl_i386, // CL |
207 | lldb_dl_i386, // DL |
208 | lldb_bl_i386, // BL |
209 | lldb_ah_i386, // AH |
210 | lldb_ch_i386, // CH |
211 | lldb_dh_i386, // DH |
212 | lldb_bh_i386, // BH |
213 | lldb_ax_i386, // AX |
214 | lldb_cx_i386, // CX |
215 | lldb_dx_i386, // DX |
216 | lldb_bx_i386, // BX |
217 | lldb_sp_i386, // SP |
218 | lldb_bp_i386, // BP |
219 | lldb_si_i386, // SI |
220 | lldb_di_i386, // DI |
221 | lldb_eax_i386, // EAX |
222 | lldb_ecx_i386, // ECX |
223 | lldb_edx_i386, // EDX |
224 | lldb_ebx_i386, // EBX |
225 | lldb_esp_i386, // ESP |
226 | lldb_ebp_i386, // EBP |
227 | lldb_esi_i386, // ESI |
228 | lldb_edi_i386, // EDI |
229 | lldb_es_i386, // ES |
230 | lldb_cs_i386, // CS |
231 | lldb_ss_i386, // SS |
232 | lldb_ds_i386, // DS |
233 | lldb_fs_i386, // FS |
234 | lldb_gs_i386, // GS |
235 | LLDB_INVALID_REGNUM, // IP |
236 | LLDB_INVALID_REGNUM, // FLAGS |
237 | lldb_eip_i386, // EIP |
238 | lldb_eflags_i386, // EFLAGS |
239 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
240 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
241 | LLDB_INVALID_REGNUM, // TEMP |
242 | LLDB_INVALID_REGNUM, // TEMPH |
243 | LLDB_INVALID_REGNUM, // QUOTE |
244 | LLDB_INVALID_REGNUM, // PCDR3 |
245 | LLDB_INVALID_REGNUM, // PCDR4 |
246 | LLDB_INVALID_REGNUM, // PCDR5 |
247 | LLDB_INVALID_REGNUM, // PCDR6 |
248 | LLDB_INVALID_REGNUM, // PCDR7 |
249 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
250 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
251 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
252 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
253 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
254 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
255 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
256 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
257 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
258 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
259 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
260 | LLDB_INVALID_REGNUM, // CR0 |
261 | LLDB_INVALID_REGNUM, // CR1 |
262 | LLDB_INVALID_REGNUM, // CR2 |
263 | LLDB_INVALID_REGNUM, // CR3 |
264 | LLDB_INVALID_REGNUM, // CR4 |
265 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
266 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
267 | lldb_dr0_i386, // DR0 |
268 | lldb_dr1_i386, // DR1 |
269 | lldb_dr2_i386, // DR2 |
270 | lldb_dr3_i386, // DR3 |
271 | lldb_dr4_i386, // DR4 |
272 | lldb_dr5_i386, // DR5 |
273 | lldb_dr6_i386, // DR6 |
274 | lldb_dr7_i386, // DR7 |
275 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
276 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
277 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
278 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
279 | LLDB_INVALID_REGNUM, // GDTR |
280 | LLDB_INVALID_REGNUM, // GDTL |
281 | LLDB_INVALID_REGNUM, // IDTR |
282 | LLDB_INVALID_REGNUM, // IDTL |
283 | LLDB_INVALID_REGNUM, // LDTR |
284 | LLDB_INVALID_REGNUM, // TR |
285 | LLDB_INVALID_REGNUM, // PSEUDO1 |
286 | LLDB_INVALID_REGNUM, // PSEUDO2 |
287 | LLDB_INVALID_REGNUM, // PSEUDO3 |
288 | LLDB_INVALID_REGNUM, // PSEUDO4 |
289 | LLDB_INVALID_REGNUM, // PSEUDO5 |
290 | LLDB_INVALID_REGNUM, // PSEUDO6 |
291 | LLDB_INVALID_REGNUM, // PSEUDO7 |
292 | LLDB_INVALID_REGNUM, // PSEUDO8 |
293 | LLDB_INVALID_REGNUM, // PSEUDO9 |
294 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
295 | lldb_st0_i386, // ST0 |
296 | lldb_st1_i386, // ST1 |
297 | lldb_st2_i386, // ST2 |
298 | lldb_st3_i386, // ST3 |
299 | lldb_st4_i386, // ST4 |
300 | lldb_st5_i386, // ST5 |
301 | lldb_st6_i386, // ST6 |
302 | lldb_st7_i386, // ST7 |
303 | LLDB_INVALID_REGNUM, // CTRL |
304 | LLDB_INVALID_REGNUM, // STAT |
305 | LLDB_INVALID_REGNUM, // TAG |
306 | LLDB_INVALID_REGNUM, // FPIP |
307 | LLDB_INVALID_REGNUM, // FPCS |
308 | LLDB_INVALID_REGNUM, // FPDO |
309 | LLDB_INVALID_REGNUM, // FPDS |
310 | LLDB_INVALID_REGNUM, // ISEM |
311 | LLDB_INVALID_REGNUM, // FPEIP |
312 | LLDB_INVALID_REGNUM, // FPEDO |
313 | lldb_mm0_i386, // MM0 |
314 | lldb_mm1_i386, // MM1 |
315 | lldb_mm2_i386, // MM2 |
316 | lldb_mm3_i386, // MM3 |
317 | lldb_mm4_i386, // MM4 |
318 | lldb_mm5_i386, // MM5 |
319 | lldb_mm6_i386, // MM6 |
320 | lldb_mm7_i386, // MM7 |
321 | lldb_xmm0_i386, // XMM0 |
322 | lldb_xmm1_i386, // XMM1 |
323 | lldb_xmm2_i386, // XMM2 |
324 | lldb_xmm3_i386, // XMM3 |
325 | lldb_xmm4_i386, // XMM4 |
326 | lldb_xmm5_i386, // XMM5 |
327 | lldb_xmm6_i386, // XMM6 |
328 | lldb_xmm7_i386 // XMM7 |
329 | }; |
330 | |
331 | static const uint32_t g_code_view_to_lldb_registers_x86_64[] = { |
332 | LLDB_INVALID_REGNUM, // NONE |
333 | lldb_al_x86_64, // AL |
334 | lldb_cl_x86_64, // CL |
335 | lldb_dl_x86_64, // DL |
336 | lldb_bl_x86_64, // BL |
337 | lldb_ah_x86_64, // AH |
338 | lldb_ch_x86_64, // CH |
339 | lldb_dh_x86_64, // DH |
340 | lldb_bh_x86_64, // BH |
341 | lldb_ax_x86_64, // AX |
342 | lldb_cx_x86_64, // CX |
343 | lldb_dx_x86_64, // DX |
344 | lldb_bx_x86_64, // BX |
345 | lldb_sp_x86_64, // SP |
346 | lldb_bp_x86_64, // BP |
347 | lldb_si_x86_64, // SI |
348 | lldb_di_x86_64, // DI |
349 | lldb_eax_x86_64, // EAX |
350 | lldb_ecx_x86_64, // ECX |
351 | lldb_edx_x86_64, // EDX |
352 | lldb_ebx_x86_64, // EBX |
353 | lldb_esp_x86_64, // ESP |
354 | lldb_ebp_x86_64, // EBP |
355 | lldb_esi_x86_64, // ESI |
356 | lldb_edi_x86_64, // EDI |
357 | lldb_es_x86_64, // ES |
358 | lldb_cs_x86_64, // CS |
359 | lldb_ss_x86_64, // SS |
360 | lldb_ds_x86_64, // DS |
361 | lldb_fs_x86_64, // FS |
362 | lldb_gs_x86_64, // GS |
363 | LLDB_INVALID_REGNUM, // IP |
364 | LLDB_INVALID_REGNUM, // FLAGS |
365 | LLDB_INVALID_REGNUM, // EIP |
366 | LLDB_INVALID_REGNUM, // EFLAGS |
367 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
368 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
369 | LLDB_INVALID_REGNUM, // TEMP |
370 | LLDB_INVALID_REGNUM, // TEMPH |
371 | LLDB_INVALID_REGNUM, // QUOTE |
372 | LLDB_INVALID_REGNUM, // PCDR3 |
373 | LLDB_INVALID_REGNUM, // PCDR4 |
374 | LLDB_INVALID_REGNUM, // PCDR5 |
375 | LLDB_INVALID_REGNUM, // PCDR6 |
376 | LLDB_INVALID_REGNUM, // PCDR7 |
377 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
378 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
379 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
380 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
381 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
382 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
383 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
384 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
385 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
386 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
387 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
388 | LLDB_INVALID_REGNUM, // CR0 |
389 | LLDB_INVALID_REGNUM, // CR1 |
390 | LLDB_INVALID_REGNUM, // CR2 |
391 | LLDB_INVALID_REGNUM, // CR3 |
392 | LLDB_INVALID_REGNUM, // CR4 |
393 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
394 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
395 | lldb_dr0_x86_64, // DR0 |
396 | lldb_dr1_x86_64, // DR1 |
397 | lldb_dr2_x86_64, // DR2 |
398 | lldb_dr3_x86_64, // DR3 |
399 | lldb_dr4_x86_64, // DR4 |
400 | lldb_dr5_x86_64, // DR5 |
401 | lldb_dr6_x86_64, // DR6 |
402 | lldb_dr7_x86_64, // DR7 |
403 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
404 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
405 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
406 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
407 | LLDB_INVALID_REGNUM, // GDTR |
408 | LLDB_INVALID_REGNUM, // GDTL |
409 | LLDB_INVALID_REGNUM, // IDTR |
410 | LLDB_INVALID_REGNUM, // IDTL |
411 | LLDB_INVALID_REGNUM, // LDTR |
412 | LLDB_INVALID_REGNUM, // TR |
413 | LLDB_INVALID_REGNUM, // PSEUDO1 |
414 | LLDB_INVALID_REGNUM, // PSEUDO2 |
415 | LLDB_INVALID_REGNUM, // PSEUDO3 |
416 | LLDB_INVALID_REGNUM, // PSEUDO4 |
417 | LLDB_INVALID_REGNUM, // PSEUDO5 |
418 | LLDB_INVALID_REGNUM, // PSEUDO6 |
419 | LLDB_INVALID_REGNUM, // PSEUDO7 |
420 | LLDB_INVALID_REGNUM, // PSEUDO8 |
421 | LLDB_INVALID_REGNUM, // PSEUDO9 |
422 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
423 | lldb_st0_x86_64, // ST0 |
424 | lldb_st1_x86_64, // ST1 |
425 | lldb_st2_x86_64, // ST2 |
426 | lldb_st3_x86_64, // ST3 |
427 | lldb_st4_x86_64, // ST4 |
428 | lldb_st5_x86_64, // ST5 |
429 | lldb_st6_x86_64, // ST6 |
430 | lldb_st7_x86_64, // ST7 |
431 | LLDB_INVALID_REGNUM, // CTRL |
432 | LLDB_INVALID_REGNUM, // STAT |
433 | LLDB_INVALID_REGNUM, // TAG |
434 | LLDB_INVALID_REGNUM, // FPIP |
435 | LLDB_INVALID_REGNUM, // FPCS |
436 | LLDB_INVALID_REGNUM, // FPDO |
437 | LLDB_INVALID_REGNUM, // FPDS |
438 | LLDB_INVALID_REGNUM, // ISEM |
439 | LLDB_INVALID_REGNUM, // FPEIP |
440 | LLDB_INVALID_REGNUM, // FPEDO |
441 | lldb_mm0_x86_64, // MM0 |
442 | lldb_mm1_x86_64, // MM1 |
443 | lldb_mm2_x86_64, // MM2 |
444 | lldb_mm3_x86_64, // MM3 |
445 | lldb_mm4_x86_64, // MM4 |
446 | lldb_mm5_x86_64, // MM5 |
447 | lldb_mm6_x86_64, // MM6 |
448 | lldb_mm7_x86_64, // MM7 |
449 | lldb_xmm0_x86_64, // XMM0 |
450 | lldb_xmm1_x86_64, // XMM1 |
451 | lldb_xmm2_x86_64, // XMM2 |
452 | lldb_xmm3_x86_64, // XMM3 |
453 | lldb_xmm4_x86_64, // XMM4 |
454 | lldb_xmm5_x86_64, // XMM5 |
455 | lldb_xmm6_x86_64, // XMM6 |
456 | lldb_xmm7_x86_64, // XMM7 |
457 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
458 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
459 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
460 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
461 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
462 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
463 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
464 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
465 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
466 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
467 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
468 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
469 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
470 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
471 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
472 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
473 | LLDB_INVALID_REGNUM, |
474 | lldb_mxcsr_x86_64, // MXCSR |
475 | LLDB_INVALID_REGNUM, // EDXEAX |
476 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
477 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
478 | LLDB_INVALID_REGNUM, |
479 | LLDB_INVALID_REGNUM, // EMM0L |
480 | LLDB_INVALID_REGNUM, // EMM1L |
481 | LLDB_INVALID_REGNUM, // EMM2L |
482 | LLDB_INVALID_REGNUM, // EMM3L |
483 | LLDB_INVALID_REGNUM, // EMM4L |
484 | LLDB_INVALID_REGNUM, // EMM5L |
485 | LLDB_INVALID_REGNUM, // EMM6L |
486 | LLDB_INVALID_REGNUM, // EMM7L |
487 | LLDB_INVALID_REGNUM, // EMM0H |
488 | LLDB_INVALID_REGNUM, // EMM1H |
489 | LLDB_INVALID_REGNUM, // EMM2H |
490 | LLDB_INVALID_REGNUM, // EMM3H |
491 | LLDB_INVALID_REGNUM, // EMM4H |
492 | LLDB_INVALID_REGNUM, // EMM5H |
493 | LLDB_INVALID_REGNUM, // EMM6H |
494 | LLDB_INVALID_REGNUM, // EMM7H |
495 | LLDB_INVALID_REGNUM, // MM00 |
496 | LLDB_INVALID_REGNUM, // MM01 |
497 | LLDB_INVALID_REGNUM, // MM10 |
498 | LLDB_INVALID_REGNUM, // MM11 |
499 | LLDB_INVALID_REGNUM, // MM20 |
500 | LLDB_INVALID_REGNUM, // MM21 |
501 | LLDB_INVALID_REGNUM, // MM30 |
502 | LLDB_INVALID_REGNUM, // MM31 |
503 | LLDB_INVALID_REGNUM, // MM40 |
504 | LLDB_INVALID_REGNUM, // MM41 |
505 | LLDB_INVALID_REGNUM, // MM50 |
506 | LLDB_INVALID_REGNUM, // MM51 |
507 | LLDB_INVALID_REGNUM, // MM60 |
508 | LLDB_INVALID_REGNUM, // MM61 |
509 | LLDB_INVALID_REGNUM, // MM70 |
510 | LLDB_INVALID_REGNUM, // MM71 |
511 | lldb_xmm8_x86_64, // XMM8 |
512 | lldb_xmm9_x86_64, // XMM9 |
513 | lldb_xmm10_x86_64, // XMM10 |
514 | lldb_xmm11_x86_64, // XMM11 |
515 | lldb_xmm12_x86_64, // XMM12 |
516 | lldb_xmm13_x86_64, // XMM13 |
517 | lldb_xmm14_x86_64, // XMM14 |
518 | lldb_xmm15_x86_64, // XMM15 |
519 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
520 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
521 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
522 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
523 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
524 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
525 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
526 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
527 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
528 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
529 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
530 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
531 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
532 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
533 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
534 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
535 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
536 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
537 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
538 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
539 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
540 | LLDB_INVALID_REGNUM, |
541 | lldb_sil_x86_64, // SIL |
542 | lldb_dil_x86_64, // DIL |
543 | lldb_bpl_x86_64, // BPL |
544 | lldb_spl_x86_64, // SPL |
545 | lldb_rax_x86_64, // RAX |
546 | lldb_rbx_x86_64, // RBX |
547 | lldb_rcx_x86_64, // RCX |
548 | lldb_rdx_x86_64, // RDX |
549 | lldb_rsi_x86_64, // RSI |
550 | lldb_rdi_x86_64, // RDI |
551 | lldb_rbp_x86_64, // RBP |
552 | lldb_rsp_x86_64, // RSP |
553 | lldb_r8_x86_64, // R8 |
554 | lldb_r9_x86_64, // R9 |
555 | lldb_r10_x86_64, // R10 |
556 | lldb_r11_x86_64, // R11 |
557 | lldb_r12_x86_64, // R12 |
558 | lldb_r13_x86_64, // R13 |
559 | lldb_r14_x86_64, // R14 |
560 | lldb_r15_x86_64, // R15 |
561 | lldb_r8l_x86_64, // R8B |
562 | lldb_r9l_x86_64, // R9B |
563 | lldb_r10l_x86_64, // R10B |
564 | lldb_r11l_x86_64, // R11B |
565 | lldb_r12l_x86_64, // R12B |
566 | lldb_r13l_x86_64, // R13B |
567 | lldb_r14l_x86_64, // R14B |
568 | lldb_r15l_x86_64, // R15B |
569 | lldb_r8w_x86_64, // R8W |
570 | lldb_r9w_x86_64, // R9W |
571 | lldb_r10w_x86_64, // R10W |
572 | lldb_r11w_x86_64, // R11W |
573 | lldb_r12w_x86_64, // R12W |
574 | lldb_r13w_x86_64, // R13W |
575 | lldb_r14w_x86_64, // R14W |
576 | lldb_r15w_x86_64, // R15W |
577 | lldb_r8d_x86_64, // R8D |
578 | lldb_r9d_x86_64, // R9D |
579 | lldb_r10d_x86_64, // R10D |
580 | lldb_r11d_x86_64, // R11D |
581 | lldb_r12d_x86_64, // R12D |
582 | lldb_r13d_x86_64, // R13D |
583 | lldb_r14d_x86_64, // R14D |
584 | lldb_r15d_x86_64, // R15D |
585 | lldb_ymm0_x86_64, // AMD64_YMM0 |
586 | lldb_ymm1_x86_64, // AMD64_YMM1 |
587 | lldb_ymm2_x86_64, // AMD64_YMM2 |
588 | lldb_ymm3_x86_64, // AMD64_YMM3 |
589 | lldb_ymm4_x86_64, // AMD64_YMM4 |
590 | lldb_ymm5_x86_64, // AMD64_YMM5 |
591 | lldb_ymm6_x86_64, // AMD64_YMM6 |
592 | lldb_ymm7_x86_64, // AMD64_YMM7 |
593 | lldb_ymm8_x86_64, // AMD64_YMM8 |
594 | lldb_ymm9_x86_64, // AMD64_YMM9 |
595 | lldb_ymm10_x86_64, // AMD64_YMM10 |
596 | lldb_ymm11_x86_64, // AMD64_YMM11 |
597 | lldb_ymm12_x86_64, // AMD64_YMM12 |
598 | lldb_ymm13_x86_64, // AMD64_YMM13 |
599 | lldb_ymm14_x86_64, // AMD64_YMM14 |
600 | lldb_ymm15_x86_64, // AMD64_YMM15 |
601 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
602 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
603 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
604 | LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, |
605 | lldb_bnd0_x86_64, // BND0 |
606 | lldb_bnd1_x86_64, // BND1 |
607 | lldb_bnd2_x86_64 // BND2 |
608 | }; |
609 | |
610 | uint32_t lldb_private::npdb::GetLLDBRegisterNumber( |
611 | llvm::Triple::ArchType arch_type, llvm::codeview::RegisterId register_id) { |
612 | switch (arch_type) { |
613 | case llvm::Triple::aarch64: |
614 | if (static_cast<uint16_t>(register_id) < |
615 | sizeof(g_code_view_to_lldb_registers_arm64) / |
616 | sizeof(g_code_view_to_lldb_registers_arm64[0])) |
617 | return g_code_view_to_lldb_registers_arm64[static_cast<uint16_t>( |
618 | register_id)]; |
619 | |
620 | return LLDB_INVALID_REGNUM; |
621 | case llvm::Triple::x86: |
622 | if (static_cast<uint16_t>(register_id) < |
623 | sizeof(g_code_view_to_lldb_registers_x86) / |
624 | sizeof(g_code_view_to_lldb_registers_x86[0])) |
625 | return g_code_view_to_lldb_registers_x86[static_cast<uint16_t>( |
626 | register_id)]; |
627 | |
628 | switch (register_id) { |
629 | case llvm::codeview::RegisterId::MXCSR: |
630 | return lldb_mxcsr_i386; |
631 | case llvm::codeview::RegisterId::BND0: |
632 | return lldb_bnd0_i386; |
633 | case llvm::codeview::RegisterId::BND1: |
634 | return lldb_bnd1_i386; |
635 | case llvm::codeview::RegisterId::BND2: |
636 | return lldb_bnd2_i386; |
637 | default: |
638 | return LLDB_INVALID_REGNUM; |
639 | } |
640 | case llvm::Triple::x86_64: |
641 | if (static_cast<uint16_t>(register_id) < |
642 | sizeof(g_code_view_to_lldb_registers_x86_64) / |
643 | sizeof(g_code_view_to_lldb_registers_x86_64[0])) |
644 | return g_code_view_to_lldb_registers_x86_64[static_cast<uint16_t>( |
645 | register_id)]; |
646 | |
647 | return LLDB_INVALID_REGNUM; |
648 | default: |
649 | return LLDB_INVALID_REGNUM; |
650 | } |
651 | } |
652 | |
653 | uint32_t |
654 | lldb_private::npdb::GetRegisterSize(llvm::codeview::RegisterId register_id) { |
655 | switch(register_id) { |
656 | case llvm::codeview::RegisterId::AL: |
657 | case llvm::codeview::RegisterId::BL: |
658 | case llvm::codeview::RegisterId::CL: |
659 | case llvm::codeview::RegisterId::DL: |
660 | case llvm::codeview::RegisterId::AH: |
661 | case llvm::codeview::RegisterId::BH: |
662 | case llvm::codeview::RegisterId::CH: |
663 | case llvm::codeview::RegisterId::DH: |
664 | case llvm::codeview::RegisterId::SIL: |
665 | case llvm::codeview::RegisterId::DIL: |
666 | case llvm::codeview::RegisterId::BPL: |
667 | case llvm::codeview::RegisterId::SPL: |
668 | case llvm::codeview::RegisterId::R8B: |
669 | case llvm::codeview::RegisterId::R9B: |
670 | case llvm::codeview::RegisterId::R10B: |
671 | case llvm::codeview::RegisterId::R11B: |
672 | case llvm::codeview::RegisterId::R12B: |
673 | case llvm::codeview::RegisterId::R13B: |
674 | case llvm::codeview::RegisterId::R14B: |
675 | case llvm::codeview::RegisterId::R15B: |
676 | return 1; |
677 | case llvm::codeview::RegisterId::AX: |
678 | case llvm::codeview::RegisterId::BX: |
679 | case llvm::codeview::RegisterId::CX: |
680 | case llvm::codeview::RegisterId::DX: |
681 | case llvm::codeview::RegisterId::SP: |
682 | case llvm::codeview::RegisterId::BP: |
683 | case llvm::codeview::RegisterId::SI: |
684 | case llvm::codeview::RegisterId::DI: |
685 | case llvm::codeview::RegisterId::R8W: |
686 | case llvm::codeview::RegisterId::R9W: |
687 | case llvm::codeview::RegisterId::R10W: |
688 | case llvm::codeview::RegisterId::R11W: |
689 | case llvm::codeview::RegisterId::R12W: |
690 | case llvm::codeview::RegisterId::R13W: |
691 | case llvm::codeview::RegisterId::R14W: |
692 | case llvm::codeview::RegisterId::R15W: |
693 | return 2; |
694 | case llvm::codeview::RegisterId::EAX: |
695 | case llvm::codeview::RegisterId::EBX: |
696 | case llvm::codeview::RegisterId::ECX: |
697 | case llvm::codeview::RegisterId::EDX: |
698 | case llvm::codeview::RegisterId::ESP: |
699 | case llvm::codeview::RegisterId::EBP: |
700 | case llvm::codeview::RegisterId::ESI: |
701 | case llvm::codeview::RegisterId::EDI: |
702 | case llvm::codeview::RegisterId::R8D: |
703 | case llvm::codeview::RegisterId::R9D: |
704 | case llvm::codeview::RegisterId::R10D: |
705 | case llvm::codeview::RegisterId::R11D: |
706 | case llvm::codeview::RegisterId::R12D: |
707 | case llvm::codeview::RegisterId::R13D: |
708 | case llvm::codeview::RegisterId::R14D: |
709 | case llvm::codeview::RegisterId::R15D: |
710 | return 4; |
711 | case llvm::codeview::RegisterId::RAX: |
712 | case llvm::codeview::RegisterId::RBX: |
713 | case llvm::codeview::RegisterId::RCX: |
714 | case llvm::codeview::RegisterId::RDX: |
715 | case llvm::codeview::RegisterId::RSI: |
716 | case llvm::codeview::RegisterId::RDI: |
717 | case llvm::codeview::RegisterId::RBP: |
718 | case llvm::codeview::RegisterId::RSP: |
719 | case llvm::codeview::RegisterId::R8: |
720 | case llvm::codeview::RegisterId::R9: |
721 | case llvm::codeview::RegisterId::R10: |
722 | case llvm::codeview::RegisterId::R11: |
723 | case llvm::codeview::RegisterId::R12: |
724 | case llvm::codeview::RegisterId::R13: |
725 | case llvm::codeview::RegisterId::R14: |
726 | case llvm::codeview::RegisterId::R15: |
727 | return 8; |
728 | case llvm::codeview::RegisterId::XMM0: |
729 | case llvm::codeview::RegisterId::XMM1: |
730 | case llvm::codeview::RegisterId::XMM2: |
731 | case llvm::codeview::RegisterId::XMM3: |
732 | case llvm::codeview::RegisterId::XMM4: |
733 | case llvm::codeview::RegisterId::XMM5: |
734 | case llvm::codeview::RegisterId::XMM6: |
735 | case llvm::codeview::RegisterId::XMM7: |
736 | case llvm::codeview::RegisterId::XMM8: |
737 | case llvm::codeview::RegisterId::XMM9: |
738 | case llvm::codeview::RegisterId::XMM10: |
739 | case llvm::codeview::RegisterId::XMM11: |
740 | case llvm::codeview::RegisterId::XMM12: |
741 | case llvm::codeview::RegisterId::XMM13: |
742 | case llvm::codeview::RegisterId::XMM14: |
743 | case llvm::codeview::RegisterId::XMM15: |
744 | return 16; |
745 | default: |
746 | return 0; |
747 | } |
748 | } |
749 | |