1 | //===-- TargetParser - Parser for target features ---------------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file implements a target parser to recognise hardware features such as |
10 | // FPU/CPU/ARCH names as well as specific support such as HDIV, etc. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #ifndef LLVM_TARGETPARSER_TARGETPARSER_H |
15 | #define LLVM_TARGETPARSER_TARGETPARSER_H |
16 | |
17 | #include "llvm/ADT/StringMap.h" |
18 | #include "llvm/ADT/StringRef.h" |
19 | |
20 | namespace llvm { |
21 | |
22 | template <typename T> class SmallVectorImpl; |
23 | class Triple; |
24 | |
25 | // Target specific information in their own namespaces. |
26 | // (ARM/AArch64/X86 are declared in ARM/AArch64/X86TargetParser.h) |
27 | // These should be generated from TableGen because the information is already |
28 | // there, and there is where new information about targets will be added. |
29 | // FIXME: To TableGen this we need to make some table generated files available |
30 | // even if the back-end is not compiled with LLVM, plus we need to create a new |
31 | // back-end to TableGen to create these clean tables. |
32 | namespace AMDGPU { |
33 | |
34 | /// GPU kinds supported by the AMDGPU target. |
35 | enum GPUKind : uint32_t { |
36 | // Not specified processor. |
37 | GK_NONE = 0, |
38 | |
39 | // R600-based processors. |
40 | GK_R600 = 1, |
41 | GK_R630 = 2, |
42 | GK_RS880 = 3, |
43 | GK_RV670 = 4, |
44 | GK_RV710 = 5, |
45 | GK_RV730 = 6, |
46 | GK_RV770 = 7, |
47 | GK_CEDAR = 8, |
48 | GK_CYPRESS = 9, |
49 | GK_JUNIPER = 10, |
50 | GK_REDWOOD = 11, |
51 | GK_SUMO = 12, |
52 | GK_BARTS = 13, |
53 | GK_CAICOS = 14, |
54 | GK_CAYMAN = 15, |
55 | GK_TURKS = 16, |
56 | |
57 | GK_R600_FIRST = GK_R600, |
58 | GK_R600_LAST = GK_TURKS, |
59 | |
60 | // AMDGCN-based processors. |
61 | GK_GFX600 = 32, |
62 | GK_GFX601 = 33, |
63 | GK_GFX602 = 34, |
64 | |
65 | GK_GFX700 = 40, |
66 | GK_GFX701 = 41, |
67 | GK_GFX702 = 42, |
68 | GK_GFX703 = 43, |
69 | GK_GFX704 = 44, |
70 | GK_GFX705 = 45, |
71 | |
72 | GK_GFX801 = 50, |
73 | GK_GFX802 = 51, |
74 | GK_GFX803 = 52, |
75 | GK_GFX805 = 53, |
76 | GK_GFX810 = 54, |
77 | |
78 | GK_GFX900 = 60, |
79 | GK_GFX902 = 61, |
80 | GK_GFX904 = 62, |
81 | GK_GFX906 = 63, |
82 | GK_GFX908 = 64, |
83 | GK_GFX909 = 65, |
84 | GK_GFX90A = 66, |
85 | GK_GFX90C = 67, |
86 | GK_GFX940 = 68, |
87 | GK_GFX941 = 69, |
88 | GK_GFX942 = 70, |
89 | |
90 | GK_GFX1010 = 71, |
91 | GK_GFX1011 = 72, |
92 | GK_GFX1012 = 73, |
93 | GK_GFX1013 = 74, |
94 | GK_GFX1030 = 75, |
95 | GK_GFX1031 = 76, |
96 | GK_GFX1032 = 77, |
97 | GK_GFX1033 = 78, |
98 | GK_GFX1034 = 79, |
99 | GK_GFX1035 = 80, |
100 | GK_GFX1036 = 81, |
101 | |
102 | GK_GFX1100 = 90, |
103 | GK_GFX1101 = 91, |
104 | GK_GFX1102 = 92, |
105 | GK_GFX1103 = 93, |
106 | GK_GFX1150 = 94, |
107 | GK_GFX1151 = 95, |
108 | |
109 | GK_GFX1200 = 100, |
110 | GK_GFX1201 = 101, |
111 | |
112 | GK_AMDGCN_FIRST = GK_GFX600, |
113 | GK_AMDGCN_LAST = GK_GFX1201, |
114 | |
115 | GK_GFX9_GENERIC = 192, |
116 | GK_GFX10_1_GENERIC = 193, |
117 | GK_GFX10_3_GENERIC = 194, |
118 | GK_GFX11_GENERIC = 195, |
119 | |
120 | GK_AMDGCN_GENERIC_FIRST = GK_GFX9_GENERIC, |
121 | GK_AMDGCN_GENERIC_LAST = GK_GFX11_GENERIC, |
122 | }; |
123 | |
124 | /// Instruction set architecture version. |
125 | struct IsaVersion { |
126 | unsigned Major; |
127 | unsigned Minor; |
128 | unsigned Stepping; |
129 | }; |
130 | |
131 | // This isn't comprehensive for now, just things that are needed from the |
132 | // frontend driver. |
133 | enum ArchFeatureKind : uint32_t { |
134 | FEATURE_NONE = 0, |
135 | |
136 | // These features only exist for r600, and are implied true for amdgcn. |
137 | FEATURE_FMA = 1 << 1, |
138 | FEATURE_LDEXP = 1 << 2, |
139 | FEATURE_FP64 = 1 << 3, |
140 | |
141 | // Common features. |
142 | FEATURE_FAST_FMA_F32 = 1 << 4, |
143 | FEATURE_FAST_DENORMAL_F32 = 1 << 5, |
144 | |
145 | // Wavefront 32 is available. |
146 | FEATURE_WAVE32 = 1 << 6, |
147 | |
148 | // Xnack is available. |
149 | FEATURE_XNACK = 1 << 7, |
150 | |
151 | // Sram-ecc is available. |
152 | FEATURE_SRAMECC = 1 << 8, |
153 | |
154 | // WGP mode is supported. |
155 | FEATURE_WGP = 1 << 9, |
156 | }; |
157 | |
158 | StringRef getArchFamilyNameAMDGCN(GPUKind AK); |
159 | |
160 | StringRef getArchNameAMDGCN(GPUKind AK); |
161 | StringRef getArchNameR600(GPUKind AK); |
162 | StringRef getCanonicalArchName(const Triple &T, StringRef Arch); |
163 | GPUKind parseArchAMDGCN(StringRef CPU); |
164 | GPUKind parseArchR600(StringRef CPU); |
165 | unsigned getArchAttrAMDGCN(GPUKind AK); |
166 | unsigned getArchAttrR600(GPUKind AK); |
167 | |
168 | void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values); |
169 | void fillValidArchListR600(SmallVectorImpl<StringRef> &Values); |
170 | |
171 | IsaVersion getIsaVersion(StringRef GPU); |
172 | |
173 | /// Fills Features map with default values for given target GPU |
174 | void fillAMDGPUFeatureMap(StringRef GPU, const Triple &T, |
175 | StringMap<bool> &Features); |
176 | |
177 | /// Inserts wave size feature for given GPU into features map |
178 | bool insertWaveSizeFeature(StringRef GPU, const Triple &T, |
179 | StringMap<bool> &Features, std::string &ErrorMsg); |
180 | |
181 | } // namespace AMDGPU |
182 | } // namespace llvm |
183 | |
184 | #endif |
185 | |