1//===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise X86 hardware features.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_TARGETPARSER_X86TARGETPARSER_H
14#define LLVM_TARGETPARSER_X86TARGETPARSER_H
15
16#include "llvm/ADT/ArrayRef.h"
17#include "llvm/ADT/StringMap.h"
18#include <array>
19
20namespace llvm {
21template <typename T> class SmallVectorImpl;
22class StringRef;
23
24namespace X86 {
25
26// This should be kept in sync with libcc/compiler-rt as its included by clang
27// as a proxy for what's in libgcc/compiler-rt.
28enum ProcessorVendors : unsigned {
29 VENDOR_DUMMY,
30#define X86_VENDOR(ENUM, STRING) \
31 ENUM,
32#include "llvm/TargetParser/X86TargetParser.def"
33 VENDOR_OTHER
34};
35
36// This should be kept in sync with libcc/compiler-rt as its included by clang
37// as a proxy for what's in libgcc/compiler-rt.
38enum ProcessorTypes : unsigned {
39 CPU_TYPE_DUMMY,
40#define X86_CPU_TYPE(ENUM, STRING) \
41 ENUM,
42#include "llvm/TargetParser/X86TargetParser.def"
43 CPU_TYPE_MAX
44};
45
46// This should be kept in sync with libcc/compiler-rt as its included by clang
47// as a proxy for what's in libgcc/compiler-rt.
48enum ProcessorSubtypes : unsigned {
49 CPU_SUBTYPE_DUMMY,
50#define X86_CPU_SUBTYPE(ENUM, STRING) \
51 ENUM,
52#include "llvm/TargetParser/X86TargetParser.def"
53 CPU_SUBTYPE_MAX
54};
55
56// This should be kept in sync with libcc/compiler-rt as it should be used
57// by clang as a proxy for what's in libgcc/compiler-rt.
58enum ProcessorFeatures {
59#define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM,
60#include "llvm/TargetParser/X86TargetParser.def"
61 CPU_FEATURE_MAX,
62
63#define X86_MICROARCH_LEVEL(ENUM, STRING, PRIORITY) FEATURE_##ENUM = PRIORITY,
64#include "llvm/TargetParser/X86TargetParser.def"
65};
66
67enum CPUKind {
68 CK_None,
69 CK_i386,
70 CK_i486,
71 CK_WinChipC6,
72 CK_WinChip2,
73 CK_C3,
74 CK_i586,
75 CK_Pentium,
76 CK_PentiumMMX,
77 CK_PentiumPro,
78 CK_i686,
79 CK_Pentium2,
80 CK_Pentium3,
81 CK_PentiumM,
82 CK_C3_2,
83 CK_Yonah,
84 CK_Pentium4,
85 CK_Prescott,
86 CK_Nocona,
87 CK_Core2,
88 CK_Penryn,
89 CK_Bonnell,
90 CK_Silvermont,
91 CK_Goldmont,
92 CK_GoldmontPlus,
93 CK_Tremont,
94 CK_Gracemont,
95 CK_Nehalem,
96 CK_Westmere,
97 CK_SandyBridge,
98 CK_IvyBridge,
99 CK_Haswell,
100 CK_Broadwell,
101 CK_SkylakeClient,
102 CK_SkylakeServer,
103 CK_Cascadelake,
104 CK_Cooperlake,
105 CK_Cannonlake,
106 CK_IcelakeClient,
107 CK_Rocketlake,
108 CK_IcelakeServer,
109 CK_Tigerlake,
110 CK_SapphireRapids,
111 CK_Alderlake,
112 CK_Raptorlake,
113 CK_Meteorlake,
114 CK_Arrowlake,
115 CK_ArrowlakeS,
116 CK_Lunarlake,
117 CK_Pantherlake,
118 CK_Sierraforest,
119 CK_Grandridge,
120 CK_Graniterapids,
121 CK_GraniterapidsD,
122 CK_Emeraldrapids,
123 CK_Clearwaterforest,
124 CK_KNL,
125 CK_KNM,
126 CK_Lakemont,
127 CK_K6,
128 CK_K6_2,
129 CK_K6_3,
130 CK_Athlon,
131 CK_AthlonXP,
132 CK_K8,
133 CK_K8SSE3,
134 CK_AMDFAM10,
135 CK_BTVER1,
136 CK_BTVER2,
137 CK_BDVER1,
138 CK_BDVER2,
139 CK_BDVER3,
140 CK_BDVER4,
141 CK_ZNVER1,
142 CK_ZNVER2,
143 CK_ZNVER3,
144 CK_ZNVER4,
145 CK_x86_64,
146 CK_x86_64_v2,
147 CK_x86_64_v3,
148 CK_x86_64_v4,
149 CK_Geode,
150};
151
152/// Parse \p CPU string into a CPUKind. Will only accept 64-bit capable CPUs if
153/// \p Only64Bit is true.
154CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false);
155CPUKind parseTuneCPU(StringRef CPU, bool Only64Bit = false);
156
157/// Provide a list of valid CPU names. If \p Only64Bit is true, the list will
158/// only contain 64-bit capable CPUs.
159void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values,
160 bool Only64Bit = false);
161/// Provide a list of valid -mtune names.
162void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values,
163 bool Only64Bit = false);
164
165/// Get the key feature prioritizing target multiversioning.
166ProcessorFeatures getKeyFeature(CPUKind Kind);
167
168/// Fill in the features that \p CPU supports into \p Features.
169/// "+" will be append in front of each feature if NeedPlus is true.
170void getFeaturesForCPU(StringRef CPU, SmallVectorImpl<StringRef> &Features,
171 bool NeedPlus = false);
172
173/// Set or clear entries in \p Features that are implied to be enabled/disabled
174/// by the provided \p Feature.
175void updateImpliedFeatures(StringRef Feature, bool Enabled,
176 StringMap<bool> &Features);
177
178char getCPUDispatchMangling(StringRef Name);
179bool validateCPUSpecificCPUDispatch(StringRef Name);
180std::array<uint32_t, 4> getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
181unsigned getFeaturePriority(ProcessorFeatures Feat);
182
183} // namespace X86
184} // namespace llvm
185
186#endif
187

source code of llvm/include/llvm/TargetParser/X86TargetParser.h