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| 1 | /* FPU control word definitions. HP-PARISC version. |
|---|---|
| 2 | Copyright (C) 2012-2022 Free Software Foundation, Inc. |
| 3 | This file is part of the GNU C Library. |
| 4 | |
| 5 | The GNU C Library is free software; you can redistribute it and/or |
| 6 | modify it under the terms of the GNU Lesser General Public |
| 7 | License as published by the Free Software Foundation; either |
| 8 | version 2.1 of the License, or (at your option) any later version. |
| 9 | |
| 10 | The GNU C Library is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | Lesser General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU Lesser General Public |
| 16 | License along with the GNU C Library. If not, see |
| 17 | <https://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #ifndef _FPU_CONTROL_H |
| 20 | #define _FPU_CONTROL_H |
| 21 | |
| 22 | /* Masking of interrupts. */ |
| 23 | #define _FPU_MASK_PM 0x00000001 /* Inexact (I) */ |
| 24 | #define _FPU_MASK_UM 0x00000002 /* Underflow (U) */ |
| 25 | #define _FPU_MASK_OM 0x00000004 /* Overflow (O) */ |
| 26 | #define _FPU_MASK_ZM 0x00000008 /* Divide by zero (Z) */ |
| 27 | #define _FPU_MASK_IM 0x00000010 /* Invalid operation (V) */ |
| 28 | |
| 29 | /* Masking of rounding modes. */ |
| 30 | #define _FPU_HPPA_MASK_RM 0x00000600 /* Rounding mode mask */ |
| 31 | /* Masking of interrupt enable bits. */ |
| 32 | #define _FPU_HPPA_MASK_INT 0x0000001f /* Interrupt mask */ |
| 33 | /* Shift by 27 to install flag bits. */ |
| 34 | #define _FPU_HPPA_SHIFT_FLAGS 27 |
| 35 | |
| 36 | /* There are no reserved bits in the PA fpsr (though some are undefined). */ |
| 37 | #define _FPU_RESERVED 0x00000000 |
| 38 | /* Default is: No traps enabled, no flags set, round to nearest. */ |
| 39 | #define _FPU_DEFAULT 0x00000000 |
| 40 | /* Default + exceptions (FE_ALL_EXCEPT) enabled. */ |
| 41 | #define _FPU_IEEE (_FPU_DEFAULT | _FPU_HPPA_MASK_INT) |
| 42 | |
| 43 | /* Type of the control word. */ |
| 44 | typedef unsigned int fpu_control_t; |
| 45 | |
| 46 | /* Macros for accessing the hardware control word. */ |
| 47 | #define _FPU_GETCW(cw) \ |
| 48 | ({ \ |
| 49 | union { __extension__ unsigned long long __fpreg; unsigned int __halfreg[2]; } __fullfp; \ |
| 50 | /* Get the current status word. */ \ |
| 51 | __asm__ ("fstd %%fr0,0(%1)\n\t" \ |
| 52 | "fldd 0(%1),%%fr0\n\t" \ |
| 53 | : "=m" (__fullfp.__fpreg) : "r" (&__fullfp.__fpreg) : "%r0"); \ |
| 54 | cw = __fullfp.__halfreg[0]; \ |
| 55 | }) |
| 56 | |
| 57 | #define _FPU_SETCW(cw) \ |
| 58 | ({ \ |
| 59 | union { __extension__ unsigned long long __fpreg; unsigned int __halfreg[2]; } __fullfp; \ |
| 60 | /* Get the current status word and set the control word. */ \ |
| 61 | __asm__ ("fstd %%fr0,0(%1)\n\t" \ |
| 62 | : "=m" (__fullfp.__fpreg) : "r" (&__fullfp.__fpreg) : "%r0"); \ |
| 63 | __fullfp.__halfreg[0] = cw; \ |
| 64 | __asm__ ("fldd 0(%1),%%fr0\n\t" \ |
| 65 | : : "m" (__fullfp.__fpreg), "r" (&__fullfp.__fpreg) : "%r0" ); \ |
| 66 | }) |
| 67 | |
| 68 | /* Default control word set at startup. */ |
| 69 | extern fpu_control_t __fpu_control; |
| 70 | |
| 71 | #endif /* _FPU_CONTROL_H */ |
| 72 |
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