1/* PLT trampolines. PPC32 version.
2 Copyright (C) 2005-2024 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
18
19#include <sysdep.h>
20
21 .section ".text"
22 .align 2
23 .globl _dl_runtime_resolve
24 .type _dl_runtime_resolve,@function
25_dl_runtime_resolve:
26 cfi_startproc
27 # We need to save the registers used to pass parameters, and register 0,
28 # which is used by _mcount; the registers are saved in a stack frame.
29 stwu r1,-64(r1)
30 cfi_adjust_cfa_offset (64)
31 stw r0,12(r1)
32 stw r3,16(r1)
33 stw r4,20(r1)
34 # The code that calls this has put parameters for `fixup' in r12 and r11.
35 mr r3,r12
36 stw r5,24(r1)
37 mr r4,r11
38 stw r6,28(r1)
39 mflr r0
40 # We also need to save some of the condition register fields
41 stw r7,32(r1)
42 # Don't clobber the caller's LRSAVE, it is needed by _mcount.
43 stw r0,48(r1)
44 cfi_offset (lr, -16)
45 stw r8,36(r1)
46 mfcr r0
47 stw r9,40(r1)
48 stw r10,44(r1)
49 stw r0,8(r1)
50 bl _dl_fixup@local
51 # 'fixup' returns the address we want to branch to.
52 mtctr r3
53 # Put the registers back...
54 lwz r0,48(r1)
55 lwz r10,44(r1)
56 lwz r9,40(r1)
57 mtlr r0
58 lwz r8,36(r1)
59 lwz r0,8(r1)
60 lwz r7,32(r1)
61 lwz r6,28(r1)
62 mtcrf 0xFF,r0
63 lwz r5,24(r1)
64 lwz r4,20(r1)
65 lwz r3,16(r1)
66 lwz r0,12(r1)
67 # ...unwind the stack frame, and jump to the PLT entry we updated.
68 addi r1,r1,64
69 bctr
70 cfi_endproc
71 .size _dl_runtime_resolve,.-_dl_runtime_resolve
72
73#if !defined PROF && defined SHARED
74 .align 2
75 .globl _dl_prof_resolve
76 .type _dl_prof_resolve,@function
77_dl_prof_resolve:
78 cfi_startproc
79 # We need to save the registers used to pass parameters, and register 0,
80 # which is used by _mcount; the registers are saved in a stack frame.
81 stwu r1,-320(r1)
82 cfi_adjust_cfa_offset (320)
83 /* Stack layout:
84
85 +312 stackframe
86 +308 lr
87 +304 r1
88 +288 v12
89 +272 v11
90 +256 v10
91 +240 v9
92 +224 v8
93 +208 v7
94 +192 v6
95 +176 v5
96 +160 v4
97 +144 v3
98 +128 v2
99 +112 v1
100 +104 fp8
101 +96 fp7
102 +88 fp6
103 +80 fp5
104 +72 fp4
105 +64 fp3
106 +56 fp2
107 +48 fp1
108 +44 r10
109 +40 r9
110 +36 r8
111 +32 r7
112 +28 r6
113 +24 r5
114 +20 r4
115 +16 r3
116 +12 r0
117 +8 cr
118 r1 link
119 */
120 stw r0,12(r1)
121 stw r3,16(r1)
122 stw r4,20(r1)
123 # The code that calls this has put parameters for `fixup' in r12 and r11.
124 mr r3,r12
125 stw r5,24(r1)
126 mr r4,r11
127 stw r6,28(r1)
128 mflr r5
129 # We also need to save some of the condition register fields.
130 stw r7,32(r1)
131 # Don't clobber the caller's LRSAVE, it is needed by _mcount.
132 stw r5,308(r1)
133 cfi_offset (lr, -12)
134 stw r8,36(r1)
135 mfcr r0
136 stw r9,40(r1)
137 stw r10,44(r1)
138 stw r0,8(r1)
139#ifndef __NO_FPRS__
140 # Save the floating point registers
141 stfd fp1,48(r1)
142 stfd fp2,56(r1)
143 stfd fp3,64(r1)
144 stfd fp4,72(r1)
145 stfd fp5,80(r1)
146 stfd fp6,88(r1)
147 stfd fp7,96(r1)
148 stfd fp8,104(r1)
149#endif
150 # XXX TODO: store vmx registers
151 # Load the extra parameters.
152 addi r6,r1,16
153 addi r7,r1,312
154 li r0,-1
155 stw r0,0(r7)
156 bl _dl_profile_fixup@local
157 # 'fixup' returns the address we want to branch to.
158 mtctr r3
159 # Put the registers back...
160 lwz r0,308(r1)
161 lwz r10,44(r1)
162 lwz r9,40(r1)
163 mtlr r0
164 lwz r8,36(r1)
165 lwz r0,8(r1)
166 lwz r7,32(r1)
167 lwz r6,28(r1)
168 mtcrf 0xFF,r0
169 lwz r5,24(r1)
170 lwz r4,20(r1)
171 lwz r3,16(r1)
172 lwz r0,12(r1)
173#ifndef __NO_FPRS__
174 # Load the floating point registers.
175 lfd fp1,48(r1)
176 lfd fp2,56(r1)
177 lfd fp3,64(r1)
178 lfd fp4,72(r1)
179 lfd fp5,80(r1)
180 lfd fp6,88(r1)
181 lfd fp7,96(r1)
182 lfd fp8,104(r1)
183#endif
184 # ...unwind the stack frame, and jump to the PLT entry we updated.
185 addi r1,r1,320
186 bctr
187 cfi_endproc
188 .size _dl_prof_resolve,.-_dl_prof_resolve
189#endif
190

source code of glibc/sysdeps/powerpc/powerpc32/dl-trampoline.S