| 1 | /* PLT trampolines. PPC64 version. |
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| 2 | Copyright (C) 2005-2024 Free Software Foundation, Inc. |
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| 3 | This file is part of the GNU C Library. |
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| 4 | |
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| 5 | The GNU C Library is free software; you can redistribute it and/or |
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| 6 | modify it under the terms of the GNU Lesser General Public |
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| 7 | License as published by the Free Software Foundation; either |
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| 8 | version 2.1 of the License, or (at your option) any later version. |
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| 9 | |
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| 10 | The GNU C Library is distributed in the hope that it will be useful, |
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| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 13 | Lesser General Public License for more details. |
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| 14 | |
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| 15 | You should have received a copy of the GNU Lesser General Public |
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| 16 | License along with the GNU C Library; if not, see |
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| 17 | <https://www.gnu.org/licenses/>. */ |
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| 18 | |
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| 19 | #include <sysdep.h> |
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| 20 | #include <rtld-global-offsets.h> |
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| 21 | |
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| 22 | |
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| 23 | .section ".text" |
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| 24 | /* On entry r0 contains the index of the PLT entry we need to fixup |
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| 25 | and r11 contains the link_map (from PLT0+16). The link_map becomes |
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| 26 | parm1 (r3) and the index (r0) need to be converted to an offset |
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| 27 | (index * 24) in parm2 (r4). */ |
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| 28 | |
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| 29 | #define FRAME_SIZE (FRAME_MIN_SIZE+64) |
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| 30 | /* We need to save the registers used to pass parameters, ie. r3 thru |
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| 31 | r10; Use local var space rather than the parameter save area, |
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| 32 | because gcc as of 2010/05 doesn't allocate a proper stack frame for |
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| 33 | a function that makes no calls except for __tls_get_addr and we |
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| 34 | might be here resolving the __tls_get_addr call. */ |
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| 35 | .hidden _dl_runtime_resolve |
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| 36 | #define INT_PARMS FRAME_MIN_SIZE |
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| 37 | ENTRY (_dl_runtime_resolve, 4) |
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| 38 | stdu r1,-FRAME_SIZE(r1) |
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| 39 | cfi_adjust_cfa_offset (FRAME_SIZE) |
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| 40 | std r3,INT_PARMS+0(r1) |
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| 41 | mr r3,r11 |
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| 42 | std r4,INT_PARMS+8(r1) |
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| 43 | sldi r4,r0,1 |
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| 44 | std r5,INT_PARMS+16(r1) |
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| 45 | add r4,r4,r0 |
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| 46 | std r6,INT_PARMS+24(r1) |
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| 47 | sldi r4,r4,3 |
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| 48 | std r7,INT_PARMS+32(r1) |
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| 49 | mflr r0 |
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| 50 | std r8,INT_PARMS+40(r1) |
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| 51 | /* Store the LR in the LR Save area. */ |
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| 52 | std r0,FRAME_SIZE+FRAME_LR_SAVE(r1) |
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| 53 | cfi_offset (lr, FRAME_LR_SAVE) |
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| 54 | std r9,INT_PARMS+48(r1) |
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| 55 | std r10,INT_PARMS+56(r1) |
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| 56 | bl JUMPTARGET(_dl_fixup) |
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| 57 | #ifndef SHARED |
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| 58 | nop |
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| 59 | #endif |
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| 60 | /* Put the registers back. */ |
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| 61 | ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1) |
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| 62 | ld r10,INT_PARMS+56(r1) |
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| 63 | ld r9,INT_PARMS+48(r1) |
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| 64 | ld r8,INT_PARMS+40(r1) |
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| 65 | ld r7,INT_PARMS+32(r1) |
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| 66 | mtlr r0 |
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| 67 | ld r6,INT_PARMS+24(r1) |
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| 68 | ld r5,INT_PARMS+16(r1) |
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| 69 | ld r4,INT_PARMS+8(r1) |
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| 70 | /* Prepare for calling the function returned by fixup. */ |
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| 71 | PPC64_LOAD_FUNCPTR r3 |
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| 72 | ld r3,INT_PARMS+0(r1) |
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| 73 | #if _CALL_ELF == 2 |
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| 74 | /* Restore the caller's TOC in case we jump to a local entry point. */ |
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| 75 | ld r2,FRAME_SIZE+FRAME_TOC_SAVE(r1) |
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| 76 | #endif |
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| 77 | /* Unwind the stack frame, and jump. */ |
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| 78 | addi r1,r1,FRAME_SIZE |
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| 79 | bctr |
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| 80 | END(_dl_runtime_resolve) |
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| 81 | #undef FRAME_SIZE |
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| 82 | #undef INT_PARMS |
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| 83 | |
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| 84 | /* Stack layout: ELFv2 ABI. |
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| 85 | +752 previous backchain |
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| 86 | +744 spill_r31 |
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| 87 | +736 spill_r30 |
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| 88 | +720 v8 |
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| 89 | +704 v7 |
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| 90 | +688 v6 |
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| 91 | +672 v5 |
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| 92 | +656 v4 |
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| 93 | +640 v3 |
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| 94 | +624 v2 |
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| 95 | +608 v1 |
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| 96 | +600 fp10 |
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| 97 | ELFv1 ABI +592 fp9 |
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| 98 | +592 previous backchain +584 fp8 |
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| 99 | +584 spill_r31 +576 fp7 |
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| 100 | +576 spill_r30 +568 fp6 |
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| 101 | +560 v1 +560 fp5 |
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| 102 | +552 fp4 +552 fp4 |
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| 103 | +544 fp3 +544 fp3 |
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| 104 | +536 fp2 +536 fp2 |
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| 105 | +528 fp1 +528 fp1 |
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| 106 | +520 r4 +520 r4 |
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| 107 | +512 r3 +512 r3 |
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| 108 | return values |
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| 109 | +504 free |
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| 110 | +496 stackframe |
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| 111 | +488 lr |
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| 112 | +480 r1 |
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| 113 | +464 v13 |
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| 114 | +448 v12 |
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| 115 | +432 v11 |
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| 116 | +416 v10 |
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| 117 | +400 v9 |
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| 118 | +384 v8 |
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| 119 | +368 v7 |
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| 120 | +352 v6 |
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| 121 | +336 v5 |
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| 122 | +320 v4 |
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| 123 | +304 v3 |
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| 124 | +288 v2 |
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| 125 | * VMX Parms in V2-V13, V0-V1 are scratch |
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| 126 | +284 vrsave |
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| 127 | +280 free |
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| 128 | +272 fp13 |
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| 129 | +264 fp12 |
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| 130 | +256 fp11 |
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| 131 | +248 fp10 |
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| 132 | +240 fp9 |
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| 133 | +232 fp8 |
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| 134 | +224 fp7 |
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| 135 | +216 fp6 |
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| 136 | +208 fp5 |
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| 137 | +200 fp4 |
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| 138 | +192 fp3 |
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| 139 | +184 fp2 |
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| 140 | +176 fp1 |
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| 141 | * FP Parms in FP1-FP13, FP0 is a scratch register |
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| 142 | +168 r10 |
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| 143 | +160 r9 |
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| 144 | +152 r8 |
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| 145 | +144 r7 |
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| 146 | +136 r6 |
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| 147 | +128 r5 |
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| 148 | +120 r4 |
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| 149 | +112 r3 |
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| 150 | * Integer parms in R3-R10, R0 is scratch, R1 SP, R2 is TOC |
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| 151 | +104 parm8 |
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| 152 | +96 parm7 |
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| 153 | +88 parm6 |
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| 154 | +80 parm5 |
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| 155 | +72 parm4 |
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| 156 | +64 parm3 |
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| 157 | +56 parm2 |
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| 158 | +48 parm1 |
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| 159 | * Parameter save area |
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| 160 | * (v1 ABI: Allocated by the call, at least 8 double words) |
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| 161 | +40 v1 ABI: TOC save area |
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| 162 | +32 v1 ABI: Reserved for linker |
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| 163 | +24 v1 ABI: Reserved for compiler / v2 ABI: TOC save area |
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| 164 | +16 LR save area |
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| 165 | +8 CR save area |
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| 166 | r1+0 stack back chain |
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| 167 | */ |
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| 168 | #if _CALL_ELF == 2 |
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| 169 | # define FRAME_SIZE 752 |
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| 170 | # define VR_RTN 608 |
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| 171 | #else |
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| 172 | # define FRAME_SIZE 592 |
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| 173 | # define VR_RTN 560 |
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| 174 | #endif |
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| 175 | #define INT_RTN 512 |
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| 176 | #define FPR_RTN 528 |
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| 177 | #define STACK_FRAME 496 |
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| 178 | #define CALLING_LR 488 |
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| 179 | #define CALLING_SP 480 |
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| 180 | #define INT_PARMS 112 |
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| 181 | #define FPR_PARMS 176 |
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| 182 | #define VR_PARMS 288 |
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| 183 | #define VR_VRSAVE 284 |
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| 184 | .section ".toc" ,"aw" |
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| 185 | .LC__dl_hwcap: |
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| 186 | # ifdef SHARED |
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| 187 | .tc _rtld_local_ro[TC],_rtld_local_ro |
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| 188 | # else |
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| 189 | .tc _dl_hwcap[TC],_dl_hwcap |
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| 190 | # endif |
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| 191 | .section ".text" |
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| 192 | |
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| 193 | .machine "altivec" |
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| 194 | /* On entry r0 contains the index of the PLT entry we need to fixup |
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| 195 | and r11 contains the link_map (from PLT0+16). The link_map becomes |
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| 196 | parm1 (r3) and the index (r0) needs to be converted to an offset |
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| 197 | (index * 24) in parm2 (r4). */ |
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| 198 | #if !defined PROF && defined SHARED |
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| 199 | .hidden _dl_profile_resolve |
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| 200 | ENTRY (_dl_profile_resolve, 4) |
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| 201 | /* Spill r30, r31 to preserve the link_map* and reloc_addr, in case we |
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| 202 | need to call _dl_audit_pltexit. */ |
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| 203 | std r31,-8(r1) |
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| 204 | std r30,-16(r1) |
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| 205 | /* We need to save the registers used to pass parameters, ie. r3 thru |
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| 206 | r10; the registers are saved in a stack frame. */ |
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| 207 | stdu r1,-FRAME_SIZE(r1) |
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| 208 | cfi_adjust_cfa_offset (FRAME_SIZE) |
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| 209 | cfi_offset(r31,-8) |
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| 210 | cfi_offset(r30,-16) |
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| 211 | std r3,INT_PARMS+0(r1) |
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| 212 | mr r3,r11 |
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| 213 | std r4,INT_PARMS+8(r1) |
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| 214 | sldi r4,r0,1 /* index * 2 */ |
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| 215 | std r5,INT_PARMS+16(r1) |
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| 216 | add r4,r4,r0 /* index * 3 */ |
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| 217 | std r6,INT_PARMS+24(r1) |
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| 218 | sldi r4,r4,3 /* index * 24 == PLT offset */ |
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| 219 | mflr r5 |
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| 220 | std r7,INT_PARMS+32(r1) |
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| 221 | std r8,INT_PARMS+40(r1) |
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| 222 | /* Store the LR in the LR Save area. */ |
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| 223 | la r8,FRAME_SIZE(r1) |
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| 224 | std r5,FRAME_SIZE+FRAME_LR_SAVE(r1) |
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| 225 | cfi_offset (lr, FRAME_LR_SAVE) |
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| 226 | std r5,CALLING_LR(r1) |
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| 227 | std r9,INT_PARMS+48(r1) |
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| 228 | std r10,INT_PARMS+56(r1) |
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| 229 | std r8,CALLING_SP(r1) |
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| 230 | addis r12,r2,.LC__dl_hwcap@toc@ha |
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| 231 | ld r12,.LC__dl_hwcap@toc@l(r12) |
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| 232 | #ifdef SHARED |
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| 233 | /* Load _rtld_local_ro._dl_hwcap. */ |
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| 234 | ld r12,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(r12) |
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| 235 | #else |
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| 236 | /* Load extern _dl_hwcap. */ |
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| 237 | ld r12,0(r12) |
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| 238 | #endif |
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| 239 | andis. r0,r12,(PPC_FEATURE_HAS_ALTIVEC >> 16) |
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| 240 | beq L(saveFP) |
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| 241 | la r10,(VR_PARMS+0)(r1) |
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| 242 | la r9,(VR_PARMS+16)(r1) |
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| 243 | li r11,32 |
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| 244 | li r12,64 |
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| 245 | stvx v2,0,r10 |
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| 246 | stvx v3,0,r9 |
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| 247 | |
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| 248 | stvx v4,r11,r10 |
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| 249 | stvx v5,r11,r9 |
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| 250 | addi r11,r11,64 |
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| 251 | |
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| 252 | stvx v6,r12,r10 |
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| 253 | stvx v7,r12,r9 |
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| 254 | addi r12,r12,64 |
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| 255 | |
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| 256 | stvx v8,r11,r10 |
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| 257 | stvx v9,r11,r9 |
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| 258 | addi r11,r11,64 |
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| 259 | |
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| 260 | stvx v10,r12,r10 |
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| 261 | stvx v11,r12,r9 |
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| 262 | mfspr r0,VRSAVE |
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| 263 | |
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| 264 | stvx v12,r11,r10 |
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| 265 | stvx v13,r11,r9 |
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| 266 | L(saveFP): |
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| 267 | stw r0,VR_VRSAVE(r1) |
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| 268 | /* Save floating registers. */ |
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| 269 | stfd fp1,FPR_PARMS+0(r1) |
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| 270 | stfd fp2,FPR_PARMS+8(r1) |
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| 271 | stfd fp3,FPR_PARMS+16(r1) |
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| 272 | stfd fp4,FPR_PARMS+24(r1) |
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| 273 | stfd fp5,FPR_PARMS+32(r1) |
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| 274 | stfd fp6,FPR_PARMS+40(r1) |
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| 275 | stfd fp7,FPR_PARMS+48(r1) |
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| 276 | stfd fp8,FPR_PARMS+56(r1) |
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| 277 | stfd fp9,FPR_PARMS+64(r1) |
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| 278 | stfd fp10,FPR_PARMS+72(r1) |
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| 279 | stfd fp11,FPR_PARMS+80(r1) |
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| 280 | li r0,-1 |
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| 281 | stfd fp12,FPR_PARMS+88(r1) |
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| 282 | stfd fp13,FPR_PARMS+96(r1) |
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| 283 | /* Load the extra parameters. */ |
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| 284 | addi r6,r1,INT_PARMS |
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| 285 | addi r7,r1,STACK_FRAME |
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| 286 | /* Save link_map* and reloc_addr parms for later. */ |
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| 287 | mr r31,r3 |
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| 288 | mr r30,r4 |
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| 289 | std r0,0(r7) |
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| 290 | bl JUMPTARGET(_dl_profile_fixup) |
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| 291 | #ifndef SHARED |
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| 292 | nop |
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| 293 | #endif |
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| 294 | /* Test *framesizep > 0 to see if need to do pltexit processing. */ |
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| 295 | ld r0,STACK_FRAME(r1) |
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| 296 | /* Put the registers back. */ |
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| 297 | lwz r12,VR_VRSAVE(r1) |
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| 298 | cmpdi cr1,r0,0 |
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| 299 | cmpdi cr0,r12,0 |
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| 300 | bgt cr1,L(do_pltexit) |
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| 301 | la r10,(VR_PARMS+0)(r1) |
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| 302 | la r9,(VR_PARMS+16)(r1) |
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| 303 | /* VRSAVE must be non-zero if VMX is present and VRs are in use. */ |
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| 304 | beq L(restoreFXR) |
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| 305 | li r11,32 |
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| 306 | li r12,64 |
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| 307 | lvx v2,0,r10 |
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| 308 | lvx v3,0,r9 |
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| 309 | |
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| 310 | lvx v4,r11,r10 |
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| 311 | lvx v5,r11,r9 |
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| 312 | addi r11,r11,64 |
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| 313 | |
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| 314 | lvx v6,r12,r10 |
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| 315 | lvx v7,r12,r9 |
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| 316 | addi r12,r12,64 |
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| 317 | |
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| 318 | lvx v8,r11,r10 |
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| 319 | lvx v9,r11,r9 |
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| 320 | addi r11,r11,64 |
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| 321 | |
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| 322 | lvx v10,r12,r10 |
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| 323 | lvx v11,r12,r9 |
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| 324 | |
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| 325 | lvx v12,r11,r10 |
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| 326 | lvx v13,r11,r9 |
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| 327 | L(restoreFXR): |
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| 328 | ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1) |
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| 329 | ld r10,INT_PARMS+56(r1) |
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| 330 | ld r9,INT_PARMS+48(r1) |
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| 331 | ld r8,INT_PARMS+40(r1) |
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| 332 | ld r7,INT_PARMS+32(r1) |
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| 333 | mtlr r0 |
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| 334 | ld r6,INT_PARMS+24(r1) |
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| 335 | ld r5,INT_PARMS+16(r1) |
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| 336 | ld r4,INT_PARMS+8(r1) |
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| 337 | /* Prepare for calling the function returned by fixup. */ |
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| 338 | PPC64_LOAD_FUNCPTR r3 |
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| 339 | ld r3,INT_PARMS+0(r1) |
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| 340 | #if _CALL_ELF == 2 |
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| 341 | /* Restore the caller's TOC in case we jump to a local entry point. */ |
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| 342 | ld r2,FRAME_SIZE+FRAME_TOC_SAVE(r1) |
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| 343 | #endif |
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| 344 | /* Load the floating point registers. */ |
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| 345 | lfd fp1,FPR_PARMS+0(r1) |
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| 346 | lfd fp2,FPR_PARMS+8(r1) |
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| 347 | lfd fp3,FPR_PARMS+16(r1) |
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| 348 | lfd fp4,FPR_PARMS+24(r1) |
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| 349 | lfd fp5,FPR_PARMS+32(r1) |
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| 350 | lfd fp6,FPR_PARMS+40(r1) |
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| 351 | lfd fp7,FPR_PARMS+48(r1) |
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| 352 | lfd fp8,FPR_PARMS+56(r1) |
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| 353 | lfd fp9,FPR_PARMS+64(r1) |
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| 354 | lfd fp10,FPR_PARMS+72(r1) |
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| 355 | lfd fp11,FPR_PARMS+80(r1) |
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| 356 | lfd fp12,FPR_PARMS+88(r1) |
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| 357 | lfd fp13,FPR_PARMS+96(r1) |
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| 358 | /* Unwind the stack frame, and jump. */ |
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| 359 | ld r31,FRAME_SIZE-8(r1) |
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| 360 | ld r30,FRAME_SIZE-16(r1) |
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| 361 | addi r1,r1,FRAME_SIZE |
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| 362 | bctr |
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| 363 | |
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| 364 | L(do_pltexit): |
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| 365 | la r10,(VR_PARMS+0)(r1) |
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| 366 | la r9,(VR_PARMS+16)(r1) |
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| 367 | beq L(restoreFXR2) |
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| 368 | li r11,32 |
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| 369 | li r12,64 |
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| 370 | lvx v2,0,r10 |
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| 371 | lvx v3,0,r9 |
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| 372 | |
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| 373 | lvx v4,r11,r10 |
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| 374 | lvx v5,r11,r9 |
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| 375 | addi r11,r11,64 |
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| 376 | |
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| 377 | lvx v6,r12,r10 |
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| 378 | lvx v7,r12,r9 |
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| 379 | addi r12,r12,64 |
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| 380 | |
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| 381 | lvx v8,r11,r10 |
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| 382 | lvx v9,r11,r9 |
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| 383 | addi r11,r11,64 |
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| 384 | |
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| 385 | lvx v10,r12,r10 |
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| 386 | lvx v11,r12,r9 |
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| 387 | |
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| 388 | lvx v12,r11,r10 |
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| 389 | lvx v13,r11,r9 |
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| 390 | L(restoreFXR2): |
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| 391 | ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1) |
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| 392 | ld r10,INT_PARMS+56(r1) |
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| 393 | ld r9,INT_PARMS+48(r1) |
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| 394 | ld r8,INT_PARMS+40(r1) |
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| 395 | ld r7,INT_PARMS+32(r1) |
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| 396 | mtlr r0 |
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| 397 | ld r6,INT_PARMS+24(r1) |
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| 398 | ld r5,INT_PARMS+16(r1) |
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| 399 | ld r4,INT_PARMS+8(r1) |
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| 400 | /* Prepare for calling the function returned by fixup. */ |
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| 401 | std r2,FRAME_TOC_SAVE(r1) |
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| 402 | PPC64_LOAD_FUNCPTR r3 |
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| 403 | ld r3,INT_PARMS+0(r1) |
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| 404 | /* Load the floating point registers. */ |
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| 405 | lfd fp1,FPR_PARMS+0(r1) |
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| 406 | lfd fp2,FPR_PARMS+8(r1) |
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| 407 | lfd fp3,FPR_PARMS+16(r1) |
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| 408 | lfd fp4,FPR_PARMS+24(r1) |
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| 409 | lfd fp5,FPR_PARMS+32(r1) |
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| 410 | lfd fp6,FPR_PARMS+40(r1) |
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| 411 | lfd fp7,FPR_PARMS+48(r1) |
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| 412 | lfd fp8,FPR_PARMS+56(r1) |
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| 413 | lfd fp9,FPR_PARMS+64(r1) |
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| 414 | lfd fp10,FPR_PARMS+72(r1) |
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| 415 | lfd fp11,FPR_PARMS+80(r1) |
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| 416 | lfd fp12,FPR_PARMS+88(r1) |
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| 417 | lfd fp13,FPR_PARMS+96(r1) |
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| 418 | /* Call the target function. */ |
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| 419 | bctrl |
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| 420 | ld r2,FRAME_TOC_SAVE(r1) |
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| 421 | lwz r12,VR_VRSAVE(r1) |
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| 422 | /* But return here and store the return values. */ |
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| 423 | std r3,INT_RTN(r1) |
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| 424 | std r4,INT_RTN+8(r1) |
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| 425 | stfd fp1,FPR_RTN+0(r1) |
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| 426 | stfd fp2,FPR_RTN+8(r1) |
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| 427 | cmpdi cr0,r12,0 |
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| 428 | la r10,VR_RTN(r1) |
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| 429 | stfd fp3,FPR_RTN+16(r1) |
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| 430 | stfd fp4,FPR_RTN+24(r1) |
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| 431 | #if _CALL_ELF == 2 |
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| 432 | la r12,VR_RTN+16(r1) |
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| 433 | stfd fp5,FPR_RTN+32(r1) |
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| 434 | stfd fp6,FPR_RTN+40(r1) |
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| 435 | li r5,32 |
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| 436 | li r6,64 |
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| 437 | stfd fp7,FPR_RTN+48(r1) |
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| 438 | stfd fp8,FPR_RTN+56(r1) |
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| 439 | stfd fp9,FPR_RTN+64(r1) |
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| 440 | stfd fp10,FPR_RTN+72(r1) |
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| 441 | #endif |
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| 442 | mr r3,r31 |
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| 443 | mr r4,r30 |
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| 444 | beq L(callpltexit) |
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| 445 | stvx v2,0,r10 |
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| 446 | #if _CALL_ELF == 2 |
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| 447 | stvx v3,0,r12 |
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| 448 | stvx v4,r5,r10 |
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| 449 | stvx v5,r5,r12 |
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| 450 | addi r5,r5,64 |
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| 451 | stvx v6,r6,r10 |
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| 452 | stvx v7,r6,r12 |
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| 453 | stvx v8,r5,r10 |
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| 454 | stvx v9,r5,r12 |
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| 455 | #endif |
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| 456 | L(callpltexit): |
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| 457 | addi r5,r1,INT_PARMS |
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| 458 | addi r6,r1,INT_RTN |
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| 459 | bl JUMPTARGET(_dl_audit_pltexit) |
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| 460 | #ifndef SHARED |
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| 461 | nop |
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| 462 | #endif |
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| 463 | /* Restore the return values from target function. */ |
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| 464 | lwz r12,VR_VRSAVE(r1) |
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| 465 | ld r3,INT_RTN(r1) |
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| 466 | ld r4,INT_RTN+8(r1) |
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| 467 | lfd fp1,FPR_RTN+0(r1) |
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| 468 | lfd fp2,FPR_RTN+8(r1) |
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| 469 | cmpdi cr0,r12,0 |
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| 470 | la r11,VR_RTN(r1) |
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| 471 | lfd fp3,FPR_RTN+16(r1) |
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| 472 | lfd fp4,FPR_RTN+24(r1) |
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| 473 | #if _CALL_ELF == 2 |
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| 474 | la r12,VR_RTN+16(r1) |
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| 475 | lfd fp5,FPR_RTN+32(r1) |
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| 476 | lfd fp6,FPR_RTN+40(r1) |
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| 477 | li r30,32 |
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| 478 | li r31,64 |
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| 479 | lfd fp7,FPR_RTN+48(r1) |
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| 480 | lfd fp8,FPR_RTN+56(r1) |
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| 481 | lfd fp9,FPR_RTN+64(r1) |
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| 482 | lfd fp10,FPR_RTN+72(r1) |
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| 483 | #endif |
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| 484 | beq L(pltexitreturn) |
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| 485 | lvx v2,0,r11 |
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| 486 | #if _CALL_ELF == 2 |
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| 487 | lvx v3,0,r12 |
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| 488 | lvx v4,r30,r11 |
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| 489 | lvx v5,r30,r12 |
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| 490 | addi r30,r30,64 |
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| 491 | lvx v6,r31,r11 |
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| 492 | lvx v7,r31,r12 |
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| 493 | lvx v8,r30,r11 |
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| 494 | lvx v9,r30,r12 |
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| 495 | #endif |
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| 496 | L(pltexitreturn): |
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| 497 | ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1) |
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| 498 | ld r31,FRAME_SIZE-8(r1) |
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| 499 | ld r30,FRAME_SIZE-16(r1) |
|---|
| 500 | mtlr r0 |
|---|
| 501 | ld r1,0(r1) |
|---|
| 502 | blr |
|---|
| 503 | END(_dl_profile_resolve) |
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| 504 | #endif |
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| 505 | |
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