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| 1 | /* Restartable Sequences Linux mips architecture header. |
|---|---|
| 2 | Copyright (C) 2021-2024 Free Software Foundation, Inc. |
| 3 | |
| 4 | The GNU C Library is free software; you can redistribute it and/or |
| 5 | modify it under the terms of the GNU Lesser General Public |
| 6 | License as published by the Free Software Foundation; either |
| 7 | version 2.1 of the License, or (at your option) any later version. |
| 8 | |
| 9 | The GNU C Library is distributed in the hope that it will be useful, |
| 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 12 | Lesser General Public License for more details. |
| 13 | |
| 14 | You should have received a copy of the GNU Lesser General Public |
| 15 | License along with the GNU C Library; if not, see |
| 16 | <https://www.gnu.org/licenses/>. */ |
| 17 | |
| 18 | #ifndef _SYS_RSEQ_H |
| 19 | # error "Never use <bits/rseq.h> directly; include <sys/rseq.h> instead." |
| 20 | #endif |
| 21 | |
| 22 | /* RSEQ_SIG is a signature required before each abort handler code. |
| 23 | |
| 24 | It is a 32-bit value that maps to actual architecture code compiled |
| 25 | into applications and libraries. It needs to be defined for each |
| 26 | architecture. When choosing this value, it needs to be taken into |
| 27 | account that generating invalid instructions may have ill effects on |
| 28 | tools like objdump, and may also have impact on the CPU speculative |
| 29 | execution efficiency in some cases. |
| 30 | |
| 31 | RSEQ_SIG uses the break instruction. The instruction pattern is: |
| 32 | |
| 33 | On MIPS: |
| 34 | 0350000d break 0x350 |
| 35 | |
| 36 | On nanoMIPS: |
| 37 | 00100350 break 0x350 |
| 38 | |
| 39 | On microMIPS: |
| 40 | 0000d407 break 0x350 |
| 41 | |
| 42 | For nanoMIPS32 and microMIPS, the instruction stream is encoded as |
| 43 | 16-bit halfwords, so the signature halfwords need to be swapped |
| 44 | accordingly for little-endian. */ |
| 45 | |
| 46 | #if defined (__nanomips__) |
| 47 | # ifdef __MIPSEL__ |
| 48 | # define RSEQ_SIG 0x03500010 |
| 49 | # else |
| 50 | # define RSEQ_SIG 0x00100350 |
| 51 | # endif |
| 52 | #elif defined (__mips_micromips) |
| 53 | # ifdef __MIPSEL__ |
| 54 | # define RSEQ_SIG 0xd4070000 |
| 55 | # else |
| 56 | # define RSEQ_SIG 0x0000d407 |
| 57 | # endif |
| 58 | #elif defined (__mips__) |
| 59 | # define RSEQ_SIG 0x0350000d |
| 60 | #else |
| 61 | /* Unknown MIPS architecture. */ |
| 62 | #endif |
| 63 |
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