1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
4 *
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
7 */
8#define pr_fmt(fmt) "ACPI: " fmt
9
10#include <linux/init.h>
11#include <linux/acpi.h>
12#include <linux/acpi_pmtmr.h>
13#include <linux/efi.h>
14#include <linux/cpumask.h>
15#include <linux/export.h>
16#include <linux/dmi.h>
17#include <linux/irq.h>
18#include <linux/slab.h>
19#include <linux/memblock.h>
20#include <linux/ioport.h>
21#include <linux/pci.h>
22#include <linux/efi-bgrt.h>
23#include <linux/serial_core.h>
24#include <linux/pgtable.h>
25
26#include <asm/e820/api.h>
27#include <asm/irqdomain.h>
28#include <asm/pci_x86.h>
29#include <asm/io_apic.h>
30#include <asm/apic.h>
31#include <asm/io.h>
32#include <asm/mpspec.h>
33#include <asm/smp.h>
34#include <asm/i8259.h>
35#include <asm/setup.h>
36
37#include "sleep.h" /* To include x86_acpi_suspend_lowlevel */
38static int __initdata acpi_force = 0;
39int acpi_disabled;
40EXPORT_SYMBOL(acpi_disabled);
41
42#ifdef CONFIG_X86_64
43# include <asm/proto.h>
44#endif /* X86 */
45
46int acpi_noirq; /* skip ACPI IRQ initialization */
47static int acpi_nobgrt; /* skip ACPI BGRT */
48int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
49EXPORT_SYMBOL(acpi_pci_disabled);
50
51int acpi_lapic;
52int acpi_ioapic;
53int acpi_strict;
54int acpi_disable_cmcff;
55bool acpi_int_src_ovr[NR_IRQS_LEGACY];
56
57/* ACPI SCI override configuration */
58u8 acpi_sci_flags __initdata;
59u32 acpi_sci_override_gsi __initdata = INVALID_ACPI_IRQ;
60int acpi_skip_timer_override __initdata;
61int acpi_use_timer_override __initdata;
62int acpi_fix_pin2_polarity __initdata;
63
64#ifdef CONFIG_X86_LOCAL_APIC
65static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
66static bool has_lapic_cpus __initdata;
67static bool acpi_support_online_capable;
68#endif
69
70#ifdef CONFIG_X86_64
71/* Physical address of the Multiprocessor Wakeup Structure mailbox */
72static u64 acpi_mp_wake_mailbox_paddr;
73/* Virtual address of the Multiprocessor Wakeup Structure mailbox */
74static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox;
75#endif
76
77#ifdef CONFIG_X86_IO_APIC
78/*
79 * Locks related to IOAPIC hotplug
80 * Hotplug side:
81 * ->device_hotplug_lock
82 * ->acpi_ioapic_lock
83 * ->ioapic_lock
84 * Interrupt mapping side:
85 * ->acpi_ioapic_lock
86 * ->ioapic_mutex
87 * ->ioapic_lock
88 */
89static DEFINE_MUTEX(acpi_ioapic_lock);
90#endif
91
92/* --------------------------------------------------------------------------
93 Boot-time Configuration
94 -------------------------------------------------------------------------- */
95
96/*
97 * The default interrupt routing model is PIC (8259). This gets
98 * overridden if IOAPICs are enumerated (below).
99 */
100enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
101
102
103/*
104 * ISA irqs by default are the first 16 gsis but can be
105 * any gsi as specified by an interrupt source override.
106 */
107static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
108 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
109};
110
111/*
112 * This is just a simple wrapper around early_memremap(),
113 * with sanity checks for phys == 0 and size == 0.
114 */
115void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size)
116{
117
118 if (!phys || !size)
119 return NULL;
120
121 return early_memremap(phys_addr: phys, size);
122}
123
124void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
125{
126 if (!map || !size)
127 return;
128
129 early_memunmap(addr: map, size);
130}
131
132#ifdef CONFIG_X86_LOCAL_APIC
133static int __init acpi_parse_madt(struct acpi_table_header *table)
134{
135 struct acpi_table_madt *madt = NULL;
136
137 if (!boot_cpu_has(X86_FEATURE_APIC))
138 return -EINVAL;
139
140 madt = (struct acpi_table_madt *)table;
141 if (!madt) {
142 pr_warn("Unable to map MADT\n");
143 return -ENODEV;
144 }
145
146 if (madt->address) {
147 acpi_lapic_addr = (u64) madt->address;
148
149 pr_debug("Local APIC address 0x%08x\n", madt->address);
150 }
151
152 if (madt->flags & ACPI_MADT_PCAT_COMPAT)
153 legacy_pic_pcat_compat();
154
155 /* ACPI 6.3 and newer support the online capable bit. */
156 if (acpi_gbl_FADT.header.revision > 6 ||
157 (acpi_gbl_FADT.header.revision == 6 &&
158 acpi_gbl_FADT.minor_revision >= 3))
159 acpi_support_online_capable = true;
160
161 default_acpi_madt_oem_check(madt->header.oem_id,
162 madt->header.oem_table_id);
163
164 return 0;
165}
166
167static bool __init acpi_is_processor_usable(u32 lapic_flags)
168{
169 if (lapic_flags & ACPI_MADT_ENABLED)
170 return true;
171
172 if (!acpi_support_online_capable ||
173 (lapic_flags & ACPI_MADT_ONLINE_CAPABLE))
174 return true;
175
176 return false;
177}
178
179static int __init
180acpi_parse_x2apic(union acpi_subtable_headers *header, const unsigned long end)
181{
182 struct acpi_madt_local_x2apic *processor = NULL;
183#ifdef CONFIG_X86_X2APIC
184 u32 apic_id;
185 u8 enabled;
186#endif
187
188 processor = (struct acpi_madt_local_x2apic *)header;
189
190 if (BAD_MADT_ENTRY(processor, end))
191 return -EINVAL;
192
193 acpi_table_print_madt_entry(madt: &header->common);
194
195#ifdef CONFIG_X86_X2APIC
196 apic_id = processor->local_apic_id;
197 enabled = processor->lapic_flags & ACPI_MADT_ENABLED;
198
199 /* Ignore invalid ID */
200 if (apic_id == 0xffffffff)
201 return 0;
202
203 /* don't register processors that cannot be onlined */
204 if (!acpi_is_processor_usable(lapic_flags: processor->lapic_flags))
205 return 0;
206
207 /*
208 * According to https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#processor-local-x2apic-structure
209 * when MADT provides both valid LAPIC and x2APIC entries, the APIC ID
210 * in x2APIC must be equal or greater than 0xff.
211 */
212 if (has_lapic_cpus && apic_id < 0xff)
213 return 0;
214
215 /*
216 * We need to register disabled CPU as well to permit
217 * counting disabled CPUs. This allows us to size
218 * cpus_possible_map more accurately, to permit
219 * to not preallocating memory for all NR_CPUS
220 * when we use CPU hotplug.
221 */
222 if (!apic_id_valid(apic_id)) {
223 if (enabled)
224 pr_warn("x2apic entry ignored\n");
225 return 0;
226 }
227
228 topology_register_apic(apic_id, acpi_id: processor->uid, present: enabled);
229#else
230 pr_warn("x2apic entry ignored\n");
231#endif
232
233 return 0;
234}
235
236static int __init
237acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end)
238{
239 struct acpi_madt_local_apic *processor = NULL;
240
241 processor = (struct acpi_madt_local_apic *)header;
242
243 if (BAD_MADT_ENTRY(processor, end))
244 return -EINVAL;
245
246 acpi_table_print_madt_entry(madt: &header->common);
247
248 /* Ignore invalid ID */
249 if (processor->id == 0xff)
250 return 0;
251
252 /* don't register processors that can not be onlined */
253 if (!acpi_is_processor_usable(lapic_flags: processor->lapic_flags))
254 return 0;
255
256 /*
257 * We need to register disabled CPU as well to permit
258 * counting disabled CPUs. This allows us to size
259 * cpus_possible_map more accurately, to permit
260 * to not preallocating memory for all NR_CPUS
261 * when we use CPU hotplug.
262 */
263 topology_register_apic(apic_id: processor->id, /* APIC ID */
264 acpi_id: processor->processor_id, /* ACPI ID */
265 present: processor->lapic_flags & ACPI_MADT_ENABLED);
266
267 has_lapic_cpus = true;
268 return 0;
269}
270
271static int __init
272acpi_parse_sapic(union acpi_subtable_headers *header, const unsigned long end)
273{
274 struct acpi_madt_local_sapic *processor = NULL;
275
276 processor = (struct acpi_madt_local_sapic *)header;
277
278 if (BAD_MADT_ENTRY(processor, end))
279 return -EINVAL;
280
281 acpi_table_print_madt_entry(madt: &header->common);
282
283 topology_register_apic(apic_id: (processor->id << 8) | processor->eid,/* APIC ID */
284 acpi_id: processor->processor_id, /* ACPI ID */
285 present: processor->lapic_flags & ACPI_MADT_ENABLED);
286
287 return 0;
288}
289
290static int __init
291acpi_parse_lapic_addr_ovr(union acpi_subtable_headers * header,
292 const unsigned long end)
293{
294 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
295
296 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
297
298 if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
299 return -EINVAL;
300
301 acpi_table_print_madt_entry(madt: &header->common);
302
303 acpi_lapic_addr = lapic_addr_ovr->address;
304
305 return 0;
306}
307
308static int __init
309acpi_parse_x2apic_nmi(union acpi_subtable_headers *header,
310 const unsigned long end)
311{
312 struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL;
313
314 x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header;
315
316 if (BAD_MADT_ENTRY(x2apic_nmi, end))
317 return -EINVAL;
318
319 acpi_table_print_madt_entry(madt: &header->common);
320
321 if (x2apic_nmi->lint != 1)
322 pr_warn("NMI not connected to LINT 1!\n");
323
324 return 0;
325}
326
327static int __init
328acpi_parse_lapic_nmi(union acpi_subtable_headers * header, const unsigned long end)
329{
330 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
331
332 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
333
334 if (BAD_MADT_ENTRY(lapic_nmi, end))
335 return -EINVAL;
336
337 acpi_table_print_madt_entry(madt: &header->common);
338
339 if (lapic_nmi->lint != 1)
340 pr_warn("NMI not connected to LINT 1!\n");
341
342 return 0;
343}
344
345#ifdef CONFIG_X86_64
346static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip)
347{
348 /*
349 * Remap mailbox memory only for the first call to acpi_wakeup_cpu().
350 *
351 * Wakeup of secondary CPUs is fully serialized in the core code.
352 * No need to protect acpi_mp_wake_mailbox from concurrent accesses.
353 */
354 if (!acpi_mp_wake_mailbox) {
355 acpi_mp_wake_mailbox = memremap(offset: acpi_mp_wake_mailbox_paddr,
356 size: sizeof(*acpi_mp_wake_mailbox),
357 flags: MEMREMAP_WB);
358 }
359
360 /*
361 * Mailbox memory is shared between the firmware and OS. Firmware will
362 * listen on mailbox command address, and once it receives the wakeup
363 * command, the CPU associated with the given apicid will be booted.
364 *
365 * The value of 'apic_id' and 'wakeup_vector' must be visible to the
366 * firmware before the wakeup command is visible. smp_store_release()
367 * ensures ordering and visibility.
368 */
369 acpi_mp_wake_mailbox->apic_id = apicid;
370 acpi_mp_wake_mailbox->wakeup_vector = start_ip;
371 smp_store_release(&acpi_mp_wake_mailbox->command,
372 ACPI_MP_WAKE_COMMAND_WAKEUP);
373
374 /*
375 * Wait for the CPU to wake up.
376 *
377 * The CPU being woken up is essentially in a spin loop waiting to be
378 * woken up. It should not take long for it wake up and acknowledge by
379 * zeroing out ->command.
380 *
381 * ACPI specification doesn't provide any guidance on how long kernel
382 * has to wait for a wake up acknowledgement. It also doesn't provide
383 * a way to cancel a wake up request if it takes too long.
384 *
385 * In TDX environment, the VMM has control over how long it takes to
386 * wake up secondary. It can postpone scheduling secondary vCPU
387 * indefinitely. Giving up on wake up request and reporting error opens
388 * possible attack vector for VMM: it can wake up a secondary CPU when
389 * kernel doesn't expect it. Wait until positive result of the wake up
390 * request.
391 */
392 while (READ_ONCE(acpi_mp_wake_mailbox->command))
393 cpu_relax();
394
395 return 0;
396}
397#endif /* CONFIG_X86_64 */
398#endif /* CONFIG_X86_LOCAL_APIC */
399
400#ifdef CONFIG_X86_IO_APIC
401#define MP_ISA_BUS 0
402
403static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
404 u8 trigger, u32 gsi);
405
406static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
407 u32 gsi)
408{
409 /*
410 * Check bus_irq boundary.
411 */
412 if (bus_irq >= NR_IRQS_LEGACY) {
413 pr_warn("Invalid bus_irq %u for legacy override\n", bus_irq);
414 return;
415 }
416
417 /*
418 * TBD: This check is for faulty timer entries, where the override
419 * erroneously sets the trigger to level, resulting in a HUGE
420 * increase of timer interrupts!
421 */
422 if ((bus_irq == 0) && (trigger == 3))
423 trigger = 1;
424
425 if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0)
426 return;
427 /*
428 * Reset default identity mapping if gsi is also an legacy IRQ,
429 * otherwise there will be more than one entry with the same GSI
430 * and acpi_isa_irq_to_gsi() may give wrong result.
431 */
432 if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi)
433 isa_irq_to_gsi[gsi] = INVALID_ACPI_IRQ;
434 isa_irq_to_gsi[bus_irq] = gsi;
435}
436
437static void mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
438 int polarity)
439{
440#ifdef CONFIG_X86_MPPARSE
441 struct mpc_intsrc mp_irq;
442 struct pci_dev *pdev;
443 unsigned char number;
444 unsigned int devfn;
445 int ioapic;
446 u8 pin;
447
448 if (!acpi_ioapic)
449 return;
450 if (!dev || !dev_is_pci(dev))
451 return;
452
453 pdev = to_pci_dev(dev);
454 number = pdev->bus->number;
455 devfn = pdev->devfn;
456 pin = pdev->pin;
457 /* print the entry should happen on mptable identically */
458 mp_irq.type = MP_INTSRC;
459 mp_irq.irqtype = mp_INT;
460 mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
461 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
462 mp_irq.srcbus = number;
463 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
464 ioapic = mp_find_ioapic(gsi);
465 mp_irq.dstapic = mpc_ioapic_id(ioapic);
466 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
467
468 mp_save_irq(m: &mp_irq);
469#endif
470}
471
472static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
473 u8 trigger, u32 gsi)
474{
475 struct mpc_intsrc mp_irq;
476 int ioapic, pin;
477
478 /* Convert 'gsi' to 'ioapic.pin'(INTIN#) */
479 ioapic = mp_find_ioapic(gsi);
480 if (ioapic < 0) {
481 pr_warn("Failed to find ioapic for gsi : %u\n", gsi);
482 return ioapic;
483 }
484
485 pin = mp_find_ioapic_pin(ioapic, gsi);
486
487 mp_irq.type = MP_INTSRC;
488 mp_irq.irqtype = mp_INT;
489 mp_irq.irqflag = (trigger << 2) | polarity;
490 mp_irq.srcbus = MP_ISA_BUS;
491 mp_irq.srcbusirq = bus_irq;
492 mp_irq.dstapic = mpc_ioapic_id(ioapic);
493 mp_irq.dstirq = pin;
494
495 mp_save_irq(m: &mp_irq);
496
497 return 0;
498}
499
500static int __init
501acpi_parse_ioapic(union acpi_subtable_headers * header, const unsigned long end)
502{
503 struct acpi_madt_io_apic *ioapic = NULL;
504 struct ioapic_domain_cfg cfg = {
505 .type = IOAPIC_DOMAIN_DYNAMIC,
506 .ops = &mp_ioapic_irqdomain_ops,
507 };
508
509 ioapic = (struct acpi_madt_io_apic *)header;
510
511 if (BAD_MADT_ENTRY(ioapic, end))
512 return -EINVAL;
513
514 acpi_table_print_madt_entry(madt: &header->common);
515
516 /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */
517 if (ioapic->global_irq_base < nr_legacy_irqs())
518 cfg.type = IOAPIC_DOMAIN_LEGACY;
519
520 mp_register_ioapic(id: ioapic->id, address: ioapic->address, gsi_base: ioapic->global_irq_base,
521 cfg: &cfg);
522
523 return 0;
524}
525
526/*
527 * Parse Interrupt Source Override for the ACPI SCI
528 */
529static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi)
530{
531 if (trigger == 0) /* compatible SCI trigger is level */
532 trigger = 3;
533
534 if (polarity == 0) /* compatible SCI polarity is low */
535 polarity = 3;
536
537 /* Command-line over-ride via acpi_sci= */
538 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
539 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
540
541 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
542 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
543
544 if (bus_irq < NR_IRQS_LEGACY)
545 mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
546 else
547 mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi);
548
549 acpi_penalize_sci_irq(irq: bus_irq, trigger, polarity);
550
551 /*
552 * stash over-ride to indicate we've been here
553 * and for later update of acpi_gbl_FADT
554 */
555 acpi_sci_override_gsi = gsi;
556 return;
557}
558
559static int __init
560acpi_parse_int_src_ovr(union acpi_subtable_headers * header,
561 const unsigned long end)
562{
563 struct acpi_madt_interrupt_override *intsrc = NULL;
564
565 intsrc = (struct acpi_madt_interrupt_override *)header;
566
567 if (BAD_MADT_ENTRY(intsrc, end))
568 return -EINVAL;
569
570 acpi_table_print_madt_entry(madt: &header->common);
571
572 if (intsrc->source_irq < NR_IRQS_LEGACY)
573 acpi_int_src_ovr[intsrc->source_irq] = true;
574
575 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
576 acpi_sci_ioapic_setup(bus_irq: intsrc->source_irq,
577 polarity: intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
578 trigger: (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
579 gsi: intsrc->global_irq);
580 return 0;
581 }
582
583 if (intsrc->source_irq == 0) {
584 if (acpi_skip_timer_override) {
585 pr_warn("BIOS IRQ0 override ignored.\n");
586 return 0;
587 }
588
589 if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity
590 && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) {
591 intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK;
592 pr_warn("BIOS IRQ0 pin2 override: forcing polarity to high active.\n");
593 }
594 }
595
596 mp_override_legacy_irq(bus_irq: intsrc->source_irq,
597 polarity: intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
598 trigger: (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
599 gsi: intsrc->global_irq);
600
601 return 0;
602}
603
604static int __init
605acpi_parse_nmi_src(union acpi_subtable_headers * header, const unsigned long end)
606{
607 struct acpi_madt_nmi_source *nmi_src = NULL;
608
609 nmi_src = (struct acpi_madt_nmi_source *)header;
610
611 if (BAD_MADT_ENTRY(nmi_src, end))
612 return -EINVAL;
613
614 acpi_table_print_madt_entry(madt: &header->common);
615
616 /* TBD: Support nimsrc entries? */
617
618 return 0;
619}
620
621#endif /* CONFIG_X86_IO_APIC */
622
623/*
624 * acpi_pic_sci_set_trigger()
625 *
626 * use ELCR to set PIC-mode trigger type for SCI
627 *
628 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
629 * it may require Edge Trigger -- use "acpi_sci=edge"
630 *
631 * Port 0x4d0-4d1 are ELCR1 and ELCR2, the Edge/Level Control Registers
632 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
633 * ELCR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
634 * ELCR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
635 */
636
637void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
638{
639 unsigned int mask = 1 << irq;
640 unsigned int old, new;
641
642 /* Real old ELCR mask */
643 old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8);
644
645 /*
646 * If we use ACPI to set PCI IRQs, then we should clear ELCR
647 * since we will set it correctly as we enable the PCI irq
648 * routing.
649 */
650 new = acpi_noirq ? old : 0;
651
652 /*
653 * Update SCI information in the ELCR, it isn't in the PCI
654 * routing tables..
655 */
656 switch (trigger) {
657 case 1: /* Edge - clear */
658 new &= ~mask;
659 break;
660 case 3: /* Level - set */
661 new |= mask;
662 break;
663 }
664
665 if (old == new)
666 return;
667
668 pr_warn("setting ELCR to %04x (from %04x)\n", new, old);
669 outb(value: new, PIC_ELCR1);
670 outb(value: new >> 8, PIC_ELCR2);
671}
672
673int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
674{
675 int rc, irq, trigger, polarity;
676
677 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
678 *irqp = gsi;
679 return 0;
680 }
681
682 rc = acpi_get_override_irq(gsi, trigger: &trigger, polarity: &polarity);
683 if (rc)
684 return rc;
685
686 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
687 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
688 irq = acpi_register_gsi(NULL, gsi, triggering: trigger, polarity);
689 if (irq < 0)
690 return irq;
691
692 *irqp = irq;
693 return 0;
694}
695EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
696
697int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
698{
699 if (isa_irq < nr_legacy_irqs() &&
700 isa_irq_to_gsi[isa_irq] != INVALID_ACPI_IRQ) {
701 *gsi = isa_irq_to_gsi[isa_irq];
702 return 0;
703 }
704
705 return -1;
706}
707
708static int acpi_register_gsi_pic(struct device *dev, u32 gsi,
709 int trigger, int polarity)
710{
711#ifdef CONFIG_PCI
712 /*
713 * Make sure all (legacy) PCI IRQs are set as level-triggered.
714 */
715 if (trigger == ACPI_LEVEL_SENSITIVE)
716 elcr_set_level_irq(irq: gsi);
717#endif
718
719 return gsi;
720}
721
722#ifdef CONFIG_X86_LOCAL_APIC
723static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,
724 int trigger, int polarity)
725{
726 int irq = gsi;
727#ifdef CONFIG_X86_IO_APIC
728 int node;
729 struct irq_alloc_info info;
730
731 node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
732 trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
733 polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
734 ioapic_set_alloc_attr(info: &info, node, trigger, polarity);
735
736 mutex_lock(&acpi_ioapic_lock);
737 irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, info: &info);
738 /* Don't set up the ACPI SCI because it's already set up */
739 if (irq >= 0 && enable_update_mptable && gsi != acpi_gbl_FADT.sci_interrupt)
740 mp_config_acpi_gsi(dev, gsi, trigger, polarity);
741 mutex_unlock(lock: &acpi_ioapic_lock);
742#endif
743
744 return irq;
745}
746
747static void acpi_unregister_gsi_ioapic(u32 gsi)
748{
749#ifdef CONFIG_X86_IO_APIC
750 int irq;
751
752 mutex_lock(&acpi_ioapic_lock);
753 irq = mp_map_gsi_to_irq(gsi, flags: 0, NULL);
754 if (irq > 0)
755 mp_unmap_irq(irq);
756 mutex_unlock(lock: &acpi_ioapic_lock);
757#endif
758}
759#endif
760
761int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
762 int trigger, int polarity) = acpi_register_gsi_pic;
763void (*__acpi_unregister_gsi)(u32 gsi) = NULL;
764
765#ifdef CONFIG_ACPI_SLEEP
766int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel;
767#else
768int (*acpi_suspend_lowlevel)(void);
769#endif
770
771/*
772 * success: return IRQ number (>=0)
773 * failure: return < 0
774 */
775int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
776{
777 return __acpi_register_gsi(dev, gsi, trigger, polarity);
778}
779EXPORT_SYMBOL_GPL(acpi_register_gsi);
780
781void acpi_unregister_gsi(u32 gsi)
782{
783 if (__acpi_unregister_gsi)
784 __acpi_unregister_gsi(gsi);
785}
786EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
787
788#ifdef CONFIG_X86_LOCAL_APIC
789static void __init acpi_set_irq_model_ioapic(void)
790{
791 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
792 __acpi_register_gsi = acpi_register_gsi_ioapic;
793 __acpi_unregister_gsi = acpi_unregister_gsi_ioapic;
794 acpi_ioapic = 1;
795}
796#endif
797
798/*
799 * ACPI based hotplug support for CPU
800 */
801#ifdef CONFIG_ACPI_HOTPLUG_CPU
802#include <acpi/processor.h>
803
804static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
805{
806#ifdef CONFIG_ACPI_NUMA
807 int nid;
808
809 nid = acpi_get_node(handle);
810 if (nid != NUMA_NO_NODE) {
811 set_apicid_to_node(apicid: physid, node: nid);
812 numa_set_node(cpu, node: nid);
813 }
814#endif
815 return 0;
816}
817
818int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, int *pcpu)
819{
820 int cpu = topology_hotplug_apic(apic_id: physid, acpi_id);
821
822 if (cpu < 0) {
823 pr_info("Unable to map lapic to logical cpu number\n");
824 return cpu;
825 }
826
827 acpi_processor_set_pdc(handle);
828 acpi_map_cpu2node(handle, cpu, physid);
829
830 *pcpu = cpu;
831 return 0;
832}
833EXPORT_SYMBOL(acpi_map_cpu);
834
835int acpi_unmap_cpu(int cpu)
836{
837#ifdef CONFIG_ACPI_NUMA
838 set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE);
839#endif
840 topology_hotunplug_apic(cpu);
841 return 0;
842}
843EXPORT_SYMBOL(acpi_unmap_cpu);
844#endif /* CONFIG_ACPI_HOTPLUG_CPU */
845
846int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
847{
848 int ret = -ENOSYS;
849#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
850 int ioapic_id;
851 u64 addr;
852 struct ioapic_domain_cfg cfg = {
853 .type = IOAPIC_DOMAIN_DYNAMIC,
854 .ops = &mp_ioapic_irqdomain_ops,
855 };
856
857 ioapic_id = acpi_get_ioapic_id(handle, gsi_base, phys_addr: &addr);
858 if (ioapic_id < 0) {
859 unsigned long long uid;
860 acpi_status status;
861
862 status = acpi_evaluate_integer(handle, METHOD_NAME__UID,
863 NULL, data: &uid);
864 if (ACPI_FAILURE(status)) {
865 acpi_handle_warn(handle, "failed to get IOAPIC ID.\n");
866 return -EINVAL;
867 }
868 ioapic_id = (int)uid;
869 }
870
871 mutex_lock(&acpi_ioapic_lock);
872 ret = mp_register_ioapic(id: ioapic_id, address: phys_addr, gsi_base, cfg: &cfg);
873 mutex_unlock(lock: &acpi_ioapic_lock);
874#endif
875
876 return ret;
877}
878EXPORT_SYMBOL(acpi_register_ioapic);
879
880int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
881{
882 int ret = -ENOSYS;
883
884#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
885 mutex_lock(&acpi_ioapic_lock);
886 ret = mp_unregister_ioapic(gsi_base);
887 mutex_unlock(lock: &acpi_ioapic_lock);
888#endif
889
890 return ret;
891}
892EXPORT_SYMBOL(acpi_unregister_ioapic);
893
894/**
895 * acpi_ioapic_registered - Check whether IOAPIC associated with @gsi_base
896 * has been registered
897 * @handle: ACPI handle of the IOAPIC device
898 * @gsi_base: GSI base associated with the IOAPIC
899 *
900 * Assume caller holds some type of lock to serialize acpi_ioapic_registered()
901 * with acpi_register_ioapic()/acpi_unregister_ioapic().
902 */
903int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base)
904{
905 int ret = 0;
906
907#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
908 mutex_lock(&acpi_ioapic_lock);
909 ret = mp_ioapic_registered(gsi_base);
910 mutex_unlock(lock: &acpi_ioapic_lock);
911#endif
912
913 return ret;
914}
915
916static int __init acpi_parse_sbf(struct acpi_table_header *table)
917{
918 struct acpi_table_boot *sb = (struct acpi_table_boot *)table;
919
920 sbf_port = sb->cmos_index; /* Save CMOS port */
921
922 return 0;
923}
924
925#ifdef CONFIG_HPET_TIMER
926#include <asm/hpet.h>
927
928static struct resource *hpet_res __initdata;
929
930static int __init acpi_parse_hpet(struct acpi_table_header *table)
931{
932 struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table;
933
934 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
935 pr_warn("HPET timers must be located in memory.\n");
936 return -1;
937 }
938
939 hpet_address = hpet_tbl->address.address;
940 hpet_blockid = hpet_tbl->sequence;
941
942 /*
943 * Some broken BIOSes advertise HPET at 0x0. We really do not
944 * want to allocate a resource there.
945 */
946 if (!hpet_address) {
947 pr_warn("HPET id: %#x base: %#lx is invalid\n", hpet_tbl->id, hpet_address);
948 return 0;
949 }
950#ifdef CONFIG_X86_64
951 /*
952 * Some even more broken BIOSes advertise HPET at
953 * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
954 * some noise:
955 */
956 if (hpet_address == 0xfed0000000000000UL) {
957 if (!hpet_force_user) {
958 pr_warn("HPET id: %#x base: 0xfed0000000000000 is bogus, try hpet=force on the kernel command line to fix it up to 0xfed00000.\n",
959 hpet_tbl->id);
960 hpet_address = 0;
961 return 0;
962 }
963 pr_warn("HPET id: %#x base: 0xfed0000000000000 fixed up to 0xfed00000.\n",
964 hpet_tbl->id);
965 hpet_address >>= 32;
966 }
967#endif
968 pr_info("HPET id: %#x base: %#lx\n", hpet_tbl->id, hpet_address);
969
970 /*
971 * Allocate and initialize the HPET firmware resource for adding into
972 * the resource tree during the lateinit timeframe.
973 */
974#define HPET_RESOURCE_NAME_SIZE 9
975 hpet_res = memblock_alloc(size: sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE,
976 SMP_CACHE_BYTES);
977 if (!hpet_res)
978 panic(fmt: "%s: Failed to allocate %zu bytes\n", __func__,
979 sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
980
981 hpet_res->name = (void *)&hpet_res[1];
982 hpet_res->flags = IORESOURCE_MEM;
983 snprintf(buf: (char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, fmt: "HPET %u",
984 hpet_tbl->sequence);
985
986 hpet_res->start = hpet_address;
987 hpet_res->end = hpet_address + (1 * 1024) - 1;
988
989 return 0;
990}
991
992/*
993 * hpet_insert_resource inserts the HPET resources used into the resource
994 * tree.
995 */
996static __init int hpet_insert_resource(void)
997{
998 if (!hpet_res)
999 return 1;
1000
1001 return insert_resource(parent: &iomem_resource, new: hpet_res);
1002}
1003
1004late_initcall(hpet_insert_resource);
1005
1006#else
1007#define acpi_parse_hpet NULL
1008#endif
1009
1010static int __init acpi_parse_fadt(struct acpi_table_header *table)
1011{
1012 if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_LEGACY_DEVICES)) {
1013 pr_debug("no legacy devices present\n");
1014 x86_platform.legacy.devices.pnpbios = 0;
1015 }
1016
1017 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
1018 !(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042) &&
1019 x86_platform.legacy.i8042 != X86_LEGACY_I8042_PLATFORM_ABSENT) {
1020 pr_debug("i8042 controller is absent\n");
1021 x86_platform.legacy.i8042 = X86_LEGACY_I8042_FIRMWARE_ABSENT;
1022 }
1023
1024 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
1025 pr_debug("not registering RTC platform device\n");
1026 x86_platform.legacy.rtc = 0;
1027 }
1028
1029 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_VGA) {
1030 pr_debug("probing for VGA not safe\n");
1031 x86_platform.legacy.no_vga = 1;
1032 }
1033
1034#ifdef CONFIG_X86_PM_TIMER
1035 /* detect the location of the ACPI PM Timer */
1036 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
1037 /* FADT rev. 2 */
1038 if (acpi_gbl_FADT.xpm_timer_block.space_id !=
1039 ACPI_ADR_SPACE_SYSTEM_IO)
1040 return 0;
1041
1042 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
1043 /*
1044 * "X" fields are optional extensions to the original V1.0
1045 * fields, so we must selectively expand V1.0 fields if the
1046 * corresponding X field is zero.
1047 */
1048 if (!pmtmr_ioport)
1049 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1050 } else {
1051 /* FADT rev. 1 */
1052 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1053 }
1054 if (pmtmr_ioport)
1055 pr_info("PM-Timer IO Port: %#x\n", pmtmr_ioport);
1056#endif
1057 return 0;
1058}
1059
1060#ifdef CONFIG_X86_LOCAL_APIC
1061/*
1062 * Parse LAPIC entries in MADT
1063 * returns 0 on success, < 0 on error
1064 */
1065
1066static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
1067{
1068 int count;
1069
1070 if (!boot_cpu_has(X86_FEATURE_APIC))
1071 return -ENODEV;
1072
1073 /*
1074 * Note that the LAPIC address is obtained from the MADT (32-bit value)
1075 * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value).
1076 */
1077
1078 count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
1079 handler: acpi_parse_lapic_addr_ovr, max_entries: 0);
1080 if (count < 0) {
1081 pr_err("Error parsing LAPIC address override entry\n");
1082 return count;
1083 }
1084
1085 register_lapic_address(address: acpi_lapic_addr);
1086
1087 return count;
1088}
1089
1090static int __init acpi_parse_madt_lapic_entries(void)
1091{
1092 int count, x2count = 0;
1093
1094 if (!boot_cpu_has(X86_FEATURE_APIC))
1095 return -ENODEV;
1096
1097 count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_SAPIC,
1098 handler: acpi_parse_sapic, MAX_LOCAL_APIC);
1099
1100 if (!count) {
1101 count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC,
1102 handler: acpi_parse_lapic, MAX_LOCAL_APIC);
1103 x2count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_X2APIC,
1104 handler: acpi_parse_x2apic, MAX_LOCAL_APIC);
1105 }
1106 if (!count && !x2count) {
1107 pr_err("No LAPIC entries present\n");
1108 /* TBD: Cleanup to allow fallback to MPS */
1109 return -ENODEV;
1110 } else if (count < 0 || x2count < 0) {
1111 pr_err("Error parsing LAPIC entry\n");
1112 /* TBD: Cleanup to allow fallback to MPS */
1113 return count;
1114 }
1115
1116 x2count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_X2APIC_NMI,
1117 handler: acpi_parse_x2apic_nmi, max_entries: 0);
1118 count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC_NMI,
1119 handler: acpi_parse_lapic_nmi, max_entries: 0);
1120 if (count < 0 || x2count < 0) {
1121 pr_err("Error parsing LAPIC NMI entry\n");
1122 /* TBD: Cleanup to allow fallback to MPS */
1123 return count;
1124 }
1125 return 0;
1126}
1127
1128#ifdef CONFIG_X86_64
1129static int __init acpi_parse_mp_wake(union acpi_subtable_headers *header,
1130 const unsigned long end)
1131{
1132 struct acpi_madt_multiproc_wakeup *mp_wake;
1133
1134 if (!IS_ENABLED(CONFIG_SMP))
1135 return -ENODEV;
1136
1137 mp_wake = (struct acpi_madt_multiproc_wakeup *)header;
1138 if (BAD_MADT_ENTRY(mp_wake, end))
1139 return -EINVAL;
1140
1141 acpi_table_print_madt_entry(madt: &header->common);
1142
1143 acpi_mp_wake_mailbox_paddr = mp_wake->base_address;
1144
1145 apic_update_callback(wakeup_secondary_cpu_64, acpi_wakeup_cpu);
1146
1147 return 0;
1148}
1149#endif /* CONFIG_X86_64 */
1150#endif /* CONFIG_X86_LOCAL_APIC */
1151
1152#ifdef CONFIG_X86_IO_APIC
1153static void __init mp_config_acpi_legacy_irqs(void)
1154{
1155 int i;
1156 struct mpc_intsrc mp_irq;
1157
1158#ifdef CONFIG_EISA
1159 /*
1160 * Fabricate the legacy ISA bus (bus #31).
1161 */
1162 mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
1163#endif
1164 set_bit(MP_ISA_BUS, addr: mp_bus_not_pci);
1165 pr_debug("Bus #%d is ISA (nIRQs: %d)\n", MP_ISA_BUS, nr_legacy_irqs());
1166
1167 /*
1168 * Use the default configuration for the IRQs 0-15. Unless
1169 * overridden by (MADT) interrupt source override entries.
1170 */
1171 for (i = 0; i < nr_legacy_irqs(); i++) {
1172 int ioapic, pin;
1173 unsigned int dstapic;
1174 int idx;
1175 u32 gsi;
1176
1177 /* Locate the gsi that irq i maps to. */
1178 if (acpi_isa_irq_to_gsi(isa_irq: i, gsi: &gsi))
1179 continue;
1180
1181 /*
1182 * Locate the IOAPIC that manages the ISA IRQ.
1183 */
1184 ioapic = mp_find_ioapic(gsi);
1185 if (ioapic < 0)
1186 continue;
1187 pin = mp_find_ioapic_pin(ioapic, gsi);
1188 dstapic = mpc_ioapic_id(ioapic);
1189
1190 for (idx = 0; idx < mp_irq_entries; idx++) {
1191 struct mpc_intsrc *irq = mp_irqs + idx;
1192
1193 /* Do we already have a mapping for this ISA IRQ? */
1194 if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i)
1195 break;
1196
1197 /* Do we already have a mapping for this IOAPIC pin */
1198 if (irq->dstapic == dstapic && irq->dstirq == pin)
1199 break;
1200 }
1201
1202 if (idx != mp_irq_entries) {
1203 pr_debug("ACPI: IRQ%d used by override.\n", i);
1204 continue; /* IRQ already used */
1205 }
1206
1207 mp_irq.type = MP_INTSRC;
1208 mp_irq.irqflag = 0; /* Conforming */
1209 mp_irq.srcbus = MP_ISA_BUS;
1210 mp_irq.dstapic = dstapic;
1211 mp_irq.irqtype = mp_INT;
1212 mp_irq.srcbusirq = i; /* Identity mapped */
1213 mp_irq.dstirq = pin;
1214
1215 mp_save_irq(m: &mp_irq);
1216 }
1217}
1218
1219/*
1220 * Parse IOAPIC related entries in MADT
1221 * returns 0 on success, < 0 on error
1222 */
1223static int __init acpi_parse_madt_ioapic_entries(void)
1224{
1225 int count;
1226
1227 /*
1228 * ACPI interpreter is required to complete interrupt setup,
1229 * so if it is off, don't enumerate the io-apics with ACPI.
1230 * If MPS is present, it will handle them,
1231 * otherwise the system will stay in PIC mode
1232 */
1233 if (acpi_disabled || acpi_noirq)
1234 return -ENODEV;
1235
1236 if (!boot_cpu_has(X86_FEATURE_APIC))
1237 return -ENODEV;
1238
1239 /*
1240 * if "noapic" boot option, don't look for IO-APICs
1241 */
1242 if (ioapic_is_disabled) {
1243 pr_info("Skipping IOAPIC probe due to 'noapic' option.\n");
1244 return -ENODEV;
1245 }
1246
1247 count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_IO_APIC, handler: acpi_parse_ioapic,
1248 MAX_IO_APICS);
1249 if (!count) {
1250 pr_err("No IOAPIC entries present\n");
1251 return -ENODEV;
1252 } else if (count < 0) {
1253 pr_err("Error parsing IOAPIC entry\n");
1254 return count;
1255 }
1256
1257 count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_INTERRUPT_OVERRIDE,
1258 handler: acpi_parse_int_src_ovr, max_entries: nr_irqs);
1259 if (count < 0) {
1260 pr_err("Error parsing interrupt source overrides entry\n");
1261 /* TBD: Cleanup to allow fallback to MPS */
1262 return count;
1263 }
1264
1265 /*
1266 * If BIOS did not supply an INT_SRC_OVR for the SCI
1267 * pretend we got one so we can set the SCI flags.
1268 * But ignore setting up SCI on hardware reduced platforms.
1269 */
1270 if (acpi_sci_override_gsi == INVALID_ACPI_IRQ && !acpi_gbl_reduced_hardware)
1271 acpi_sci_ioapic_setup(bus_irq: acpi_gbl_FADT.sci_interrupt, polarity: 0, trigger: 0,
1272 gsi: acpi_gbl_FADT.sci_interrupt);
1273
1274 /* Fill in identity legacy mappings where no override */
1275 mp_config_acpi_legacy_irqs();
1276
1277 count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_NMI_SOURCE,
1278 handler: acpi_parse_nmi_src, max_entries: nr_irqs);
1279 if (count < 0) {
1280 pr_err("Error parsing NMI SRC entry\n");
1281 /* TBD: Cleanup to allow fallback to MPS */
1282 return count;
1283 }
1284
1285 return 0;
1286}
1287#else
1288static inline int acpi_parse_madt_ioapic_entries(void)
1289{
1290 return -1;
1291}
1292#endif /* !CONFIG_X86_IO_APIC */
1293
1294static void __init early_acpi_process_madt(void)
1295{
1296#ifdef CONFIG_X86_LOCAL_APIC
1297 int error;
1298
1299 if (!acpi_table_parse(ACPI_SIG_MADT, handler: acpi_parse_madt)) {
1300
1301 /*
1302 * Parse MADT LAPIC entries
1303 */
1304 error = early_acpi_parse_madt_lapic_addr_ovr();
1305 if (!error) {
1306 acpi_lapic = 1;
1307 smp_found_config = 1;
1308 }
1309 if (error == -EINVAL) {
1310 /*
1311 * Dell Precision Workstation 410, 610 come here.
1312 */
1313 pr_err("Invalid BIOS MADT, disabling ACPI\n");
1314 disable_acpi();
1315 }
1316 }
1317#endif
1318}
1319
1320static void __init acpi_process_madt(void)
1321{
1322#ifdef CONFIG_X86_LOCAL_APIC
1323 int error;
1324
1325 if (!acpi_table_parse(ACPI_SIG_MADT, handler: acpi_parse_madt)) {
1326
1327 /*
1328 * Parse MADT LAPIC entries
1329 */
1330 error = acpi_parse_madt_lapic_entries();
1331 if (!error) {
1332 acpi_lapic = 1;
1333
1334 /*
1335 * Parse MADT IO-APIC entries
1336 */
1337 mutex_lock(&acpi_ioapic_lock);
1338 error = acpi_parse_madt_ioapic_entries();
1339 mutex_unlock(lock: &acpi_ioapic_lock);
1340 if (!error) {
1341 acpi_set_irq_model_ioapic();
1342
1343 smp_found_config = 1;
1344 }
1345
1346#ifdef CONFIG_X86_64
1347 /*
1348 * Parse MADT MP Wake entry.
1349 */
1350 acpi_table_parse_madt(id: ACPI_MADT_TYPE_MULTIPROC_WAKEUP,
1351 handler: acpi_parse_mp_wake, max_entries: 1);
1352#endif
1353 }
1354 if (error == -EINVAL) {
1355 /*
1356 * Dell Precision Workstation 410, 610 come here.
1357 */
1358 pr_err("Invalid BIOS MADT, disabling ACPI\n");
1359 disable_acpi();
1360 }
1361 } else {
1362 /*
1363 * ACPI found no MADT, and so ACPI wants UP PIC mode.
1364 * In the event an MPS table was found, forget it.
1365 * Boot with "acpi=off" to use MPS on such a system.
1366 */
1367 if (smp_found_config) {
1368 pr_warn("No APIC-table, disabling MPS\n");
1369 smp_found_config = 0;
1370 }
1371 }
1372
1373 /*
1374 * ACPI supports both logical (e.g. Hyper-Threading) and physical
1375 * processors, where MPS only supports physical.
1376 */
1377 if (acpi_lapic && acpi_ioapic)
1378 pr_info("Using ACPI (MADT) for SMP configuration information\n");
1379 else if (acpi_lapic)
1380 pr_info("Using ACPI for processor (LAPIC) configuration information\n");
1381#endif
1382 return;
1383}
1384
1385static int __init disable_acpi_irq(const struct dmi_system_id *d)
1386{
1387 if (!acpi_force) {
1388 pr_notice("%s detected: force use of acpi=noirq\n", d->ident);
1389 acpi_noirq_set();
1390 }
1391 return 0;
1392}
1393
1394static int __init disable_acpi_pci(const struct dmi_system_id *d)
1395{
1396 if (!acpi_force) {
1397 pr_notice("%s detected: force use of pci=noacpi\n", d->ident);
1398 acpi_disable_pci();
1399 }
1400 return 0;
1401}
1402
1403static int __init disable_acpi_xsdt(const struct dmi_system_id *d)
1404{
1405 if (!acpi_force) {
1406 pr_notice("%s detected: force use of acpi=rsdt\n", d->ident);
1407 acpi_gbl_do_not_use_xsdt = TRUE;
1408 } else {
1409 pr_notice("Warning: DMI blacklist says broken, but acpi XSDT forced\n");
1410 }
1411 return 0;
1412}
1413
1414static int __init dmi_disable_acpi(const struct dmi_system_id *d)
1415{
1416 if (!acpi_force) {
1417 pr_notice("%s detected: acpi off\n", d->ident);
1418 disable_acpi();
1419 } else {
1420 pr_notice("Warning: DMI blacklist says broken, but acpi forced\n");
1421 }
1422 return 0;
1423}
1424
1425/*
1426 * Force ignoring BIOS IRQ0 override
1427 */
1428static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
1429{
1430 if (!acpi_skip_timer_override) {
1431 pr_notice("%s detected: Ignoring BIOS IRQ0 override\n",
1432 d->ident);
1433 acpi_skip_timer_override = 1;
1434 }
1435 return 0;
1436}
1437
1438/*
1439 * ACPI offers an alternative platform interface model that removes
1440 * ACPI hardware requirements for platforms that do not implement
1441 * the PC Architecture.
1442 *
1443 * We initialize the Hardware-reduced ACPI model here:
1444 */
1445void __init acpi_generic_reduced_hw_init(void)
1446{
1447 /*
1448 * Override x86_init functions and bypass legacy PIC in
1449 * hardware reduced ACPI mode.
1450 */
1451 x86_init.timers.timer_init = x86_init_noop;
1452 x86_init.irqs.pre_vector_init = x86_init_noop;
1453 legacy_pic = &null_legacy_pic;
1454}
1455
1456static void __init acpi_reduced_hw_init(void)
1457{
1458 if (acpi_gbl_reduced_hardware)
1459 x86_init.acpi.reduced_hw_early_init();
1460}
1461
1462/*
1463 * If your system is blacklisted here, but you find that acpi=force
1464 * works for you, please contact linux-acpi@vger.kernel.org
1465 */
1466static const struct dmi_system_id acpi_dmi_table[] __initconst = {
1467 /*
1468 * Boxes that need ACPI disabled
1469 */
1470 {
1471 .callback = dmi_disable_acpi,
1472 .ident = "IBM Thinkpad",
1473 .matches = {
1474 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1475 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
1476 },
1477 },
1478
1479 /*
1480 * Boxes that need ACPI PCI IRQ routing disabled
1481 */
1482 {
1483 .callback = disable_acpi_irq,
1484 .ident = "ASUS A7V",
1485 .matches = {
1486 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
1487 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
1488 /* newer BIOS, Revision 1011, does work */
1489 DMI_MATCH(DMI_BIOS_VERSION,
1490 "ASUS A7V ACPI BIOS Revision 1007"),
1491 },
1492 },
1493 {
1494 /*
1495 * Latest BIOS for IBM 600E (1.16) has bad pcinum
1496 * for LPC bridge, which is needed for the PCI
1497 * interrupt links to work. DSDT fix is in bug 5966.
1498 * 2645, 2646 model numbers are shared with 600/600E/600X
1499 */
1500 .callback = disable_acpi_irq,
1501 .ident = "IBM Thinkpad 600 Series 2645",
1502 .matches = {
1503 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1504 DMI_MATCH(DMI_BOARD_NAME, "2645"),
1505 },
1506 },
1507 {
1508 .callback = disable_acpi_irq,
1509 .ident = "IBM Thinkpad 600 Series 2646",
1510 .matches = {
1511 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1512 DMI_MATCH(DMI_BOARD_NAME, "2646"),
1513 },
1514 },
1515 /*
1516 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
1517 */
1518 { /* _BBN 0 bug */
1519 .callback = disable_acpi_pci,
1520 .ident = "ASUS PR-DLS",
1521 .matches = {
1522 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1523 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
1524 DMI_MATCH(DMI_BIOS_VERSION,
1525 "ASUS PR-DLS ACPI BIOS Revision 1010"),
1526 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
1527 },
1528 },
1529 {
1530 .callback = disable_acpi_pci,
1531 .ident = "Acer TravelMate 36x Laptop",
1532 .matches = {
1533 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1534 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1535 },
1536 },
1537 /*
1538 * Boxes that need ACPI XSDT use disabled due to corrupted tables
1539 */
1540 {
1541 .callback = disable_acpi_xsdt,
1542 .ident = "Advantech DAC-BJ01",
1543 .matches = {
1544 DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
1545 DMI_MATCH(DMI_PRODUCT_NAME, "Bearlake CRB Board"),
1546 DMI_MATCH(DMI_BIOS_VERSION, "V1.12"),
1547 DMI_MATCH(DMI_BIOS_DATE, "02/01/2011"),
1548 },
1549 },
1550 {}
1551};
1552
1553/* second table for DMI checks that should run after early-quirks */
1554static const struct dmi_system_id acpi_dmi_table_late[] __initconst = {
1555 /*
1556 * HP laptops which use a DSDT reporting as HP/SB400/10000,
1557 * which includes some code which overrides all temperature
1558 * trip points to 16C if the INTIN2 input of the I/O APIC
1559 * is enabled. This input is incorrectly designated the
1560 * ISA IRQ 0 via an interrupt source override even though
1561 * it is wired to the output of the master 8259A and INTIN0
1562 * is not connected at all. Force ignoring BIOS IRQ0
1563 * override in that cases.
1564 */
1565 {
1566 .callback = dmi_ignore_irq0_timer_override,
1567 .ident = "HP nx6115 laptop",
1568 .matches = {
1569 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1570 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"),
1571 },
1572 },
1573 {
1574 .callback = dmi_ignore_irq0_timer_override,
1575 .ident = "HP NX6125 laptop",
1576 .matches = {
1577 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1578 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"),
1579 },
1580 },
1581 {
1582 .callback = dmi_ignore_irq0_timer_override,
1583 .ident = "HP NX6325 laptop",
1584 .matches = {
1585 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1586 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"),
1587 },
1588 },
1589 {
1590 .callback = dmi_ignore_irq0_timer_override,
1591 .ident = "HP 6715b laptop",
1592 .matches = {
1593 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1594 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"),
1595 },
1596 },
1597 {
1598 .callback = dmi_ignore_irq0_timer_override,
1599 .ident = "FUJITSU SIEMENS",
1600 .matches = {
1601 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
1602 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"),
1603 },
1604 },
1605 {}
1606};
1607
1608/*
1609 * acpi_boot_table_init() and acpi_boot_init()
1610 * called from setup_arch(), always.
1611 * 1. checksums all tables
1612 * 2. enumerates lapics
1613 * 3. enumerates io-apics
1614 *
1615 * acpi_table_init() is separate to allow reading SRAT without
1616 * other side effects.
1617 *
1618 * side effects of acpi_boot_init:
1619 * acpi_lapic = 1 if LAPIC found
1620 * acpi_ioapic = 1 if IOAPIC found
1621 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
1622 * if acpi_blacklisted() acpi_disabled = 1;
1623 * acpi_irq_model=...
1624 * ...
1625 */
1626
1627void __init acpi_boot_table_init(void)
1628{
1629 dmi_check_system(list: acpi_dmi_table);
1630
1631 /*
1632 * If acpi_disabled, bail out
1633 */
1634 if (acpi_disabled)
1635 return;
1636
1637 /*
1638 * Initialize the ACPI boot-time table parser.
1639 */
1640 if (acpi_locate_initial_tables())
1641 disable_acpi();
1642 else
1643 acpi_reserve_initial_tables();
1644}
1645
1646int __init early_acpi_boot_init(void)
1647{
1648 if (acpi_disabled)
1649 return 1;
1650
1651 acpi_table_init_complete();
1652
1653 acpi_table_parse(ACPI_SIG_BOOT, handler: acpi_parse_sbf);
1654
1655 /*
1656 * blacklist may disable ACPI entirely
1657 */
1658 if (acpi_blacklisted()) {
1659 if (acpi_force) {
1660 pr_warn("acpi=force override\n");
1661 } else {
1662 pr_warn("Disabling ACPI support\n");
1663 disable_acpi();
1664 return 1;
1665 }
1666 }
1667
1668 /*
1669 * Process the Multiple APIC Description Table (MADT), if present
1670 */
1671 early_acpi_process_madt();
1672
1673 /*
1674 * Hardware-reduced ACPI mode initialization:
1675 */
1676 acpi_reduced_hw_init();
1677
1678 return 0;
1679}
1680
1681int __init acpi_boot_init(void)
1682{
1683 /* those are executed after early-quirks are executed */
1684 dmi_check_system(list: acpi_dmi_table_late);
1685
1686 /*
1687 * If acpi_disabled, bail out
1688 */
1689 if (acpi_disabled)
1690 return 1;
1691
1692 acpi_table_parse(ACPI_SIG_BOOT, handler: acpi_parse_sbf);
1693
1694 /*
1695 * set sci_int and PM timer address
1696 */
1697 acpi_table_parse(ACPI_SIG_FADT, handler: acpi_parse_fadt);
1698
1699 /*
1700 * Process the Multiple APIC Description Table (MADT), if present
1701 */
1702 acpi_process_madt();
1703
1704 acpi_table_parse(ACPI_SIG_HPET, handler: acpi_parse_hpet);
1705 if (IS_ENABLED(CONFIG_ACPI_BGRT) && !acpi_nobgrt)
1706 acpi_table_parse(ACPI_SIG_BGRT, handler: acpi_parse_bgrt);
1707
1708 if (!acpi_noirq)
1709 x86_init.pci.init = pci_acpi_init;
1710
1711 /* Do not enable ACPI SPCR console by default */
1712 acpi_parse_spcr(enable_earlycon: earlycon_acpi_spcr_enable, enable_console: false);
1713 return 0;
1714}
1715
1716static int __init parse_acpi(char *arg)
1717{
1718 if (!arg)
1719 return -EINVAL;
1720
1721 /* "acpi=off" disables both ACPI table parsing and interpreter */
1722 if (strcmp(arg, "off") == 0) {
1723 disable_acpi();
1724 }
1725 /* acpi=force to over-ride black-list */
1726 else if (strcmp(arg, "force") == 0) {
1727 acpi_force = 1;
1728 acpi_disabled = 0;
1729 }
1730 /* acpi=strict disables out-of-spec workarounds */
1731 else if (strcmp(arg, "strict") == 0) {
1732 acpi_strict = 1;
1733 }
1734 /* acpi=rsdt use RSDT instead of XSDT */
1735 else if (strcmp(arg, "rsdt") == 0) {
1736 acpi_gbl_do_not_use_xsdt = TRUE;
1737 }
1738 /* "acpi=noirq" disables ACPI interrupt routing */
1739 else if (strcmp(arg, "noirq") == 0) {
1740 acpi_noirq_set();
1741 }
1742 /* "acpi=copy_dsdt" copies DSDT */
1743 else if (strcmp(arg, "copy_dsdt") == 0) {
1744 acpi_gbl_copy_dsdt_locally = 1;
1745 }
1746 /* "acpi=nocmcff" disables FF mode for corrected errors */
1747 else if (strcmp(arg, "nocmcff") == 0) {
1748 acpi_disable_cmcff = 1;
1749 } else {
1750 /* Core will printk when we return error. */
1751 return -EINVAL;
1752 }
1753 return 0;
1754}
1755early_param("acpi", parse_acpi);
1756
1757static int __init parse_acpi_bgrt(char *arg)
1758{
1759 acpi_nobgrt = true;
1760 return 0;
1761}
1762early_param("bgrt_disable", parse_acpi_bgrt);
1763
1764/* FIXME: Using pci= for an ACPI parameter is a travesty. */
1765static int __init parse_pci(char *arg)
1766{
1767 if (arg && strcmp(arg, "noacpi") == 0)
1768 acpi_disable_pci();
1769 return 0;
1770}
1771early_param("pci", parse_pci);
1772
1773int __init acpi_mps_check(void)
1774{
1775#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
1776/* mptable code is not built-in*/
1777 if (acpi_disabled || acpi_noirq) {
1778 pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n");
1779 return 1;
1780 }
1781#endif
1782 return 0;
1783}
1784
1785#ifdef CONFIG_X86_IO_APIC
1786static int __init parse_acpi_skip_timer_override(char *arg)
1787{
1788 acpi_skip_timer_override = 1;
1789 return 0;
1790}
1791early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
1792
1793static int __init parse_acpi_use_timer_override(char *arg)
1794{
1795 acpi_use_timer_override = 1;
1796 return 0;
1797}
1798early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
1799#endif /* CONFIG_X86_IO_APIC */
1800
1801static int __init setup_acpi_sci(char *s)
1802{
1803 if (!s)
1804 return -EINVAL;
1805 if (!strcmp(s, "edge"))
1806 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
1807 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1808 else if (!strcmp(s, "level"))
1809 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
1810 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1811 else if (!strcmp(s, "high"))
1812 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
1813 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1814 else if (!strcmp(s, "low"))
1815 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
1816 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1817 else
1818 return -EINVAL;
1819 return 0;
1820}
1821early_param("acpi_sci", setup_acpi_sci);
1822
1823int __acpi_acquire_global_lock(unsigned int *lock)
1824{
1825 unsigned int old, new, val;
1826
1827 old = READ_ONCE(*lock);
1828 do {
1829 val = (old >> 1) & 0x1;
1830 new = (old & ~0x3) + 2 + val;
1831 } while (!try_cmpxchg(lock, &old, new));
1832
1833 if (val)
1834 return 0;
1835
1836 return -1;
1837}
1838
1839int __acpi_release_global_lock(unsigned int *lock)
1840{
1841 unsigned int old, new;
1842
1843 old = READ_ONCE(*lock);
1844 do {
1845 new = old & ~0x3;
1846 } while (!try_cmpxchg(lock, &old, new));
1847 return old & 0x1;
1848}
1849
1850void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size)
1851{
1852 e820__range_add(start: addr, size, type: E820_TYPE_NVS);
1853 e820__update_table_print();
1854}
1855
1856void x86_default_set_root_pointer(u64 addr)
1857{
1858 boot_params.acpi_rsdp_addr = addr;
1859}
1860
1861u64 x86_default_get_root_pointer(void)
1862{
1863 return boot_params.acpi_rsdp_addr;
1864}
1865

source code of linux/arch/x86/kernel/acpi/boot.c