1 | /* Subroutines used for macro/preprocessor support on the ia-32. |
2 | Copyright (C) 2008-2024 Free Software Foundation, Inc. |
3 | |
4 | This file is part of GCC. |
5 | |
6 | GCC is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by |
8 | the Free Software Foundation; either version 3, or (at your option) |
9 | any later version. |
10 | |
11 | GCC is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 | GNU General Public License for more details. |
15 | |
16 | You should have received a copy of the GNU General Public License |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ |
19 | |
20 | #define IN_TARGET_CODE 1 |
21 | |
22 | #include "config.h" |
23 | #include "system.h" |
24 | #include "coretypes.h" |
25 | #include "target.h" |
26 | #include "c-family/c-common.h" |
27 | #include "memmodel.h" |
28 | #include "tm_p.h" |
29 | #include "c-family/c-pragma.h" |
30 | |
31 | static bool ix86_pragma_target_parse (tree, tree); |
32 | static void ix86_target_macros_internal |
33 | (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit, |
34 | void (*def_or_undef) (cpp_reader *, const char *)); |
35 | |
36 | /* Internal function to either define or undef the appropriate system |
37 | macros. */ |
38 | static void |
39 | ix86_target_macros_internal (HOST_WIDE_INT isa_flag, |
40 | HOST_WIDE_INT isa_flag2, |
41 | enum processor_type arch, |
42 | enum processor_type tune, |
43 | enum fpmath_unit fpmath, |
44 | void (*def_or_undef) (cpp_reader *, |
45 | const char *)) |
46 | { |
47 | /* For some of the k6/pentium varients there weren't separate ISA bits to |
48 | identify which tune/arch flag was passed, so figure it out here. */ |
49 | size_t arch_len = strlen (ix86_arch_string); |
50 | size_t tune_len = strlen (ix86_tune_string); |
51 | int last_arch_char = ix86_arch_string[arch_len - 1]; |
52 | int last_tune_char = ix86_tune_string[tune_len - 1]; |
53 | |
54 | /* Built-ins based on -march=. */ |
55 | switch (arch) |
56 | { |
57 | case PROCESSOR_I386: |
58 | break; |
59 | case PROCESSOR_I486: |
60 | def_or_undef (parse_in, "__i486" ); |
61 | def_or_undef (parse_in, "__i486__" ); |
62 | break; |
63 | case PROCESSOR_LAKEMONT: |
64 | /* Intel MCU is based on Intel Pentium CPU. */ |
65 | case PROCESSOR_PENTIUM: |
66 | def_or_undef (parse_in, "__i586" ); |
67 | def_or_undef (parse_in, "__i586__" ); |
68 | def_or_undef (parse_in, "__pentium" ); |
69 | def_or_undef (parse_in, "__pentium__" ); |
70 | if (isa_flag & OPTION_MASK_ISA_MMX) |
71 | def_or_undef (parse_in, "__pentium_mmx__" ); |
72 | break; |
73 | case PROCESSOR_PENTIUMPRO: |
74 | def_or_undef (parse_in, "__i686" ); |
75 | def_or_undef (parse_in, "__i686__" ); |
76 | def_or_undef (parse_in, "__pentiumpro" ); |
77 | def_or_undef (parse_in, "__pentiumpro__" ); |
78 | break; |
79 | case PROCESSOR_GEODE: |
80 | def_or_undef (parse_in, "__geode" ); |
81 | def_or_undef (parse_in, "__geode__" ); |
82 | break; |
83 | case PROCESSOR_K6: |
84 | def_or_undef (parse_in, "__k6" ); |
85 | def_or_undef (parse_in, "__k6__" ); |
86 | if (last_arch_char == '2') |
87 | def_or_undef (parse_in, "__k6_2__" ); |
88 | else if (last_arch_char == '3') |
89 | def_or_undef (parse_in, "__k6_3__" ); |
90 | else if (isa_flag & OPTION_MASK_ISA_3DNOW) |
91 | def_or_undef (parse_in, "__k6_3__" ); |
92 | break; |
93 | case PROCESSOR_ATHLON: |
94 | def_or_undef (parse_in, "__athlon" ); |
95 | def_or_undef (parse_in, "__athlon__" ); |
96 | if (isa_flag & OPTION_MASK_ISA_SSE) |
97 | def_or_undef (parse_in, "__athlon_sse__" ); |
98 | break; |
99 | case PROCESSOR_K8: |
100 | def_or_undef (parse_in, "__k8" ); |
101 | def_or_undef (parse_in, "__k8__" ); |
102 | break; |
103 | case PROCESSOR_AMDFAM10: |
104 | def_or_undef (parse_in, "__amdfam10" ); |
105 | def_or_undef (parse_in, "__amdfam10__" ); |
106 | break; |
107 | case PROCESSOR_BDVER1: |
108 | def_or_undef (parse_in, "__bdver1" ); |
109 | def_or_undef (parse_in, "__bdver1__" ); |
110 | break; |
111 | case PROCESSOR_BDVER2: |
112 | def_or_undef (parse_in, "__bdver2" ); |
113 | def_or_undef (parse_in, "__bdver2__" ); |
114 | break; |
115 | case PROCESSOR_BDVER3: |
116 | def_or_undef (parse_in, "__bdver3" ); |
117 | def_or_undef (parse_in, "__bdver3__" ); |
118 | break; |
119 | case PROCESSOR_BDVER4: |
120 | def_or_undef (parse_in, "__bdver4" ); |
121 | def_or_undef (parse_in, "__bdver4__" ); |
122 | break; |
123 | case PROCESSOR_ZNVER1: |
124 | def_or_undef (parse_in, "__znver1" ); |
125 | def_or_undef (parse_in, "__znver1__" ); |
126 | break; |
127 | case PROCESSOR_ZNVER2: |
128 | def_or_undef (parse_in, "__znver2" ); |
129 | def_or_undef (parse_in, "__znver2__" ); |
130 | break; |
131 | case PROCESSOR_ZNVER3: |
132 | def_or_undef (parse_in, "__znver3" ); |
133 | def_or_undef (parse_in, "__znver3__" ); |
134 | break; |
135 | case PROCESSOR_ZNVER4: |
136 | def_or_undef (parse_in, "__znver4" ); |
137 | def_or_undef (parse_in, "__znver4__" ); |
138 | break; |
139 | case PROCESSOR_ZNVER5: |
140 | def_or_undef (parse_in, "__znver5" ); |
141 | def_or_undef (parse_in, "__znver5__" ); |
142 | break; |
143 | case PROCESSOR_BTVER1: |
144 | def_or_undef (parse_in, "__btver1" ); |
145 | def_or_undef (parse_in, "__btver1__" ); |
146 | break; |
147 | case PROCESSOR_BTVER2: |
148 | def_or_undef (parse_in, "__btver2" ); |
149 | def_or_undef (parse_in, "__btver2__" ); |
150 | break; |
151 | case PROCESSOR_LUJIAZUI: |
152 | def_or_undef (parse_in, "__lujiazui" ); |
153 | def_or_undef (parse_in, "__lujiazui__" ); |
154 | break; |
155 | case PROCESSOR_YONGFENG: |
156 | def_or_undef (parse_in, "__yongfeng" ); |
157 | def_or_undef (parse_in, "__yongfeng__" ); |
158 | break; |
159 | case PROCESSOR_PENTIUM4: |
160 | def_or_undef (parse_in, "__pentium4" ); |
161 | def_or_undef (parse_in, "__pentium4__" ); |
162 | break; |
163 | case PROCESSOR_NOCONA: |
164 | def_or_undef (parse_in, "__nocona" ); |
165 | def_or_undef (parse_in, "__nocona__" ); |
166 | break; |
167 | case PROCESSOR_CORE2: |
168 | def_or_undef (parse_in, "__core2" ); |
169 | def_or_undef (parse_in, "__core2__" ); |
170 | break; |
171 | case PROCESSOR_NEHALEM: |
172 | def_or_undef (parse_in, "__corei7" ); |
173 | def_or_undef (parse_in, "__corei7__" ); |
174 | def_or_undef (parse_in, "__nehalem" ); |
175 | def_or_undef (parse_in, "__nehalem__" ); |
176 | break; |
177 | case PROCESSOR_SANDYBRIDGE: |
178 | def_or_undef (parse_in, "__corei7_avx" ); |
179 | def_or_undef (parse_in, "__corei7_avx__" ); |
180 | def_or_undef (parse_in, "__sandybridge" ); |
181 | def_or_undef (parse_in, "__sandybridge__" ); |
182 | break; |
183 | case PROCESSOR_HASWELL: |
184 | def_or_undef (parse_in, "__core_avx2" ); |
185 | def_or_undef (parse_in, "__core_avx2__" ); |
186 | def_or_undef (parse_in, "__haswell" ); |
187 | def_or_undef (parse_in, "__haswell__" ); |
188 | break; |
189 | case PROCESSOR_BONNELL: |
190 | def_or_undef (parse_in, "__atom" ); |
191 | def_or_undef (parse_in, "__atom__" ); |
192 | def_or_undef (parse_in, "__bonnell" ); |
193 | def_or_undef (parse_in, "__bonnell__" ); |
194 | break; |
195 | case PROCESSOR_SILVERMONT: |
196 | def_or_undef (parse_in, "__slm" ); |
197 | def_or_undef (parse_in, "__slm__" ); |
198 | def_or_undef (parse_in, "__silvermont" ); |
199 | def_or_undef (parse_in, "__silvermont__" ); |
200 | break; |
201 | case PROCESSOR_GOLDMONT: |
202 | def_or_undef (parse_in, "__goldmont" ); |
203 | def_or_undef (parse_in, "__goldmont__" ); |
204 | break; |
205 | case PROCESSOR_GOLDMONT_PLUS: |
206 | def_or_undef (parse_in, "__goldmont_plus" ); |
207 | def_or_undef (parse_in, "__goldmont_plus__" ); |
208 | break; |
209 | case PROCESSOR_TREMONT: |
210 | def_or_undef (parse_in, "__tremont" ); |
211 | def_or_undef (parse_in, "__tremont__" ); |
212 | break; |
213 | case PROCESSOR_SIERRAFOREST: |
214 | def_or_undef (parse_in, "__sierraforest" ); |
215 | def_or_undef (parse_in, "__sierraforest__" ); |
216 | break; |
217 | case PROCESSOR_GRANDRIDGE: |
218 | def_or_undef (parse_in, "__grandridge" ); |
219 | def_or_undef (parse_in, "__grandridge__" ); |
220 | break; |
221 | case PROCESSOR_CLEARWATERFOREST: |
222 | def_or_undef (parse_in, "__clearwaterforest" ); |
223 | def_or_undef (parse_in, "__clearwaterforest__" ); |
224 | break; |
225 | case PROCESSOR_KNL: |
226 | def_or_undef (parse_in, "__knl" ); |
227 | def_or_undef (parse_in, "__knl__" ); |
228 | break; |
229 | case PROCESSOR_KNM: |
230 | def_or_undef (parse_in, "__knm" ); |
231 | def_or_undef (parse_in, "__knm__" ); |
232 | break; |
233 | case PROCESSOR_SKYLAKE: |
234 | def_or_undef (parse_in, "__skylake" ); |
235 | def_or_undef (parse_in, "__skylake__" ); |
236 | break; |
237 | case PROCESSOR_SKYLAKE_AVX512: |
238 | def_or_undef (parse_in, "__skylake_avx512" ); |
239 | def_or_undef (parse_in, "__skylake_avx512__" ); |
240 | break; |
241 | case PROCESSOR_CANNONLAKE: |
242 | def_or_undef (parse_in, "__cannonlake" ); |
243 | def_or_undef (parse_in, "__cannonlake__" ); |
244 | break; |
245 | case PROCESSOR_ICELAKE_CLIENT: |
246 | def_or_undef (parse_in, "__icelake_client" ); |
247 | def_or_undef (parse_in, "__icelake_client__" ); |
248 | break; |
249 | case PROCESSOR_ICELAKE_SERVER: |
250 | def_or_undef (parse_in, "__icelake_server" ); |
251 | def_or_undef (parse_in, "__icelake_server__" ); |
252 | break; |
253 | case PROCESSOR_CASCADELAKE: |
254 | def_or_undef (parse_in, "__cascadelake" ); |
255 | def_or_undef (parse_in, "__cascadelake__" ); |
256 | break; |
257 | case PROCESSOR_TIGERLAKE: |
258 | def_or_undef (parse_in, "__tigerlake" ); |
259 | def_or_undef (parse_in, "__tigerlake__" ); |
260 | break; |
261 | case PROCESSOR_COOPERLAKE: |
262 | def_or_undef (parse_in, "__cooperlake" ); |
263 | def_or_undef (parse_in, "__cooperlake__" ); |
264 | break; |
265 | case PROCESSOR_SAPPHIRERAPIDS: |
266 | def_or_undef (parse_in, "__sapphirerapids" ); |
267 | def_or_undef (parse_in, "__sapphirerapids__" ); |
268 | break; |
269 | case PROCESSOR_GRANITERAPIDS: |
270 | def_or_undef (parse_in, "__graniterapids" ); |
271 | def_or_undef (parse_in, "__graniterapids__" ); |
272 | break; |
273 | case PROCESSOR_GRANITERAPIDS_D: |
274 | def_or_undef (parse_in, "__graniterapids_d" ); |
275 | def_or_undef (parse_in, "__graniterapids_d__" ); |
276 | break; |
277 | case PROCESSOR_ALDERLAKE: |
278 | def_or_undef (parse_in, "__alderlake" ); |
279 | def_or_undef (parse_in, "__alderlake__" ); |
280 | break; |
281 | case PROCESSOR_ROCKETLAKE: |
282 | def_or_undef (parse_in, "__rocketlake" ); |
283 | def_or_undef (parse_in, "__rocketlake__" ); |
284 | break; |
285 | case PROCESSOR_ARROWLAKE: |
286 | def_or_undef (parse_in, "__arrowlake" ); |
287 | def_or_undef (parse_in, "__arrowlake__" ); |
288 | break; |
289 | case PROCESSOR_ARROWLAKE_S: |
290 | def_or_undef (parse_in, "__arrowlake_s" ); |
291 | def_or_undef (parse_in, "__arrowlake_s__" ); |
292 | break; |
293 | case PROCESSOR_PANTHERLAKE: |
294 | def_or_undef (parse_in, "__pantherlake" ); |
295 | def_or_undef (parse_in, "__pantherlake__" ); |
296 | break; |
297 | |
298 | /* use PROCESSOR_max to not set/unset the arch macro. */ |
299 | case PROCESSOR_max: |
300 | break; |
301 | case PROCESSOR_INTEL: |
302 | case PROCESSOR_GENERIC: |
303 | gcc_unreachable (); |
304 | } |
305 | |
306 | /* Built-ins based on -mtune=. */ |
307 | switch (tune) |
308 | { |
309 | case PROCESSOR_I386: |
310 | def_or_undef (parse_in, "__tune_i386__" ); |
311 | break; |
312 | case PROCESSOR_I486: |
313 | def_or_undef (parse_in, "__tune_i486__" ); |
314 | break; |
315 | case PROCESSOR_PENTIUM: |
316 | def_or_undef (parse_in, "__tune_i586__" ); |
317 | def_or_undef (parse_in, "__tune_pentium__" ); |
318 | if (last_tune_char == 'x') |
319 | def_or_undef (parse_in, "__tune_pentium_mmx__" ); |
320 | break; |
321 | case PROCESSOR_PENTIUMPRO: |
322 | def_or_undef (parse_in, "__tune_i686__" ); |
323 | def_or_undef (parse_in, "__tune_pentiumpro__" ); |
324 | switch (last_tune_char) |
325 | { |
326 | case '3': |
327 | def_or_undef (parse_in, "__tune_pentium3__" ); |
328 | /* FALLTHRU */ |
329 | case '2': |
330 | def_or_undef (parse_in, "__tune_pentium2__" ); |
331 | break; |
332 | } |
333 | break; |
334 | case PROCESSOR_GEODE: |
335 | def_or_undef (parse_in, "__tune_geode__" ); |
336 | break; |
337 | case PROCESSOR_K6: |
338 | def_or_undef (parse_in, "__tune_k6__" ); |
339 | if (last_tune_char == '2') |
340 | def_or_undef (parse_in, "__tune_k6_2__" ); |
341 | else if (last_tune_char == '3') |
342 | def_or_undef (parse_in, "__tune_k6_3__" ); |
343 | else if (isa_flag & OPTION_MASK_ISA_3DNOW) |
344 | def_or_undef (parse_in, "__tune_k6_3__" ); |
345 | break; |
346 | case PROCESSOR_ATHLON: |
347 | def_or_undef (parse_in, "__tune_athlon__" ); |
348 | if (isa_flag & OPTION_MASK_ISA_SSE) |
349 | def_or_undef (parse_in, "__tune_athlon_sse__" ); |
350 | break; |
351 | case PROCESSOR_K8: |
352 | def_or_undef (parse_in, "__tune_k8__" ); |
353 | break; |
354 | case PROCESSOR_AMDFAM10: |
355 | def_or_undef (parse_in, "__tune_amdfam10__" ); |
356 | break; |
357 | case PROCESSOR_BDVER1: |
358 | def_or_undef (parse_in, "__tune_bdver1__" ); |
359 | break; |
360 | case PROCESSOR_BDVER2: |
361 | def_or_undef (parse_in, "__tune_bdver2__" ); |
362 | break; |
363 | case PROCESSOR_BDVER3: |
364 | def_or_undef (parse_in, "__tune_bdver3__" ); |
365 | break; |
366 | case PROCESSOR_BDVER4: |
367 | def_or_undef (parse_in, "__tune_bdver4__" ); |
368 | break; |
369 | case PROCESSOR_ZNVER1: |
370 | def_or_undef (parse_in, "__tune_znver1__" ); |
371 | break; |
372 | case PROCESSOR_ZNVER2: |
373 | def_or_undef (parse_in, "__tune_znver2__" ); |
374 | break; |
375 | case PROCESSOR_ZNVER3: |
376 | def_or_undef (parse_in, "__tune_znver3__" ); |
377 | break; |
378 | case PROCESSOR_ZNVER4: |
379 | def_or_undef (parse_in, "__tune_znver4__" ); |
380 | break; |
381 | case PROCESSOR_ZNVER5: |
382 | def_or_undef (parse_in, "__tune_znver5__" ); |
383 | break; |
384 | case PROCESSOR_BTVER1: |
385 | def_or_undef (parse_in, "__tune_btver1__" ); |
386 | break; |
387 | case PROCESSOR_BTVER2: |
388 | def_or_undef (parse_in, "__tune_btver2__" ); |
389 | break; |
390 | case PROCESSOR_LUJIAZUI: |
391 | def_or_undef (parse_in, "__tune_lujiazui__" ); |
392 | break; |
393 | case PROCESSOR_YONGFENG: |
394 | def_or_undef (parse_in, "__tune_yongfeng__" ); |
395 | break; |
396 | case PROCESSOR_PENTIUM4: |
397 | def_or_undef (parse_in, "__tune_pentium4__" ); |
398 | break; |
399 | case PROCESSOR_NOCONA: |
400 | def_or_undef (parse_in, "__tune_nocona__" ); |
401 | break; |
402 | case PROCESSOR_CORE2: |
403 | def_or_undef (parse_in, "__tune_core2__" ); |
404 | break; |
405 | case PROCESSOR_NEHALEM: |
406 | def_or_undef (parse_in, "__tune_corei7__" ); |
407 | def_or_undef (parse_in, "__tune_nehalem__" ); |
408 | break; |
409 | case PROCESSOR_SANDYBRIDGE: |
410 | def_or_undef (parse_in, "__tune_corei7_avx__" ); |
411 | def_or_undef (parse_in, "__tune_sandybridge__" ); |
412 | break; |
413 | case PROCESSOR_HASWELL: |
414 | def_or_undef (parse_in, "__tune_core_avx2__" ); |
415 | def_or_undef (parse_in, "__tune_haswell__" ); |
416 | break; |
417 | case PROCESSOR_BONNELL: |
418 | def_or_undef (parse_in, "__tune_atom__" ); |
419 | def_or_undef (parse_in, "__tune_bonnell__" ); |
420 | break; |
421 | case PROCESSOR_SILVERMONT: |
422 | def_or_undef (parse_in, "__tune_slm__" ); |
423 | def_or_undef (parse_in, "__tune_silvermont__" ); |
424 | break; |
425 | case PROCESSOR_GOLDMONT: |
426 | def_or_undef (parse_in, "__tune_goldmont__" ); |
427 | break; |
428 | case PROCESSOR_GOLDMONT_PLUS: |
429 | def_or_undef (parse_in, "__tune_goldmont_plus__" ); |
430 | break; |
431 | case PROCESSOR_TREMONT: |
432 | def_or_undef (parse_in, "__tune_tremont__" ); |
433 | break; |
434 | case PROCESSOR_SIERRAFOREST: |
435 | def_or_undef (parse_in, "__tune_sierraforest__" ); |
436 | break; |
437 | case PROCESSOR_GRANDRIDGE: |
438 | def_or_undef (parse_in, "__tune_grandridge__" ); |
439 | break; |
440 | case PROCESSOR_CLEARWATERFOREST: |
441 | def_or_undef (parse_in, "__tune_clearwaterforest__" ); |
442 | break; |
443 | case PROCESSOR_KNL: |
444 | def_or_undef (parse_in, "__tune_knl__" ); |
445 | break; |
446 | case PROCESSOR_KNM: |
447 | def_or_undef (parse_in, "__tune_knm__" ); |
448 | break; |
449 | case PROCESSOR_SKYLAKE: |
450 | def_or_undef (parse_in, "__tune_skylake__" ); |
451 | break; |
452 | case PROCESSOR_SKYLAKE_AVX512: |
453 | def_or_undef (parse_in, "__tune_skylake_avx512__" ); |
454 | break; |
455 | case PROCESSOR_CANNONLAKE: |
456 | def_or_undef (parse_in, "__tune_cannonlake__" ); |
457 | break; |
458 | case PROCESSOR_ICELAKE_CLIENT: |
459 | def_or_undef (parse_in, "__tune_icelake_client__" ); |
460 | break; |
461 | case PROCESSOR_ICELAKE_SERVER: |
462 | def_or_undef (parse_in, "__tune_icelake_server__" ); |
463 | break; |
464 | case PROCESSOR_LAKEMONT: |
465 | def_or_undef (parse_in, "__tune_lakemont__" ); |
466 | break; |
467 | case PROCESSOR_CASCADELAKE: |
468 | def_or_undef (parse_in, "__tune_cascadelake__" ); |
469 | break; |
470 | case PROCESSOR_TIGERLAKE: |
471 | def_or_undef (parse_in, "__tune_tigerlake__" ); |
472 | break; |
473 | case PROCESSOR_COOPERLAKE: |
474 | def_or_undef (parse_in, "__tune_cooperlake__" ); |
475 | break; |
476 | case PROCESSOR_SAPPHIRERAPIDS: |
477 | def_or_undef (parse_in, "__tune_sapphirerapids__" ); |
478 | break; |
479 | case PROCESSOR_ALDERLAKE: |
480 | def_or_undef (parse_in, "__tune_alderlake__" ); |
481 | break; |
482 | case PROCESSOR_ROCKETLAKE: |
483 | def_or_undef (parse_in, "__tune_rocketlake__" ); |
484 | break; |
485 | case PROCESSOR_GRANITERAPIDS: |
486 | def_or_undef (parse_in, "__tune_graniterapids__" ); |
487 | break; |
488 | case PROCESSOR_GRANITERAPIDS_D: |
489 | def_or_undef (parse_in, "__tune_graniterapids_d__" ); |
490 | break; |
491 | case PROCESSOR_ARROWLAKE: |
492 | def_or_undef (parse_in, "__tune_arrowlake__" ); |
493 | break; |
494 | case PROCESSOR_ARROWLAKE_S: |
495 | def_or_undef (parse_in, "__tune_arrowlake_s__" ); |
496 | break; |
497 | case PROCESSOR_PANTHERLAKE: |
498 | def_or_undef (parse_in, "__tune_pantherlake__" ); |
499 | break; |
500 | case PROCESSOR_INTEL: |
501 | case PROCESSOR_GENERIC: |
502 | break; |
503 | /* use PROCESSOR_max to not set/unset the tune macro. */ |
504 | case PROCESSOR_max: |
505 | break; |
506 | } |
507 | |
508 | switch (ix86_cmodel) |
509 | { |
510 | case CM_SMALL: |
511 | case CM_SMALL_PIC: |
512 | def_or_undef (parse_in, "__code_model_small__" ); |
513 | break; |
514 | case CM_MEDIUM: |
515 | case CM_MEDIUM_PIC: |
516 | def_or_undef (parse_in, "__code_model_medium__" ); |
517 | break; |
518 | case CM_LARGE: |
519 | case CM_LARGE_PIC: |
520 | def_or_undef (parse_in, "__code_model_large__" ); |
521 | break; |
522 | case CM_32: |
523 | def_or_undef (parse_in, "__code_model_32__" ); |
524 | break; |
525 | case CM_KERNEL: |
526 | def_or_undef (parse_in, "__code_model_kernel__" ); |
527 | break; |
528 | default: |
529 | ; |
530 | } |
531 | |
532 | if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD) |
533 | def_or_undef (parse_in, "__WBNOINVD__" ); |
534 | if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT) |
535 | def_or_undef (parse_in, "__AVX512VP2INTERSECT__" ); |
536 | if (isa_flag & OPTION_MASK_ISA_MMX) |
537 | def_or_undef (parse_in, "__MMX__" ); |
538 | if (isa_flag & OPTION_MASK_ISA_3DNOW) |
539 | def_or_undef (parse_in, "__3dNOW__" ); |
540 | if (isa_flag & OPTION_MASK_ISA_3DNOW_A) |
541 | def_or_undef (parse_in, "__3dNOW_A__" ); |
542 | if (isa_flag & OPTION_MASK_ISA_SSE) |
543 | def_or_undef (parse_in, "__SSE__" ); |
544 | if (isa_flag & OPTION_MASK_ISA_SSE2) |
545 | def_or_undef (parse_in, "__SSE2__" ); |
546 | if (isa_flag & OPTION_MASK_ISA_SSE3) |
547 | def_or_undef (parse_in, "__SSE3__" ); |
548 | if (isa_flag & OPTION_MASK_ISA_SSSE3) |
549 | def_or_undef (parse_in, "__SSSE3__" ); |
550 | if (isa_flag & OPTION_MASK_ISA_SSE4_1) |
551 | def_or_undef (parse_in, "__SSE4_1__" ); |
552 | if (isa_flag & OPTION_MASK_ISA_SSE4_2) |
553 | def_or_undef (parse_in, "__SSE4_2__" ); |
554 | if (isa_flag & OPTION_MASK_ISA_AES) |
555 | def_or_undef (parse_in, "__AES__" ); |
556 | if (isa_flag & OPTION_MASK_ISA_SHA) |
557 | def_or_undef (parse_in, "__SHA__" ); |
558 | if (isa_flag & OPTION_MASK_ISA_PCLMUL) |
559 | def_or_undef (parse_in, "__PCLMUL__" ); |
560 | if (isa_flag & OPTION_MASK_ISA_AVX) |
561 | def_or_undef (parse_in, "__AVX__" ); |
562 | if (isa_flag & OPTION_MASK_ISA_AVX2) |
563 | def_or_undef (parse_in, "__AVX2__" ); |
564 | if (isa_flag & OPTION_MASK_ISA_AVX512F) |
565 | def_or_undef (parse_in, "__AVX512F__" ); |
566 | if (isa_flag & OPTION_MASK_ISA_AVX512ER) |
567 | def_or_undef (parse_in, "__AVX512ER__" ); |
568 | if (isa_flag & OPTION_MASK_ISA_AVX512CD) |
569 | def_or_undef (parse_in, "__AVX512CD__" ); |
570 | if (isa_flag & OPTION_MASK_ISA_AVX512PF) |
571 | def_or_undef (parse_in, "__AVX512PF__" ); |
572 | if (isa_flag & OPTION_MASK_ISA_AVX512DQ) |
573 | def_or_undef (parse_in, "__AVX512DQ__" ); |
574 | if (isa_flag & OPTION_MASK_ISA_AVX512BW) |
575 | def_or_undef (parse_in, "__AVX512BW__" ); |
576 | if (isa_flag & OPTION_MASK_ISA_AVX512VL) |
577 | { |
578 | def_or_undef (parse_in, "__AVX512VL__" ); |
579 | def_or_undef (parse_in, "__EVEX256__" ); |
580 | } |
581 | if (isa_flag & OPTION_MASK_ISA_AVX512VBMI) |
582 | def_or_undef (parse_in, "__AVX512VBMI__" ); |
583 | if (isa_flag & OPTION_MASK_ISA_AVX512IFMA) |
584 | def_or_undef (parse_in, "__AVX512IFMA__" ); |
585 | if (isa_flag2 & OPTION_MASK_ISA2_AVX5124VNNIW) |
586 | def_or_undef (parse_in, "__AVX5124VNNIW__" ); |
587 | if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2) |
588 | def_or_undef (parse_in, "__AVX512VBMI2__" ); |
589 | if (isa_flag & OPTION_MASK_ISA_AVX512VNNI) |
590 | def_or_undef (parse_in, "__AVX512VNNI__" ); |
591 | if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG) |
592 | def_or_undef (parse_in, "__PCONFIG__" ); |
593 | if (isa_flag2 & OPTION_MASK_ISA2_SGX) |
594 | def_or_undef (parse_in, "__SGX__" ); |
595 | if (isa_flag2 & OPTION_MASK_ISA2_AVX5124FMAPS) |
596 | def_or_undef (parse_in, "__AVX5124FMAPS__" ); |
597 | if (isa_flag & OPTION_MASK_ISA_AVX512BITALG) |
598 | def_or_undef (parse_in, "__AVX512BITALG__" ); |
599 | if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ) |
600 | def_or_undef (parse_in, "__AVX512VPOPCNTDQ__" ); |
601 | if (isa_flag & OPTION_MASK_ISA_FMA) |
602 | def_or_undef (parse_in, "__FMA__" ); |
603 | if (isa_flag & OPTION_MASK_ISA_RTM) |
604 | def_or_undef (parse_in, "__RTM__" ); |
605 | if (isa_flag & OPTION_MASK_ISA_SSE4A) |
606 | def_or_undef (parse_in, "__SSE4A__" ); |
607 | if (isa_flag & OPTION_MASK_ISA_FMA4) |
608 | def_or_undef (parse_in, "__FMA4__" ); |
609 | if (isa_flag & OPTION_MASK_ISA_XOP) |
610 | def_or_undef (parse_in, "__XOP__" ); |
611 | if (isa_flag & OPTION_MASK_ISA_LWP) |
612 | def_or_undef (parse_in, "__LWP__" ); |
613 | if (isa_flag & OPTION_MASK_ISA_ABM) |
614 | def_or_undef (parse_in, "__ABM__" ); |
615 | if (isa_flag & OPTION_MASK_ISA_BMI) |
616 | def_or_undef (parse_in, "__BMI__" ); |
617 | if (isa_flag & OPTION_MASK_ISA_BMI2) |
618 | def_or_undef (parse_in, "__BMI2__" ); |
619 | if (isa_flag & OPTION_MASK_ISA_LZCNT) |
620 | def_or_undef (parse_in, "__LZCNT__" ); |
621 | if (isa_flag & OPTION_MASK_ISA_TBM) |
622 | def_or_undef (parse_in, "__TBM__" ); |
623 | if (isa_flag & OPTION_MASK_ISA_CRC32) |
624 | def_or_undef (parse_in, "__CRC32__" ); |
625 | if (isa_flag & OPTION_MASK_ISA_POPCNT) |
626 | def_or_undef (parse_in, "__POPCNT__" ); |
627 | if (isa_flag & OPTION_MASK_ISA_FSGSBASE) |
628 | def_or_undef (parse_in, "__FSGSBASE__" ); |
629 | if (isa_flag & OPTION_MASK_ISA_RDRND) |
630 | def_or_undef (parse_in, "__RDRND__" ); |
631 | if (isa_flag & OPTION_MASK_ISA_F16C) |
632 | def_or_undef (parse_in, "__F16C__" ); |
633 | if (isa_flag & OPTION_MASK_ISA_RDSEED) |
634 | def_or_undef (parse_in, "__RDSEED__" ); |
635 | if (isa_flag & OPTION_MASK_ISA_PRFCHW) |
636 | def_or_undef (parse_in, "__PRFCHW__" ); |
637 | if (isa_flag & OPTION_MASK_ISA_ADX) |
638 | def_or_undef (parse_in, "__ADX__" ); |
639 | if (isa_flag & OPTION_MASK_ISA_FXSR) |
640 | def_or_undef (parse_in, "__FXSR__" ); |
641 | if (isa_flag & OPTION_MASK_ISA_XSAVE) |
642 | def_or_undef (parse_in, "__XSAVE__" ); |
643 | if (isa_flag & OPTION_MASK_ISA_XSAVEOPT) |
644 | def_or_undef (parse_in, "__XSAVEOPT__" ); |
645 | if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1) |
646 | def_or_undef (parse_in, "__PREFETCHWT1__" ); |
647 | if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE)) |
648 | def_or_undef (parse_in, "__SSE_MATH__" ); |
649 | if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2)) |
650 | def_or_undef (parse_in, "__SSE2_MATH__" ); |
651 | if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT) |
652 | def_or_undef (parse_in, "__CLFLUSHOPT__" ); |
653 | if (isa_flag2 & OPTION_MASK_ISA2_CLZERO) |
654 | def_or_undef (parse_in, "__CLZERO__" ); |
655 | if (isa_flag & OPTION_MASK_ISA_XSAVEC) |
656 | def_or_undef (parse_in, "__XSAVEC__" ); |
657 | if (isa_flag & OPTION_MASK_ISA_XSAVES) |
658 | def_or_undef (parse_in, "__XSAVES__" ); |
659 | if (isa_flag & OPTION_MASK_ISA_CLWB) |
660 | def_or_undef (parse_in, "__CLWB__" ); |
661 | if (isa_flag2 & OPTION_MASK_ISA2_MWAITX) |
662 | def_or_undef (parse_in, "__MWAITX__" ); |
663 | if (isa_flag & OPTION_MASK_ISA_PKU) |
664 | def_or_undef (parse_in, "__PKU__" ); |
665 | if (isa_flag2 & OPTION_MASK_ISA2_RDPID) |
666 | def_or_undef (parse_in, "__RDPID__" ); |
667 | if (isa_flag & OPTION_MASK_ISA_GFNI) |
668 | def_or_undef (parse_in, "__GFNI__" ); |
669 | if ((isa_flag & OPTION_MASK_ISA_SHSTK)) |
670 | def_or_undef (parse_in, "__SHSTK__" ); |
671 | if (isa_flag2 & OPTION_MASK_ISA2_VAES) |
672 | def_or_undef (parse_in, "__VAES__" ); |
673 | if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ) |
674 | def_or_undef (parse_in, "__VPCLMULQDQ__" ); |
675 | if (isa_flag & OPTION_MASK_ISA_MOVDIRI) |
676 | def_or_undef (parse_in, "__MOVDIRI__" ); |
677 | if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B) |
678 | def_or_undef (parse_in, "__MOVDIR64B__" ); |
679 | if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG) |
680 | def_or_undef (parse_in, "__WAITPKG__" ); |
681 | if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE) |
682 | def_or_undef (parse_in, "__CLDEMOTE__" ); |
683 | if (isa_flag2 & OPTION_MASK_ISA2_SERIALIZE) |
684 | def_or_undef (parse_in, "__SERIALIZE__" ); |
685 | if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE) |
686 | def_or_undef (parse_in, "__PTWRITE__" ); |
687 | if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16) |
688 | def_or_undef (parse_in, "__AVX512BF16__" ); |
689 | if (isa_flag2 & OPTION_MASK_ISA2_AVX512FP16) |
690 | def_or_undef (parse_in, "__AVX512FP16__" ); |
691 | if (TARGET_MMX_WITH_SSE) |
692 | def_or_undef (parse_in, "__MMX_WITH_SSE__" ); |
693 | if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD) |
694 | def_or_undef (parse_in, "__ENQCMD__" ); |
695 | if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK) |
696 | def_or_undef (parse_in, "__TSXLDTRK__" ); |
697 | if (isa_flag2 & OPTION_MASK_ISA2_AMX_TILE) |
698 | def_or_undef (parse_in, "__AMX_TILE__" ); |
699 | if (isa_flag2 & OPTION_MASK_ISA2_AMX_INT8) |
700 | def_or_undef (parse_in, "__AMX_INT8__" ); |
701 | if (isa_flag2 & OPTION_MASK_ISA2_AMX_BF16) |
702 | def_or_undef (parse_in, "__AMX_BF16__" ); |
703 | if (isa_flag & OPTION_MASK_ISA_SAHF) |
704 | def_or_undef (parse_in, "__LAHF_SAHF__" ); |
705 | if (isa_flag2 & OPTION_MASK_ISA2_MOVBE) |
706 | def_or_undef (parse_in, "__MOVBE__" ); |
707 | if (isa_flag2 & OPTION_MASK_ISA2_UINTR) |
708 | def_or_undef (parse_in, "__UINTR__" ); |
709 | if (isa_flag2 & OPTION_MASK_ISA2_HRESET) |
710 | def_or_undef (parse_in, "__HRESET__" ); |
711 | if (isa_flag2 & OPTION_MASK_ISA2_KL) |
712 | def_or_undef (parse_in, "__KL__" ); |
713 | if (isa_flag2 & OPTION_MASK_ISA2_WIDEKL) |
714 | def_or_undef (parse_in, "__WIDEKL__" ); |
715 | if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNI) |
716 | def_or_undef (parse_in, "__AVXVNNI__" ); |
717 | if (isa_flag2 & OPTION_MASK_ISA2_AVXIFMA) |
718 | def_or_undef (parse_in, "__AVXIFMA__" ); |
719 | if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT8) |
720 | def_or_undef (parse_in, "__AVXVNNIINT8__" ); |
721 | if (isa_flag2 & OPTION_MASK_ISA2_AVXNECONVERT) |
722 | def_or_undef (parse_in, "__AVXNECONVERT__" ); |
723 | if (isa_flag2 & OPTION_MASK_ISA2_CMPCCXADD) |
724 | def_or_undef (parse_in, "__CMPCCXADD__" ); |
725 | if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP16) |
726 | def_or_undef (parse_in, "__AMX_FP16__" ); |
727 | if (isa_flag2 & OPTION_MASK_ISA2_PREFETCHI) |
728 | def_or_undef (parse_in, "__PREFETCHI__" ); |
729 | if (isa_flag2 & OPTION_MASK_ISA2_RAOINT) |
730 | def_or_undef (parse_in, "__RAOINT__" ); |
731 | if (isa_flag2 & OPTION_MASK_ISA2_AMX_COMPLEX) |
732 | def_or_undef (parse_in, "__AMX_COMPLEX__" ); |
733 | if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT16) |
734 | def_or_undef (parse_in, "__AVXVNNIINT16__" ); |
735 | if (isa_flag2 & OPTION_MASK_ISA2_SM3) |
736 | def_or_undef (parse_in, "__SM3__" ); |
737 | if (isa_flag2 & OPTION_MASK_ISA2_SHA512) |
738 | def_or_undef (parse_in, "__SHA512__" ); |
739 | if (isa_flag2 & OPTION_MASK_ISA2_SM4) |
740 | def_or_undef (parse_in, "__SM4__" ); |
741 | if (isa_flag2 & OPTION_MASK_ISA2_EVEX512) |
742 | def_or_undef (parse_in, "__EVEX512__" ); |
743 | if (isa_flag2 & OPTION_MASK_ISA2_USER_MSR) |
744 | def_or_undef (parse_in, "__USER_MSR__" ); |
745 | if (isa_flag2 & OPTION_MASK_ISA2_AVX10_1_256) |
746 | { |
747 | def_or_undef (parse_in, "__AVX10_1_256__" ); |
748 | def_or_undef (parse_in, "__AVX10_1__" ); |
749 | } |
750 | if (isa_flag2 & OPTION_MASK_ISA2_AVX10_1_512) |
751 | def_or_undef (parse_in, "__AVX10_1_512__" ); |
752 | if (isa_flag2 & OPTION_MASK_ISA2_APX_F) |
753 | def_or_undef (parse_in, "__APX_F__" ); |
754 | if (ix86_apx_inline_asm_use_gpr32) |
755 | def_or_undef (parse_in, "__APX_INLINE_ASM_USE_GPR32__" ); |
756 | if (TARGET_IAMCU) |
757 | { |
758 | def_or_undef (parse_in, "__iamcu" ); |
759 | def_or_undef (parse_in, "__iamcu__" ); |
760 | } |
761 | } |
762 | |
763 | |
764 | /* Hook to validate the current #pragma GCC target and set the state, and |
765 | update the macros based on what was changed. If ARGS is NULL, then |
766 | POP_TARGET is used to reset the options. */ |
767 | |
768 | static bool |
769 | ix86_pragma_target_parse (tree args, tree pop_target) |
770 | { |
771 | tree prev_tree |
772 | = build_target_option_node (opts: &global_options, opts_set: &global_options_set); |
773 | tree cur_tree; |
774 | struct cl_target_option *prev_opt; |
775 | struct cl_target_option *cur_opt; |
776 | HOST_WIDE_INT prev_isa; |
777 | HOST_WIDE_INT cur_isa; |
778 | HOST_WIDE_INT diff_isa; |
779 | HOST_WIDE_INT prev_isa2; |
780 | HOST_WIDE_INT cur_isa2; |
781 | HOST_WIDE_INT diff_isa2; |
782 | enum processor_type prev_arch; |
783 | enum processor_type prev_tune; |
784 | enum processor_type cur_arch; |
785 | enum processor_type cur_tune; |
786 | |
787 | if (! args) |
788 | { |
789 | cur_tree = (pop_target ? pop_target : target_option_default_node); |
790 | cl_target_option_restore (&global_options, &global_options_set, |
791 | TREE_TARGET_OPTION (cur_tree)); |
792 | } |
793 | else |
794 | { |
795 | cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args, |
796 | &global_options, |
797 | &global_options_set, 0); |
798 | if (!cur_tree || cur_tree == error_mark_node) |
799 | { |
800 | cl_target_option_restore (&global_options, &global_options_set, |
801 | TREE_TARGET_OPTION (prev_tree)); |
802 | return false; |
803 | } |
804 | } |
805 | |
806 | target_option_current_node = cur_tree; |
807 | ix86_reset_previous_fndecl (); |
808 | |
809 | /* Figure out the previous/current isa, arch, tune and the differences. */ |
810 | prev_opt = TREE_TARGET_OPTION (prev_tree); |
811 | cur_opt = TREE_TARGET_OPTION (cur_tree); |
812 | prev_isa = prev_opt->x_ix86_isa_flags; |
813 | cur_isa = cur_opt->x_ix86_isa_flags; |
814 | diff_isa = (prev_isa ^ cur_isa); |
815 | prev_isa2 = prev_opt->x_ix86_isa_flags2; |
816 | cur_isa2 = cur_opt->x_ix86_isa_flags2; |
817 | diff_isa2 = (prev_isa2 ^ cur_isa2); |
818 | prev_arch = (enum processor_type) prev_opt->arch; |
819 | prev_tune = (enum processor_type) prev_opt->tune; |
820 | cur_arch = (enum processor_type) cur_opt->arch; |
821 | cur_tune = (enum processor_type) cur_opt->tune; |
822 | |
823 | /* If the same processor is used for both previous and current options, don't |
824 | change the macros. */ |
825 | if (cur_arch == prev_arch) |
826 | cur_arch = prev_arch = PROCESSOR_max; |
827 | |
828 | if (cur_tune == prev_tune) |
829 | cur_tune = prev_tune = PROCESSOR_max; |
830 | |
831 | /* Undef all of the macros for that are no longer current. */ |
832 | cpp_force_token_locations (parse_in, BUILTINS_LOCATION); |
833 | ix86_target_macros_internal (isa_flag: prev_isa & diff_isa, |
834 | isa_flag2: prev_isa2 & diff_isa2, |
835 | arch: prev_arch, |
836 | tune: prev_tune, |
837 | fpmath: (enum fpmath_unit) prev_opt->x_ix86_fpmath, |
838 | def_or_undef: cpp_undef); |
839 | cpp_stop_forcing_token_locations (parse_in); |
840 | |
841 | /* For the definitions, ensure all newly defined macros are considered |
842 | as used for -Wunused-macros. There is no point warning about the |
843 | compiler predefined macros. */ |
844 | cpp_options *cpp_opts = cpp_get_options (parse_in); |
845 | unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros; |
846 | cpp_opts->warn_unused_macros = 0; |
847 | |
848 | /* Define all of the macros for new options that were just turned on. */ |
849 | cpp_force_token_locations (parse_in, BUILTINS_LOCATION); |
850 | ix86_target_macros_internal (isa_flag: cur_isa & diff_isa, |
851 | isa_flag2: cur_isa2 & diff_isa2, |
852 | arch: cur_arch, |
853 | tune: cur_tune, |
854 | fpmath: (enum fpmath_unit) cur_opt->x_ix86_fpmath, |
855 | def_or_undef: cpp_define); |
856 | cpp_stop_forcing_token_locations (parse_in); |
857 | |
858 | cpp_opts->warn_unused_macros = saved_warn_unused_macros; |
859 | |
860 | return true; |
861 | } |
862 | |
863 | /* Function to tell the preprocessor about the defines for the current target. */ |
864 | |
865 | void |
866 | ix86_target_macros (void) |
867 | { |
868 | /* 32/64-bit won't change with target specific options, so do the assert and |
869 | builtin_define_std calls here. */ |
870 | if (TARGET_64BIT) |
871 | { |
872 | cpp_assert (parse_in, "cpu=x86_64" ); |
873 | cpp_assert (parse_in, "machine=x86_64" ); |
874 | cpp_define (parse_in, "__amd64" ); |
875 | cpp_define (parse_in, "__amd64__" ); |
876 | cpp_define (parse_in, "__x86_64" ); |
877 | cpp_define (parse_in, "__x86_64__" ); |
878 | if (TARGET_X32) |
879 | { |
880 | cpp_define (parse_in, "_ILP32" ); |
881 | cpp_define (parse_in, "__ILP32__" ); |
882 | } |
883 | } |
884 | else |
885 | { |
886 | cpp_assert (parse_in, "cpu=i386" ); |
887 | cpp_assert (parse_in, "machine=i386" ); |
888 | builtin_define_std (macro: "i386" ); |
889 | cpp_define (parse_in, "_ILP32" ); |
890 | cpp_define (parse_in, "__ILP32__" ); |
891 | } |
892 | |
893 | if (!TARGET_80387) |
894 | cpp_define (parse_in, "_SOFT_FLOAT" ); |
895 | |
896 | /* HFmode/BFmode is supported without depending any isa |
897 | in scalar_mode_supported_p and libgcc_floating_mode_supported_p, |
898 | but according to psABI, they're really supported w/ SSE2 and above. |
899 | Since libstdc++ uses __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__ |
900 | for backend support of the types, undef the macros to avoid |
901 | build failure, see PR109504. */ |
902 | if (!TARGET_SSE2) |
903 | { |
904 | if (c_dialect_cxx () && cxx_dialect > cxx20) |
905 | { |
906 | cpp_undef (parse_in, "__STDCPP_FLOAT16_T__" ); |
907 | cpp_undef (parse_in, "__STDCPP_BFLOAT16_T__" ); |
908 | } |
909 | } |
910 | |
911 | if (TARGET_LONG_DOUBLE_64) |
912 | cpp_define (parse_in, "__LONG_DOUBLE_64__" ); |
913 | |
914 | if (TARGET_LONG_DOUBLE_128) |
915 | cpp_define (parse_in, "__LONG_DOUBLE_128__" ); |
916 | |
917 | cpp_define_formatted (pfile: parse_in, fmt: "__SIZEOF_FLOAT80__=%d" , |
918 | GET_MODE_SIZE (XFmode)); |
919 | |
920 | cpp_define (parse_in, "__SIZEOF_FLOAT128__=16" ); |
921 | |
922 | cpp_define_formatted (pfile: parse_in, fmt: "__ATOMIC_HLE_ACQUIRE=%d" , IX86_HLE_ACQUIRE); |
923 | cpp_define_formatted (pfile: parse_in, fmt: "__ATOMIC_HLE_RELEASE=%d" , IX86_HLE_RELEASE); |
924 | |
925 | cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__" ); |
926 | |
927 | ix86_target_macros_internal (ix86_isa_flags, |
928 | ix86_isa_flags2, |
929 | arch: ix86_arch, |
930 | tune: ix86_tune, |
931 | ix86_fpmath, |
932 | def_or_undef: cpp_define); |
933 | |
934 | cpp_define (parse_in, "__SEG_FS" ); |
935 | cpp_define (parse_in, "__SEG_GS" ); |
936 | |
937 | if (flag_cf_protection != CF_NONE) |
938 | cpp_define_formatted (pfile: parse_in, fmt: "__CET__=%d" , flag_cf_protection & ~CF_SET); |
939 | } |
940 | |
941 | |
942 | /* Register target pragmas. We need to add the hook for parsing #pragma GCC |
943 | option here rather than in i386.cc since it will pull in various preprocessor |
944 | functions, and those are not present in languages like fortran without a |
945 | preprocessor. */ |
946 | |
947 | void |
948 | ix86_register_pragmas (void) |
949 | { |
950 | /* Update pragma hook to allow parsing #pragma GCC target. */ |
951 | targetm.target_option.pragma_parse = ix86_pragma_target_parse; |
952 | |
953 | c_register_addr_space (str: "__seg_fs" , as: ADDR_SPACE_SEG_FS); |
954 | c_register_addr_space (str: "__seg_gs" , as: ADDR_SPACE_SEG_GS); |
955 | |
956 | #ifdef REGISTER_SUBTARGET_PRAGMAS |
957 | REGISTER_SUBTARGET_PRAGMAS (); |
958 | #endif |
959 | } |
960 | |