1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // |
3 | // Samsung Exynos Flattened Device Tree enabled machine |
4 | // |
5 | // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. |
6 | // http://www.samsung.com |
7 | |
8 | #include <linux/init.h> |
9 | #include <linux/io.h> |
10 | #include <linux/of.h> |
11 | #include <linux/of_address.h> |
12 | #include <linux/of_fdt.h> |
13 | #include <linux/platform_device.h> |
14 | #include <linux/irqchip.h> |
15 | #include <linux/soc/samsung/exynos-regs-pmu.h> |
16 | |
17 | #include <asm/cacheflush.h> |
18 | #include <asm/hardware/cache-l2x0.h> |
19 | #include <asm/mach/arch.h> |
20 | #include <asm/mach/map.h> |
21 | |
22 | #include "common.h" |
23 | |
24 | #define S3C_ADDR_BASE 0xF6000000 |
25 | #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) |
26 | #define S5P_VA_CHIPID S3C_ADDR(0x02000000) |
27 | |
28 | static struct platform_device exynos_cpuidle = { |
29 | .name = "exynos_cpuidle" , |
30 | #ifdef CONFIG_ARM_EXYNOS_CPUIDLE |
31 | .dev.platform_data = exynos_enter_aftr, |
32 | #endif |
33 | .id = -1, |
34 | }; |
35 | |
36 | void __iomem *sysram_base_addr __ro_after_init; |
37 | phys_addr_t sysram_base_phys __ro_after_init; |
38 | void __iomem *sysram_ns_base_addr __ro_after_init; |
39 | |
40 | unsigned long exynos_cpu_id; |
41 | static unsigned int exynos_cpu_rev; |
42 | |
43 | unsigned int exynos_rev(void) |
44 | { |
45 | return exynos_cpu_rev; |
46 | } |
47 | |
48 | void __init exynos_sysram_init(void) |
49 | { |
50 | struct device_node *node; |
51 | |
52 | for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram" ) { |
53 | struct resource res; |
54 | if (!of_device_is_available(device: node)) |
55 | continue; |
56 | |
57 | of_address_to_resource(dev: node, index: 0, r: &res); |
58 | sysram_base_addr = ioremap(offset: res.start, size: resource_size(res: &res)); |
59 | sysram_base_phys = res.start; |
60 | of_node_put(node); |
61 | break; |
62 | } |
63 | |
64 | for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns" ) { |
65 | if (!of_device_is_available(device: node)) |
66 | continue; |
67 | sysram_ns_base_addr = of_iomap(node, index: 0); |
68 | of_node_put(node); |
69 | break; |
70 | } |
71 | } |
72 | |
73 | static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, |
74 | int depth, void *data) |
75 | { |
76 | struct map_desc iodesc; |
77 | const __be32 *reg; |
78 | int len; |
79 | |
80 | if (!of_flat_dt_is_compatible(node, name: "samsung,exynos4210-chipid" )) |
81 | return 0; |
82 | |
83 | reg = of_get_flat_dt_prop(node, name: "reg" , size: &len); |
84 | if (reg == NULL || len != (sizeof(unsigned long) * 2)) |
85 | return 0; |
86 | |
87 | iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0])); |
88 | iodesc.length = be32_to_cpu(reg[1]) - 1; |
89 | iodesc.virtual = (unsigned long)S5P_VA_CHIPID; |
90 | iodesc.type = MT_DEVICE; |
91 | iotable_init(&iodesc, 1); |
92 | return 1; |
93 | } |
94 | |
95 | static void __init exynos_init_io(void) |
96 | { |
97 | debug_ll_io_init(); |
98 | |
99 | of_scan_flat_dt(it: exynos_fdt_map_chipid, NULL); |
100 | |
101 | /* detect cpu id and rev. */ |
102 | exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID); |
103 | exynos_cpu_rev = exynos_cpu_id & 0xFF; |
104 | |
105 | pr_info("Samsung CPU ID: 0x%08lx\n" , exynos_cpu_id); |
106 | |
107 | } |
108 | |
109 | /* |
110 | * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code |
111 | * and suspend. |
112 | * |
113 | * This is necessary only on Exynos4 SoCs. When system is running |
114 | * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down |
115 | * feature could properly detect global idle state when secondary CPU is |
116 | * powered down. |
117 | * |
118 | * However this should not be set when such system is going into suspend. |
119 | */ |
120 | void exynos_set_delayed_reset_assertion(bool enable) |
121 | { |
122 | if (of_machine_is_compatible(compat: "samsung,exynos4" )) { |
123 | unsigned int tmp, core_id; |
124 | |
125 | for (core_id = 0; core_id < num_possible_cpus(); core_id++) { |
126 | tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id)); |
127 | if (enable) |
128 | tmp |= S5P_USE_DELAYED_RESET_ASSERTION; |
129 | else |
130 | tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION); |
131 | pmu_raw_writel(val: tmp, EXYNOS_ARM_CORE_OPTION(core_id)); |
132 | } |
133 | } |
134 | } |
135 | |
136 | /* |
137 | * Apparently, these SoCs are not able to wake-up from suspend using |
138 | * the PMU. Too bad. Should they suddenly become capable of such a |
139 | * feat, the matches below should be moved to suspend.c. |
140 | */ |
141 | static const struct of_device_id exynos_dt_pmu_match[] = { |
142 | { .compatible = "samsung,exynos5260-pmu" }, |
143 | { .compatible = "samsung,exynos5410-pmu" }, |
144 | { /*sentinel*/ }, |
145 | }; |
146 | |
147 | static void exynos_map_pmu(void) |
148 | { |
149 | struct device_node *np; |
150 | |
151 | np = of_find_matching_node(NULL, matches: exynos_dt_pmu_match); |
152 | if (np) |
153 | pmu_base_addr = of_iomap(node: np, index: 0); |
154 | of_node_put(node: np); |
155 | } |
156 | |
157 | static void __init exynos_init_irq(void) |
158 | { |
159 | irqchip_init(); |
160 | /* |
161 | * Since platsmp.c needs pmu base address by the time |
162 | * DT is not unflatten so we can't use DT APIs before |
163 | * init_irq |
164 | */ |
165 | exynos_map_pmu(); |
166 | } |
167 | |
168 | static void __init exynos_dt_machine_init(void) |
169 | { |
170 | /* |
171 | * This is called from smp_prepare_cpus if we've built for SMP, but |
172 | * we still need to set it up for PM and firmware ops if not. |
173 | */ |
174 | if (!IS_ENABLED(CONFIG_SMP)) |
175 | exynos_sysram_init(); |
176 | |
177 | #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE) |
178 | if (of_machine_is_compatible("samsung,exynos4210" ) || |
179 | of_machine_is_compatible("samsung,exynos3250" )) |
180 | exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data; |
181 | #endif |
182 | if (of_machine_is_compatible(compat: "samsung,exynos4210" ) || |
183 | of_machine_is_compatible(compat: "samsung,exynos4212" ) || |
184 | (of_machine_is_compatible(compat: "samsung,exynos4412" ) && |
185 | (of_machine_is_compatible(compat: "samsung,trats2" ) || |
186 | of_machine_is_compatible(compat: "samsung,midas" ) || |
187 | of_machine_is_compatible(compat: "samsung,p4note" ))) || |
188 | of_machine_is_compatible(compat: "samsung,exynos3250" ) || |
189 | of_machine_is_compatible(compat: "samsung,exynos5250" )) |
190 | platform_device_register(&exynos_cpuidle); |
191 | } |
192 | |
193 | static char const *const exynos_dt_compat[] __initconst = { |
194 | "samsung,exynos3" , |
195 | "samsung,exynos3250" , |
196 | "samsung,exynos4" , |
197 | "samsung,exynos4210" , |
198 | "samsung,exynos4212" , |
199 | "samsung,exynos4412" , |
200 | "samsung,exynos5" , |
201 | "samsung,exynos5250" , |
202 | "samsung,exynos5260" , |
203 | "samsung,exynos5420" , |
204 | NULL |
205 | }; |
206 | |
207 | static void __init exynos_dt_fixup(void) |
208 | { |
209 | /* |
210 | * Some versions of uboot pass garbage entries in the memory node, |
211 | * use the old CONFIG_ARM_NR_BANKS |
212 | */ |
213 | of_fdt_limit_memory(limit: 8); |
214 | } |
215 | |
216 | DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)" ) |
217 | .l2c_aux_val = 0x08400000, |
218 | .l2c_aux_mask = 0xf60fffff, |
219 | .smp = smp_ops(exynos_smp_ops), |
220 | .map_io = exynos_init_io, |
221 | .init_early = exynos_firmware_init, |
222 | .init_irq = exynos_init_irq, |
223 | .init_machine = exynos_dt_machine_init, |
224 | .init_late = exynos_pm_init, |
225 | .dt_compat = exynos_dt_compat, |
226 | .dt_fixup = exynos_dt_fixup, |
227 | MACHINE_END |
228 | |