1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Platform level USB initialization for FS USB OTG controller on omap1 |
4 | * |
5 | * Copyright (C) 2004 Texas Instruments, Inc. |
6 | */ |
7 | |
8 | #include <linux/module.h> |
9 | #include <linux/kernel.h> |
10 | #include <linux/init.h> |
11 | #include <linux/platform_device.h> |
12 | #include <linux/dma-map-ops.h> |
13 | #include <linux/io.h> |
14 | #include <linux/delay.h> |
15 | #include <linux/soc/ti/omap1-io.h> |
16 | |
17 | #include <asm/irq.h> |
18 | |
19 | #include "hardware.h" |
20 | #include "mux.h" |
21 | #include "usb.h" |
22 | #include "common.h" |
23 | |
24 | /* These routines should handle the standard chip-specific modes |
25 | * for usb0/1/2 ports, covering basic mux and transceiver setup. |
26 | * |
27 | * Some board-*.c files will need to set up additional mux options, |
28 | * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup. |
29 | */ |
30 | |
31 | /* TESTED ON: |
32 | * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables |
33 | * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables |
34 | * - 5912 OSK UDC, with *nonstandard* A-to-A cable |
35 | * - 1510 Innovator UDC with bundled usb0 cable |
36 | * - 1510 Innovator OHCI with bundled usb1/usb2 cable |
37 | * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS |
38 | * - 1710 custom development board using alternate pin group |
39 | * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables |
40 | */ |
41 | |
42 | #define INT_USB_IRQ_GEN IH2_BASE + 20 |
43 | #define INT_USB_IRQ_NISO IH2_BASE + 30 |
44 | #define INT_USB_IRQ_ISO IH2_BASE + 29 |
45 | #define INT_USB_IRQ_HGEN INT_USB_HHC_1 |
46 | #define INT_USB_IRQ_OTG IH2_BASE + 8 |
47 | |
48 | #ifdef CONFIG_ARCH_OMAP_OTG |
49 | |
50 | static void __init |
51 | omap_otg_init(struct omap_usb_config *config) |
52 | { |
53 | u32 syscon; |
54 | int alt_pingroup = 0; |
55 | u16 w; |
56 | |
57 | /* NOTE: no bus or clock setup (yet?) */ |
58 | |
59 | syscon = omap_readl(OTG_SYSCON_1) & 0xffff; |
60 | if (!(syscon & OTG_RESET_DONE)) |
61 | pr_debug("USB resets not complete?\n" ); |
62 | |
63 | //omap_writew(0, OTG_IRQ_EN); |
64 | |
65 | /* pin muxing and transceiver pinouts */ |
66 | if (config->pins[0] > 2) /* alt pingroup 2 */ |
67 | alt_pingroup = 1; |
68 | syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); |
69 | syscon |= config->usb1_init(config->pins[1]); |
70 | syscon |= config->usb2_init(config->pins[2], alt_pingroup); |
71 | pr_debug("OTG_SYSCON_1 = %08x\n" , omap_readl(OTG_SYSCON_1)); |
72 | omap_writel(syscon, OTG_SYSCON_1); |
73 | |
74 | syscon = config->hmc_mode; |
75 | syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; |
76 | #ifdef CONFIG_USB_OTG |
77 | if (config->otg) |
78 | syscon |= OTG_EN; |
79 | #endif |
80 | pr_debug("USB_TRANSCEIVER_CTRL = %03x\n" , |
81 | omap_readl(USB_TRANSCEIVER_CTRL)); |
82 | pr_debug("OTG_SYSCON_2 = %08x\n" , omap_readl(OTG_SYSCON_2)); |
83 | omap_writel(syscon, OTG_SYSCON_2); |
84 | |
85 | printk("USB: hmc %d" , config->hmc_mode); |
86 | if (!alt_pingroup) |
87 | pr_cont(", usb2 alt %d wires" , config->pins[2]); |
88 | else if (config->pins[0]) |
89 | pr_cont(", usb0 %d wires%s" , config->pins[0], |
90 | is_usb0_device(config) ? " (dev)" : "" ); |
91 | if (config->pins[1]) |
92 | pr_cont(", usb1 %d wires" , config->pins[1]); |
93 | if (!alt_pingroup && config->pins[2]) |
94 | pr_cont(", usb2 %d wires" , config->pins[2]); |
95 | if (config->otg) |
96 | pr_cont(", Mini-AB on usb%d" , config->otg - 1); |
97 | pr_cont("\n" ); |
98 | |
99 | /* leave USB clocks/controllers off until needed */ |
100 | w = omap_readw(ULPD_SOFT_REQ); |
101 | w &= ~SOFT_USB_CLK_REQ; |
102 | omap_writew(w, ULPD_SOFT_REQ); |
103 | |
104 | w = omap_readw(ULPD_CLOCK_CTRL); |
105 | w &= ~USB_MCLK_EN; |
106 | w |= DIS_USB_PVCI_CLK; |
107 | omap_writew(w, ULPD_CLOCK_CTRL); |
108 | |
109 | syscon = omap_readl(OTG_SYSCON_1); |
110 | syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; |
111 | |
112 | #if IS_ENABLED(CONFIG_USB_OMAP) |
113 | if (config->otg || config->register_dev) { |
114 | struct platform_device *udc_device = config->udc_device; |
115 | int status; |
116 | |
117 | syscon &= ~DEV_IDLE_EN; |
118 | udc_device->dev.platform_data = config; |
119 | status = platform_device_register(udc_device); |
120 | if (status) |
121 | pr_debug("can't register UDC device, %d\n" , status); |
122 | } |
123 | #endif |
124 | |
125 | #if IS_ENABLED(CONFIG_USB_OHCI_HCD) |
126 | if (config->otg || config->register_host) { |
127 | struct platform_device *ohci_device = config->ohci_device; |
128 | int status; |
129 | |
130 | syscon &= ~HST_IDLE_EN; |
131 | ohci_device->dev.platform_data = config; |
132 | status = platform_device_register(ohci_device); |
133 | if (status) |
134 | pr_debug("can't register OHCI device, %d\n" , status); |
135 | } |
136 | #endif |
137 | |
138 | #ifdef CONFIG_USB_OTG |
139 | if (config->otg) { |
140 | struct platform_device *otg_device = config->otg_device; |
141 | int status; |
142 | |
143 | syscon &= ~OTG_IDLE_EN; |
144 | otg_device->dev.platform_data = config; |
145 | status = platform_device_register(otg_device); |
146 | if (status) |
147 | pr_debug("can't register OTG device, %d\n" , status); |
148 | } |
149 | #endif |
150 | pr_debug("OTG_SYSCON_1 = %08x\n" , omap_readl(OTG_SYSCON_1)); |
151 | omap_writel(syscon, OTG_SYSCON_1); |
152 | } |
153 | |
154 | #else |
155 | static void omap_otg_init(struct omap_usb_config *config) {} |
156 | #endif |
157 | |
158 | #if IS_ENABLED(CONFIG_USB_OMAP) |
159 | |
160 | static struct resource udc_resources[] = { |
161 | /* order is significant! */ |
162 | { /* registers */ |
163 | .start = UDC_BASE, |
164 | .end = UDC_BASE + 0xff, |
165 | .flags = IORESOURCE_MEM, |
166 | }, { /* general IRQ */ |
167 | .start = INT_USB_IRQ_GEN, |
168 | .flags = IORESOURCE_IRQ, |
169 | }, { /* PIO IRQ */ |
170 | .start = INT_USB_IRQ_NISO, |
171 | .flags = IORESOURCE_IRQ, |
172 | }, { /* SOF IRQ */ |
173 | .start = INT_USB_IRQ_ISO, |
174 | .flags = IORESOURCE_IRQ, |
175 | }, |
176 | }; |
177 | |
178 | static u64 udc_dmamask = ~(u32)0; |
179 | |
180 | static struct platform_device udc_device = { |
181 | .name = "omap_udc" , |
182 | .id = -1, |
183 | .dev = { |
184 | .dma_mask = &udc_dmamask, |
185 | .coherent_dma_mask = 0xffffffff, |
186 | }, |
187 | .num_resources = ARRAY_SIZE(udc_resources), |
188 | .resource = udc_resources, |
189 | }; |
190 | |
191 | static inline void udc_device_init(struct omap_usb_config *pdata) |
192 | { |
193 | pdata->udc_device = &udc_device; |
194 | } |
195 | |
196 | #else |
197 | |
198 | static inline void udc_device_init(struct omap_usb_config *pdata) |
199 | { |
200 | } |
201 | |
202 | #endif |
203 | |
204 | /* The dmamask must be set for OHCI to work */ |
205 | static u64 ohci_dmamask = ~(u32)0; |
206 | |
207 | static struct resource ohci_resources[] = { |
208 | { |
209 | .start = OMAP_OHCI_BASE, |
210 | .end = OMAP_OHCI_BASE + 0xff, |
211 | .flags = IORESOURCE_MEM, |
212 | }, |
213 | { |
214 | .start = INT_USB_IRQ_HGEN, |
215 | .flags = IORESOURCE_IRQ, |
216 | }, |
217 | }; |
218 | |
219 | static struct platform_device ohci_device = { |
220 | .name = "ohci" , |
221 | .id = -1, |
222 | .dev = { |
223 | .dma_mask = &ohci_dmamask, |
224 | .coherent_dma_mask = 0xffffffff, |
225 | }, |
226 | .num_resources = ARRAY_SIZE(ohci_resources), |
227 | .resource = ohci_resources, |
228 | }; |
229 | |
230 | static inline void ohci_device_init(struct omap_usb_config *pdata) |
231 | { |
232 | if (!IS_ENABLED(CONFIG_USB_OHCI_HCD)) |
233 | return; |
234 | |
235 | pdata->ohci_device = &ohci_device; |
236 | pdata->ocpi_enable = &ocpi_enable; |
237 | } |
238 | |
239 | #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) |
240 | |
241 | static struct resource otg_resources[] = { |
242 | /* order is significant! */ |
243 | { |
244 | .start = OTG_BASE, |
245 | .end = OTG_BASE + 0xff, |
246 | .flags = IORESOURCE_MEM, |
247 | }, { |
248 | .start = INT_USB_IRQ_OTG, |
249 | .flags = IORESOURCE_IRQ, |
250 | }, |
251 | }; |
252 | |
253 | static struct platform_device otg_device = { |
254 | .name = "omap_otg" , |
255 | .id = -1, |
256 | .num_resources = ARRAY_SIZE(otg_resources), |
257 | .resource = otg_resources, |
258 | }; |
259 | |
260 | static inline void otg_device_init(struct omap_usb_config *pdata) |
261 | { |
262 | pdata->otg_device = &otg_device; |
263 | } |
264 | |
265 | #else |
266 | |
267 | static inline void otg_device_init(struct omap_usb_config *pdata) |
268 | { |
269 | } |
270 | |
271 | #endif |
272 | |
273 | static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) |
274 | { |
275 | u32 syscon1 = 0; |
276 | |
277 | if (nwires == 0) { |
278 | if (!cpu_is_omap15xx()) { |
279 | u32 l; |
280 | |
281 | /* pulldown D+/D- */ |
282 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
283 | l &= ~(3 << 1); |
284 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
285 | } |
286 | return 0; |
287 | } |
288 | |
289 | if (is_device) { |
290 | omap_cfg_reg(reg_cfg: W4_USB_PUEN); |
291 | } |
292 | |
293 | if (nwires == 2) { |
294 | u32 l; |
295 | |
296 | // omap_cfg_reg(P9_USB_DP); |
297 | // omap_cfg_reg(R8_USB_DM); |
298 | |
299 | if (cpu_is_omap15xx()) { |
300 | /* This works on 1510-Innovator */ |
301 | return 0; |
302 | } |
303 | |
304 | /* NOTES: |
305 | * - peripheral should configure VBUS detection! |
306 | * - only peripherals may use the internal D+/D- pulldowns |
307 | * - OTG support on this port not yet written |
308 | */ |
309 | |
310 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
311 | l &= ~(7 << 4); |
312 | if (!is_device) |
313 | l |= (3 << 1); |
314 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
315 | |
316 | return 3 << 16; |
317 | } |
318 | |
319 | /* alternate pin config, external transceiver */ |
320 | if (cpu_is_omap15xx()) { |
321 | printk(KERN_ERR "no usb0 alt pin config on 15xx\n" ); |
322 | return 0; |
323 | } |
324 | |
325 | omap_cfg_reg(reg_cfg: V6_USB0_TXD); |
326 | omap_cfg_reg(reg_cfg: W9_USB0_TXEN); |
327 | omap_cfg_reg(reg_cfg: W5_USB0_SE0); |
328 | if (nwires != 3) |
329 | omap_cfg_reg(reg_cfg: Y5_USB0_RCV); |
330 | |
331 | /* NOTE: SPEED and SUSP aren't configured here. OTG hosts |
332 | * may be able to use I2C requests to set those bits along |
333 | * with VBUS switching and overcurrent detection. |
334 | */ |
335 | |
336 | if (nwires != 6) { |
337 | u32 l; |
338 | |
339 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
340 | l &= ~CONF_USB2_UNI_R; |
341 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
342 | } |
343 | |
344 | switch (nwires) { |
345 | case 3: |
346 | syscon1 = 2; |
347 | break; |
348 | case 4: |
349 | syscon1 = 1; |
350 | break; |
351 | case 6: |
352 | syscon1 = 3; |
353 | { |
354 | u32 l; |
355 | |
356 | omap_cfg_reg(reg_cfg: AA9_USB0_VP); |
357 | omap_cfg_reg(reg_cfg: R9_USB0_VM); |
358 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
359 | l |= CONF_USB2_UNI_R; |
360 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
361 | } |
362 | break; |
363 | default: |
364 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n" , |
365 | 0, nwires); |
366 | } |
367 | |
368 | return syscon1 << 16; |
369 | } |
370 | |
371 | static u32 __init omap1_usb1_init(unsigned nwires) |
372 | { |
373 | u32 syscon1 = 0; |
374 | |
375 | if (!cpu_is_omap15xx() && nwires != 6) { |
376 | u32 l; |
377 | |
378 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
379 | l &= ~CONF_USB1_UNI_R; |
380 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
381 | } |
382 | if (nwires == 0) |
383 | return 0; |
384 | |
385 | /* external transceiver */ |
386 | omap_cfg_reg(reg_cfg: USB1_TXD); |
387 | omap_cfg_reg(reg_cfg: USB1_TXEN); |
388 | if (nwires != 3) |
389 | omap_cfg_reg(reg_cfg: USB1_RCV); |
390 | |
391 | if (cpu_is_omap15xx()) { |
392 | omap_cfg_reg(reg_cfg: USB1_SEO); |
393 | omap_cfg_reg(reg_cfg: USB1_SPEED); |
394 | // SUSP |
395 | } else if (cpu_is_omap1610() || cpu_is_omap5912()) { |
396 | omap_cfg_reg(reg_cfg: W13_1610_USB1_SE0); |
397 | omap_cfg_reg(reg_cfg: R13_1610_USB1_SPEED); |
398 | // SUSP |
399 | } else if (cpu_is_omap1710()) { |
400 | omap_cfg_reg(reg_cfg: R13_1710_USB1_SE0); |
401 | // SUSP |
402 | } else { |
403 | pr_debug("usb%d cpu unrecognized\n" , 1); |
404 | return 0; |
405 | } |
406 | |
407 | switch (nwires) { |
408 | case 2: |
409 | goto bad; |
410 | case 3: |
411 | syscon1 = 2; |
412 | break; |
413 | case 4: |
414 | syscon1 = 1; |
415 | break; |
416 | case 6: |
417 | syscon1 = 3; |
418 | omap_cfg_reg(reg_cfg: USB1_VP); |
419 | omap_cfg_reg(reg_cfg: USB1_VM); |
420 | if (!cpu_is_omap15xx()) { |
421 | u32 l; |
422 | |
423 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
424 | l |= CONF_USB1_UNI_R; |
425 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
426 | } |
427 | break; |
428 | default: |
429 | bad: |
430 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n" , |
431 | 1, nwires); |
432 | } |
433 | |
434 | return syscon1 << 20; |
435 | } |
436 | |
437 | static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) |
438 | { |
439 | u32 syscon1 = 0; |
440 | |
441 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ |
442 | if (alt_pingroup || nwires == 0) |
443 | return 0; |
444 | |
445 | if (!cpu_is_omap15xx() && nwires != 6) { |
446 | u32 l; |
447 | |
448 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
449 | l &= ~CONF_USB2_UNI_R; |
450 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
451 | } |
452 | |
453 | /* external transceiver */ |
454 | if (cpu_is_omap15xx()) { |
455 | omap_cfg_reg(reg_cfg: USB2_TXD); |
456 | omap_cfg_reg(reg_cfg: USB2_TXEN); |
457 | omap_cfg_reg(reg_cfg: USB2_SEO); |
458 | if (nwires != 3) |
459 | omap_cfg_reg(reg_cfg: USB2_RCV); |
460 | /* there is no USB2_SPEED */ |
461 | } else if (cpu_is_omap16xx()) { |
462 | omap_cfg_reg(reg_cfg: V6_USB2_TXD); |
463 | omap_cfg_reg(reg_cfg: W9_USB2_TXEN); |
464 | omap_cfg_reg(reg_cfg: W5_USB2_SE0); |
465 | if (nwires != 3) |
466 | omap_cfg_reg(reg_cfg: Y5_USB2_RCV); |
467 | // FIXME omap_cfg_reg(USB2_SPEED); |
468 | } else { |
469 | pr_debug("usb%d cpu unrecognized\n" , 1); |
470 | return 0; |
471 | } |
472 | |
473 | // omap_cfg_reg(USB2_SUSP); |
474 | |
475 | switch (nwires) { |
476 | case 2: |
477 | goto bad; |
478 | case 3: |
479 | syscon1 = 2; |
480 | break; |
481 | case 4: |
482 | syscon1 = 1; |
483 | break; |
484 | case 5: |
485 | goto bad; |
486 | case 6: |
487 | syscon1 = 3; |
488 | if (cpu_is_omap15xx()) { |
489 | omap_cfg_reg(reg_cfg: USB2_VP); |
490 | omap_cfg_reg(reg_cfg: USB2_VM); |
491 | } else { |
492 | u32 l; |
493 | |
494 | omap_cfg_reg(reg_cfg: AA9_USB2_VP); |
495 | omap_cfg_reg(reg_cfg: R9_USB2_VM); |
496 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
497 | l |= CONF_USB2_UNI_R; |
498 | omap_writel(v: l, USB_TRANSCEIVER_CTRL); |
499 | } |
500 | break; |
501 | default: |
502 | bad: |
503 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n" , |
504 | 2, nwires); |
505 | } |
506 | |
507 | return syscon1 << 24; |
508 | } |
509 | |
510 | #ifdef CONFIG_ARCH_OMAP15XX |
511 | /* OMAP-1510 OHCI has its own MMU for DMA */ |
512 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ |
513 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c |
514 | #define OMAP1510_LB_MMU_CTL 0xfffec208 |
515 | #define OMAP1510_LB_MMU_LCK 0xfffec224 |
516 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 |
517 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c |
518 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 |
519 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 |
520 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 |
521 | |
522 | /* |
523 | * Bus address is physical address, except for OMAP-1510 Local Bus. |
524 | * OMAP-1510 bus address is translated into a Local Bus address if the |
525 | * OMAP bus type is lbus. |
526 | */ |
527 | #define OMAP1510_LB_OFFSET UL(0x30000000) |
528 | |
529 | /* |
530 | * OMAP-1510 specific Local Bus clock on/off |
531 | */ |
532 | static int omap_1510_local_bus_power(int on) |
533 | { |
534 | if (on) { |
535 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); |
536 | udelay(200); |
537 | } else { |
538 | omap_writel(0, OMAP1510_LB_MMU_CTL); |
539 | } |
540 | |
541 | return 0; |
542 | } |
543 | |
544 | /* |
545 | * OMAP-1510 specific Local Bus initialization |
546 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. |
547 | * See also arch/mach-omap/memory.h for __virt_to_dma() and |
548 | * __dma_to_virt() which need to match with the physical |
549 | * Local Bus address below. |
550 | */ |
551 | static int omap_1510_local_bus_init(void) |
552 | { |
553 | unsigned int tlb; |
554 | unsigned long lbaddr, physaddr; |
555 | |
556 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, |
557 | OMAP1510_LB_CLOCK_DIV); |
558 | |
559 | /* Configure the Local Bus MMU table */ |
560 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { |
561 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; |
562 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; |
563 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); |
564 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, |
565 | OMAP1510_LB_MMU_CAM_L); |
566 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); |
567 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); |
568 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); |
569 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); |
570 | } |
571 | |
572 | /* Enable the walking table */ |
573 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); |
574 | udelay(200); |
575 | |
576 | return 0; |
577 | } |
578 | |
579 | static void omap_1510_local_bus_reset(void) |
580 | { |
581 | omap_1510_local_bus_power(1); |
582 | omap_1510_local_bus_init(); |
583 | } |
584 | |
585 | /* ULPD_DPLL_CTRL */ |
586 | #define DPLL_IOB (1 << 13) |
587 | #define DPLL_PLL_ENABLE (1 << 4) |
588 | #define DPLL_LOCK (1 << 0) |
589 | |
590 | /* ULPD_APLL_CTRL */ |
591 | #define APLL_NDPLL_SWITCH (1 << 0) |
592 | |
593 | static void __init omap_1510_usb_init(struct omap_usb_config *config) |
594 | { |
595 | unsigned int val; |
596 | u16 w; |
597 | |
598 | config->usb0_init(config->pins[0], is_usb0_device(config)); |
599 | config->usb1_init(config->pins[1]); |
600 | config->usb2_init(config->pins[2], 0); |
601 | |
602 | val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1); |
603 | val |= (config->hmc_mode << 1); |
604 | omap_writel(val, MOD_CONF_CTRL_0); |
605 | |
606 | printk("USB: hmc %d" , config->hmc_mode); |
607 | if (config->pins[0]) |
608 | pr_cont(", usb0 %d wires%s" , config->pins[0], |
609 | is_usb0_device(config) ? " (dev)" : "" ); |
610 | if (config->pins[1]) |
611 | pr_cont(", usb1 %d wires" , config->pins[1]); |
612 | if (config->pins[2]) |
613 | pr_cont(", usb2 %d wires" , config->pins[2]); |
614 | pr_cont("\n" ); |
615 | |
616 | /* use DPLL for 48 MHz function clock */ |
617 | pr_debug("APLL %04x DPLL %04x REQ %04x\n" , omap_readw(ULPD_APLL_CTRL), |
618 | omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ)); |
619 | |
620 | w = omap_readw(ULPD_APLL_CTRL); |
621 | w &= ~APLL_NDPLL_SWITCH; |
622 | omap_writew(w, ULPD_APLL_CTRL); |
623 | |
624 | w = omap_readw(ULPD_DPLL_CTRL); |
625 | w |= DPLL_IOB | DPLL_PLL_ENABLE; |
626 | omap_writew(w, ULPD_DPLL_CTRL); |
627 | |
628 | w = omap_readw(ULPD_SOFT_REQ); |
629 | w |= SOFT_UDC_REQ | SOFT_DPLL_REQ; |
630 | omap_writew(w, ULPD_SOFT_REQ); |
631 | |
632 | while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK)) |
633 | cpu_relax(); |
634 | |
635 | #if IS_ENABLED(CONFIG_USB_OMAP) |
636 | if (config->register_dev) { |
637 | int status; |
638 | |
639 | udc_device.dev.platform_data = config; |
640 | status = platform_device_register(&udc_device); |
641 | if (status) |
642 | pr_debug("can't register UDC device, %d\n" , status); |
643 | /* udc driver gates 48MHz by D+ pullup */ |
644 | } |
645 | #endif |
646 | |
647 | if (IS_ENABLED(CONFIG_USB_OHCI_HCD) && config->register_host) { |
648 | int status; |
649 | |
650 | ohci_device.dev.platform_data = config; |
651 | dma_direct_set_offset(&ohci_device.dev, PHYS_OFFSET, |
652 | OMAP1510_LB_OFFSET, (u64)-1); |
653 | status = platform_device_register(&ohci_device); |
654 | if (status) |
655 | pr_debug("can't register OHCI device, %d\n" , status); |
656 | /* hcd explicitly gates 48MHz */ |
657 | |
658 | config->lb_reset = omap_1510_local_bus_reset; |
659 | } |
660 | } |
661 | |
662 | #else |
663 | static inline void omap_1510_usb_init(struct omap_usb_config *config) {} |
664 | #endif |
665 | |
666 | void __init omap1_usb_init(struct omap_usb_config *_pdata) |
667 | { |
668 | struct omap_usb_config *pdata; |
669 | |
670 | pdata = kmemdup(p: _pdata, size: sizeof(*pdata), GFP_KERNEL); |
671 | if (!pdata) |
672 | return; |
673 | |
674 | pdata->usb0_init = omap1_usb0_init; |
675 | pdata->usb1_init = omap1_usb1_init; |
676 | pdata->usb2_init = omap1_usb2_init; |
677 | udc_device_init(pdata); |
678 | ohci_device_init(pdata); |
679 | otg_device_init(pdata); |
680 | |
681 | if (cpu_is_omap16xx()) |
682 | omap_otg_init(config: pdata); |
683 | else if (cpu_is_omap15xx()) |
684 | omap_1510_usb_init(config: pdata); |
685 | else |
686 | printk(KERN_ERR "USB: No init for your chip yet\n" ); |
687 | } |
688 | |