| 1 | // SPDX-License-Identifier: GPL-2.0-only |
|---|---|
| 2 | /* |
| 3 | * OMAP2-specific DPLL control functions |
| 4 | * |
| 5 | * Copyright (C) 2011 Nokia Corporation |
| 6 | * Paul Walmsley |
| 7 | */ |
| 8 | |
| 9 | #include <linux/kernel.h> |
| 10 | #include <linux/errno.h> |
| 11 | #include <linux/clk.h> |
| 12 | #include <linux/io.h> |
| 13 | |
| 14 | #include "clock.h" |
| 15 | #include "cm2xxx.h" |
| 16 | #include "cm-regbits-24xx.h" |
| 17 | |
| 18 | /* Private functions */ |
| 19 | |
| 20 | /** |
| 21 | * _allow_idle - enable DPLL autoidle bits |
| 22 | * @clk: struct clk * of the DPLL to operate on |
| 23 | * |
| 24 | * Enable DPLL automatic idle control. The DPLL will enter low-power |
| 25 | * stop when its downstream clocks are gated. No return value. |
| 26 | * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1 |
| 27 | * instead. Add some mechanism to optionally enter this mode. |
| 28 | */ |
| 29 | static void _allow_idle(struct clk_hw_omap *clk) |
| 30 | { |
| 31 | if (!clk || !clk->dpll_data) |
| 32 | return; |
| 33 | |
| 34 | omap2xxx_cm_set_dpll_auto_low_power_stop(); |
| 35 | } |
| 36 | |
| 37 | /** |
| 38 | * _deny_idle - prevent DPLL from automatically idling |
| 39 | * @clk: struct clk * of the DPLL to operate on |
| 40 | * |
| 41 | * Disable DPLL automatic idle control. No return value. |
| 42 | */ |
| 43 | static void _deny_idle(struct clk_hw_omap *clk) |
| 44 | { |
| 45 | if (!clk || !clk->dpll_data) |
| 46 | return; |
| 47 | |
| 48 | omap2xxx_cm_set_dpll_disable_autoidle(); |
| 49 | } |
| 50 | |
| 51 | |
| 52 | /* Public data */ |
| 53 | const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll = { |
| 54 | .allow_idle = _allow_idle, |
| 55 | .deny_idle = _deny_idle, |
| 56 | }; |
| 57 |