1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * arch/arm/mach-orion5x/irq.c |
4 | * |
5 | * Core IRQ functions for Marvell Orion System On Chip |
6 | * |
7 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> |
8 | */ |
9 | #include <linux/gpio.h> |
10 | #include <linux/kernel.h> |
11 | #include <linux/irq.h> |
12 | #include <linux/io.h> |
13 | #include <plat/orion-gpio.h> |
14 | #include <plat/irq.h> |
15 | #include <asm/exception.h> |
16 | #include "bridge-regs.h" |
17 | #include "common.h" |
18 | |
19 | static int __initdata gpio0_irqs[4] = { |
20 | IRQ_ORION5X_GPIO_0_7, |
21 | IRQ_ORION5X_GPIO_8_15, |
22 | IRQ_ORION5X_GPIO_16_23, |
23 | IRQ_ORION5X_GPIO_24_31, |
24 | }; |
25 | |
26 | static asmlinkage void |
27 | __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) |
28 | { |
29 | u32 stat; |
30 | |
31 | stat = readl_relaxed(MAIN_IRQ_CAUSE); |
32 | stat &= readl_relaxed(MAIN_IRQ_MASK); |
33 | if (stat) { |
34 | unsigned int hwirq = 1 + __fls(stat); |
35 | handle_IRQ(hwirq, regs); |
36 | return; |
37 | } |
38 | } |
39 | |
40 | void __init orion5x_init_irq(void) |
41 | { |
42 | orion_irq_init(1, MAIN_IRQ_MASK); |
43 | |
44 | set_handle_irq(orion5x_legacy_handle_irq); |
45 | |
46 | /* |
47 | * Initialize gpiolib for GPIOs 0-31. |
48 | */ |
49 | orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, |
50 | IRQ_ORION5X_GPIO_START, gpio0_irqs); |
51 | } |
52 | |