1 | /* SPDX-License-Identifier: GPL-2.0-only |
2 | * Copyright (C) 2020 Marvell. |
3 | */ |
4 | |
5 | #ifndef __OTX2_CPT_ALGS_H |
6 | #define __OTX2_CPT_ALGS_H |
7 | |
8 | #include <crypto/hash.h> |
9 | #include <crypto/skcipher.h> |
10 | #include <crypto/aead.h> |
11 | #include "otx2_cpt_common.h" |
12 | #include "cn10k_cpt.h" |
13 | |
14 | #define OTX2_CPT_MAX_ENC_KEY_SIZE 32 |
15 | #define OTX2_CPT_MAX_HASH_KEY_SIZE 64 |
16 | #define OTX2_CPT_MAX_KEY_SIZE (OTX2_CPT_MAX_ENC_KEY_SIZE + \ |
17 | OTX2_CPT_MAX_HASH_KEY_SIZE) |
18 | enum otx2_cpt_request_type { |
19 | OTX2_CPT_ENC_DEC_REQ = 0x1, |
20 | OTX2_CPT_AEAD_ENC_DEC_REQ = 0x2, |
21 | OTX2_CPT_AEAD_ENC_DEC_NULL_REQ = 0x3, |
22 | OTX2_CPT_PASSTHROUGH_REQ = 0x4 |
23 | }; |
24 | |
25 | enum otx2_cpt_major_opcodes { |
26 | OTX2_CPT_MAJOR_OP_MISC = 0x01, |
27 | OTX2_CPT_MAJOR_OP_FC = 0x33, |
28 | OTX2_CPT_MAJOR_OP_HMAC = 0x35, |
29 | }; |
30 | |
31 | enum otx2_cpt_cipher_type { |
32 | OTX2_CPT_CIPHER_NULL = 0x0, |
33 | OTX2_CPT_DES3_CBC = 0x1, |
34 | OTX2_CPT_DES3_ECB = 0x2, |
35 | OTX2_CPT_AES_CBC = 0x3, |
36 | OTX2_CPT_AES_ECB = 0x4, |
37 | OTX2_CPT_AES_CFB = 0x5, |
38 | OTX2_CPT_AES_CTR = 0x6, |
39 | OTX2_CPT_AES_GCM = 0x7, |
40 | OTX2_CPT_AES_XTS = 0x8 |
41 | }; |
42 | |
43 | enum otx2_cpt_mac_type { |
44 | OTX2_CPT_MAC_NULL = 0x0, |
45 | OTX2_CPT_MD5 = 0x1, |
46 | OTX2_CPT_SHA1 = 0x2, |
47 | OTX2_CPT_SHA224 = 0x3, |
48 | OTX2_CPT_SHA256 = 0x4, |
49 | OTX2_CPT_SHA384 = 0x5, |
50 | OTX2_CPT_SHA512 = 0x6, |
51 | OTX2_CPT_GMAC = 0x7 |
52 | }; |
53 | |
54 | enum otx2_cpt_aes_key_len { |
55 | OTX2_CPT_AES_128_BIT = 0x1, |
56 | OTX2_CPT_AES_192_BIT = 0x2, |
57 | OTX2_CPT_AES_256_BIT = 0x3 |
58 | }; |
59 | |
60 | union otx2_cpt_encr_ctrl { |
61 | u64 u; |
62 | struct { |
63 | #if defined(__BIG_ENDIAN_BITFIELD) |
64 | u64 enc_cipher:4; |
65 | u64 reserved_59:1; |
66 | u64 aes_key:2; |
67 | u64 iv_source:1; |
68 | u64 mac_type:4; |
69 | u64 reserved_49_51:3; |
70 | u64 auth_input_type:1; |
71 | u64 mac_len:8; |
72 | u64 reserved_32_39:8; |
73 | u64 encr_offset:16; |
74 | u64 iv_offset:8; |
75 | u64 auth_offset:8; |
76 | #else |
77 | u64 auth_offset:8; |
78 | u64 iv_offset:8; |
79 | u64 encr_offset:16; |
80 | u64 reserved_32_39:8; |
81 | u64 mac_len:8; |
82 | u64 auth_input_type:1; |
83 | u64 reserved_49_51:3; |
84 | u64 mac_type:4; |
85 | u64 iv_source:1; |
86 | u64 aes_key:2; |
87 | u64 reserved_59:1; |
88 | u64 enc_cipher:4; |
89 | #endif |
90 | } e; |
91 | }; |
92 | |
93 | struct otx2_cpt_cipher { |
94 | const char *name; |
95 | u8 value; |
96 | }; |
97 | |
98 | struct otx2_cpt_fc_enc_ctx { |
99 | union otx2_cpt_encr_ctrl enc_ctrl; |
100 | u8 encr_key[32]; |
101 | u8 encr_iv[16]; |
102 | }; |
103 | |
104 | union otx2_cpt_fc_hmac_ctx { |
105 | struct { |
106 | u8 ipad[64]; |
107 | u8 opad[64]; |
108 | } e; |
109 | struct { |
110 | u8 hmac_calc[64]; /* HMAC calculated */ |
111 | u8 hmac_recv[64]; /* HMAC received */ |
112 | } s; |
113 | }; |
114 | |
115 | struct otx2_cpt_fc_ctx { |
116 | struct otx2_cpt_fc_enc_ctx enc; |
117 | union otx2_cpt_fc_hmac_ctx hmac; |
118 | }; |
119 | |
120 | struct otx2_cpt_enc_ctx { |
121 | u32 key_len; |
122 | u8 enc_key[OTX2_CPT_MAX_KEY_SIZE]; |
123 | u8 cipher_type; |
124 | u8 key_type; |
125 | u8 enc_align_len; |
126 | struct crypto_skcipher *fbk_cipher; |
127 | struct pci_dev *pdev; |
128 | struct cn10k_cpt_errata_ctx er_ctx; |
129 | }; |
130 | |
131 | union otx2_cpt_offset_ctrl { |
132 | u64 flags; |
133 | struct { |
134 | #if defined(__BIG_ENDIAN_BITFIELD) |
135 | u64 reserved:32; |
136 | u64 enc_data_offset:16; |
137 | u64 iv_offset:8; |
138 | u64 auth_offset:8; |
139 | #else |
140 | u64 auth_offset:8; |
141 | u64 iv_offset:8; |
142 | u64 enc_data_offset:16; |
143 | u64 reserved:32; |
144 | #endif |
145 | } e; |
146 | }; |
147 | |
148 | struct otx2_cpt_req_ctx { |
149 | struct otx2_cpt_req_info cpt_req; |
150 | union otx2_cpt_offset_ctrl ctrl_word; |
151 | struct otx2_cpt_fc_ctx fctx; |
152 | union { |
153 | struct skcipher_request sk_fbk_req; |
154 | struct aead_request fbk_req; |
155 | }; |
156 | }; |
157 | |
158 | struct otx2_cpt_sdesc { |
159 | struct shash_desc shash; |
160 | }; |
161 | |
162 | struct otx2_cpt_aead_ctx { |
163 | u8 key[OTX2_CPT_MAX_KEY_SIZE]; |
164 | struct crypto_shash *hashalg; |
165 | struct otx2_cpt_sdesc *sdesc; |
166 | struct crypto_aead *fbk_cipher; |
167 | struct cn10k_cpt_errata_ctx er_ctx; |
168 | struct pci_dev *pdev; |
169 | u8 *ipad; |
170 | u8 *opad; |
171 | u32 enc_key_len; |
172 | u32 auth_key_len; |
173 | u8 cipher_type; |
174 | u8 mac_type; |
175 | u8 key_type; |
176 | u8 is_trunc_hmac; |
177 | u8 enc_align_len; |
178 | }; |
179 | int otx2_cpt_crypto_init(struct pci_dev *pdev, struct module *mod, |
180 | int num_queues, int num_devices); |
181 | void otx2_cpt_crypto_exit(struct pci_dev *pdev, struct module *mod); |
182 | |
183 | #endif /* __OTX2_CPT_ALGS_H */ |
184 | |