1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | */ |
23 | |
24 | #ifndef __ATOMBIOS_CRTC_H__ |
25 | #define __ATOMBIOS_CRTC_H__ |
26 | |
27 | void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc, |
28 | struct drm_display_mode *mode, |
29 | struct drm_display_mode *adjusted_mode); |
30 | void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc); |
31 | void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock); |
32 | void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state); |
33 | void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state); |
34 | void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state); |
35 | void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev); |
36 | void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc, |
37 | struct drm_display_mode *mode); |
38 | void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, |
39 | u32 dispclk); |
40 | u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, |
41 | u32 freq, u8 clk_type, u8 clk_src); |
42 | void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, |
43 | u32 crtc_id, |
44 | int pll_id, |
45 | u32 encoder_mode, |
46 | u32 encoder_id, |
47 | u32 clock, |
48 | u32 ref_div, |
49 | u32 fb_div, |
50 | u32 frac_fb_div, |
51 | u32 post_div, |
52 | int bpc, |
53 | bool ss_enabled, |
54 | struct amdgpu_atom_ss *ss); |
55 | int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc, |
56 | struct drm_display_mode *mode); |
57 | void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc, |
58 | struct drm_display_mode *mode); |
59 | |
60 | #endif |
61 | |