1 | /* SPDX-License-Identifier: MIT */ |
2 | /* |
3 | * Copyright © 2022 Intel Corporation |
4 | */ |
5 | |
6 | #ifndef _INTEL_GSC_UC_H_ |
7 | #define _INTEL_GSC_UC_H_ |
8 | |
9 | #include "intel_uc_fw.h" |
10 | |
11 | struct drm_printer; |
12 | struct i915_vma; |
13 | struct intel_context; |
14 | struct i915_gsc_proxy_component; |
15 | |
16 | struct intel_gsc_uc { |
17 | /* Generic uC firmware management */ |
18 | struct intel_uc_fw fw; |
19 | |
20 | /* GSC-specific additions */ |
21 | |
22 | /* |
23 | * The GSC has 3 version numbers: |
24 | * - Release version (incremented with each build) |
25 | * - Security version (incremented on security fix) |
26 | * - Compatibility version (incremented on interface change) |
27 | * |
28 | * The one we care about to use the binary is the last one, so that's |
29 | * the one we save inside the intel_uc_fw structure. The other two |
30 | * versions are only used for debug/info purposes, so we save them here. |
31 | * |
32 | * Note that the release and security versions are available in the |
33 | * binary header, while the compatibility version must be queried after |
34 | * loading the binary. |
35 | */ |
36 | struct intel_uc_fw_ver release; |
37 | u32 security_version; |
38 | |
39 | struct i915_vma *local; /* private memory for GSC usage */ |
40 | void __iomem *local_vaddr; /* pointer to access the private memory */ |
41 | struct intel_context *ce; /* for submission to GSC FW via GSC engine */ |
42 | |
43 | /* for delayed load and proxy handling */ |
44 | struct workqueue_struct *wq; |
45 | struct work_struct work; |
46 | u32 gsc_work_actions; /* protected by gt->irq_lock */ |
47 | #define GSC_ACTION_FW_LOAD BIT(0) |
48 | #define GSC_ACTION_SW_PROXY BIT(1) |
49 | |
50 | struct { |
51 | struct i915_gsc_proxy_component *component; |
52 | bool component_added; |
53 | struct i915_vma *vma; |
54 | void *to_gsc; |
55 | void *to_csme; |
56 | struct mutex mutex; /* protects the tee channel binding */ |
57 | } proxy; |
58 | }; |
59 | |
60 | void intel_gsc_uc_init_early(struct intel_gsc_uc *gsc); |
61 | int intel_gsc_uc_init(struct intel_gsc_uc *gsc); |
62 | void intel_gsc_uc_fini(struct intel_gsc_uc *gsc); |
63 | void intel_gsc_uc_suspend(struct intel_gsc_uc *gsc); |
64 | void intel_gsc_uc_resume(struct intel_gsc_uc *gsc); |
65 | void intel_gsc_uc_flush_work(struct intel_gsc_uc *gsc); |
66 | void intel_gsc_uc_load_start(struct intel_gsc_uc *gsc); |
67 | void intel_gsc_uc_load_status(struct intel_gsc_uc *gsc, struct drm_printer *p); |
68 | |
69 | static inline bool intel_gsc_uc_is_supported(struct intel_gsc_uc *gsc) |
70 | { |
71 | return intel_uc_fw_is_supported(uc_fw: &gsc->fw); |
72 | } |
73 | |
74 | static inline bool intel_gsc_uc_is_wanted(struct intel_gsc_uc *gsc) |
75 | { |
76 | return intel_uc_fw_is_enabled(uc_fw: &gsc->fw); |
77 | } |
78 | |
79 | static inline bool intel_gsc_uc_is_used(struct intel_gsc_uc *gsc) |
80 | { |
81 | GEM_BUG_ON(__intel_uc_fw_status(&gsc->fw) == INTEL_UC_FIRMWARE_SELECTED); |
82 | return intel_uc_fw_is_available(uc_fw: &gsc->fw); |
83 | } |
84 | |
85 | #endif |
86 | |