1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (C) 2013 Red Hat |
4 | * Author: Rob Clark <robdclark@gmail.com> |
5 | */ |
6 | |
7 | /* For debugging crashes, userspace can: |
8 | * |
9 | * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd |
10 | * |
11 | * to log the cmdstream in a format that is understood by freedreno/cffdump |
12 | * utility. By comparing the last successfully completed fence #, to the |
13 | * cmdstream for the next fence, you can narrow down which process and submit |
14 | * caused the gpu crash/lockup. |
15 | * |
16 | * Additionally: |
17 | * |
18 | * tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd |
19 | * |
20 | * will capture just the cmdstream from submits which triggered a GPU hang. |
21 | * |
22 | * This bypasses drm_debugfs_create_files() mainly because we need to use |
23 | * our own fops for a bit more control. In particular, we don't want to |
24 | * do anything if userspace doesn't have the debugfs file open. |
25 | * |
26 | * The module-param "rd_full", which defaults to false, enables snapshotting |
27 | * all (non-written) buffers in the submit, rather than just cmdstream bo's. |
28 | * This is useful to capture the contents of (for example) vbo's or textures, |
29 | * or shader programs (if not emitted inline in cmdstream). |
30 | */ |
31 | |
32 | #include <linux/circ_buf.h> |
33 | #include <linux/debugfs.h> |
34 | #include <linux/kfifo.h> |
35 | #include <linux/uaccess.h> |
36 | #include <linux/wait.h> |
37 | |
38 | #include <drm/drm_file.h> |
39 | |
40 | #include "msm_drv.h" |
41 | #include "msm_gpu.h" |
42 | #include "msm_gem.h" |
43 | |
44 | bool rd_full = false; |
45 | MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents" ); |
46 | module_param_named(rd_full, rd_full, bool, 0600); |
47 | |
48 | #ifdef CONFIG_DEBUG_FS |
49 | |
50 | enum rd_sect_type { |
51 | RD_NONE, |
52 | RD_TEST, /* ascii text */ |
53 | RD_CMD, /* ascii text */ |
54 | RD_GPUADDR, /* u32 gpuaddr, u32 size */ |
55 | RD_CONTEXT, /* raw dump */ |
56 | RD_CMDSTREAM, /* raw dump */ |
57 | RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */ |
58 | RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */ |
59 | RD_FLUSH, /* empty, clear previous params */ |
60 | RD_PROGRAM, /* shader program, raw dump */ |
61 | RD_VERT_SHADER, |
62 | RD_FRAG_SHADER, |
63 | RD_BUFFER_CONTENTS, |
64 | RD_GPU_ID, |
65 | RD_CHIP_ID, |
66 | }; |
67 | |
68 | #define BUF_SZ 512 /* should be power of 2 */ |
69 | |
70 | /* space used: */ |
71 | #define circ_count(circ) \ |
72 | (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ)) |
73 | #define circ_count_to_end(circ) \ |
74 | (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ)) |
75 | /* space available: */ |
76 | #define circ_space(circ) \ |
77 | (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ)) |
78 | #define circ_space_to_end(circ) \ |
79 | (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ)) |
80 | |
81 | struct msm_rd_state { |
82 | struct drm_device *dev; |
83 | |
84 | bool open; |
85 | |
86 | /* fifo access is synchronized on the producer side by |
87 | * write_lock. And read_lock synchronizes the reads |
88 | */ |
89 | struct mutex read_lock, write_lock; |
90 | |
91 | wait_queue_head_t fifo_event; |
92 | struct circ_buf fifo; |
93 | |
94 | char buf[BUF_SZ]; |
95 | }; |
96 | |
97 | static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) |
98 | { |
99 | struct circ_buf *fifo = &rd->fifo; |
100 | const char *ptr = buf; |
101 | |
102 | while (sz > 0) { |
103 | char *fptr = &fifo->buf[fifo->head]; |
104 | int n; |
105 | |
106 | wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open); |
107 | if (!rd->open) |
108 | return; |
109 | |
110 | /* Note that smp_load_acquire() is not strictly required |
111 | * as CIRC_SPACE_TO_END() does not access the tail more |
112 | * than once. |
113 | */ |
114 | n = min(sz, circ_space_to_end(&rd->fifo)); |
115 | memcpy(fptr, ptr, n); |
116 | |
117 | smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1)); |
118 | sz -= n; |
119 | ptr += n; |
120 | |
121 | wake_up_all(&rd->fifo_event); |
122 | } |
123 | } |
124 | |
125 | static void rd_write_section(struct msm_rd_state *rd, |
126 | enum rd_sect_type type, const void *buf, int sz) |
127 | { |
128 | rd_write(rd, buf: &type, sz: 4); |
129 | rd_write(rd, buf: &sz, sz: 4); |
130 | rd_write(rd, buf, sz); |
131 | } |
132 | |
133 | static ssize_t rd_read(struct file *file, char __user *buf, |
134 | size_t sz, loff_t *ppos) |
135 | { |
136 | struct msm_rd_state *rd = file->private_data; |
137 | struct circ_buf *fifo = &rd->fifo; |
138 | const char *fptr = &fifo->buf[fifo->tail]; |
139 | int n = 0, ret = 0; |
140 | |
141 | mutex_lock(&rd->read_lock); |
142 | |
143 | ret = wait_event_interruptible(rd->fifo_event, |
144 | circ_count(&rd->fifo) > 0); |
145 | if (ret) |
146 | goto out; |
147 | |
148 | /* Note that smp_load_acquire() is not strictly required |
149 | * as CIRC_CNT_TO_END() does not access the head more than |
150 | * once. |
151 | */ |
152 | n = min_t(int, sz, circ_count_to_end(&rd->fifo)); |
153 | if (copy_to_user(to: buf, from: fptr, n)) { |
154 | ret = -EFAULT; |
155 | goto out; |
156 | } |
157 | |
158 | smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1)); |
159 | *ppos += n; |
160 | |
161 | wake_up_all(&rd->fifo_event); |
162 | |
163 | out: |
164 | mutex_unlock(lock: &rd->read_lock); |
165 | if (ret) |
166 | return ret; |
167 | return n; |
168 | } |
169 | |
170 | static int rd_open(struct inode *inode, struct file *file) |
171 | { |
172 | struct msm_rd_state *rd = inode->i_private; |
173 | struct drm_device *dev = rd->dev; |
174 | struct msm_drm_private *priv = dev->dev_private; |
175 | struct msm_gpu *gpu = priv->gpu; |
176 | uint64_t val; |
177 | uint32_t gpu_id; |
178 | uint32_t zero = 0; |
179 | int ret = 0; |
180 | |
181 | if (!gpu) |
182 | return -ENODEV; |
183 | |
184 | mutex_lock(&gpu->lock); |
185 | |
186 | if (rd->open) { |
187 | ret = -EBUSY; |
188 | goto out; |
189 | } |
190 | |
191 | file->private_data = rd; |
192 | rd->open = true; |
193 | |
194 | /* Reset fifo to clear any previously unread data: */ |
195 | rd->fifo.head = rd->fifo.tail = 0; |
196 | |
197 | /* the parsing tools need to know gpu-id to know which |
198 | * register database to load. |
199 | * |
200 | * Note: These particular params do not require a context |
201 | */ |
202 | gpu->funcs->get_param(gpu, NULL, MSM_PARAM_GPU_ID, &val, &zero); |
203 | gpu_id = val; |
204 | |
205 | rd_write_section(rd, type: RD_GPU_ID, buf: &gpu_id, sz: sizeof(gpu_id)); |
206 | |
207 | gpu->funcs->get_param(gpu, NULL, MSM_PARAM_CHIP_ID, &val, &zero); |
208 | rd_write_section(rd, type: RD_CHIP_ID, buf: &val, sz: sizeof(val)); |
209 | |
210 | out: |
211 | mutex_unlock(lock: &gpu->lock); |
212 | return ret; |
213 | } |
214 | |
215 | static int rd_release(struct inode *inode, struct file *file) |
216 | { |
217 | struct msm_rd_state *rd = inode->i_private; |
218 | |
219 | rd->open = false; |
220 | wake_up_all(&rd->fifo_event); |
221 | |
222 | return 0; |
223 | } |
224 | |
225 | |
226 | static const struct file_operations rd_debugfs_fops = { |
227 | .owner = THIS_MODULE, |
228 | .open = rd_open, |
229 | .read = rd_read, |
230 | .llseek = no_llseek, |
231 | .release = rd_release, |
232 | }; |
233 | |
234 | |
235 | static void rd_cleanup(struct msm_rd_state *rd) |
236 | { |
237 | if (!rd) |
238 | return; |
239 | |
240 | mutex_destroy(lock: &rd->read_lock); |
241 | mutex_destroy(lock: &rd->write_lock); |
242 | kfree(objp: rd); |
243 | } |
244 | |
245 | static struct msm_rd_state *rd_init(struct drm_minor *minor, const char *name) |
246 | { |
247 | struct msm_rd_state *rd; |
248 | |
249 | rd = kzalloc(size: sizeof(*rd), GFP_KERNEL); |
250 | if (!rd) |
251 | return ERR_PTR(error: -ENOMEM); |
252 | |
253 | rd->dev = minor->dev; |
254 | rd->fifo.buf = rd->buf; |
255 | |
256 | mutex_init(&rd->read_lock); |
257 | mutex_init(&rd->write_lock); |
258 | |
259 | init_waitqueue_head(&rd->fifo_event); |
260 | |
261 | debugfs_create_file(name, S_IFREG | S_IRUGO, parent: minor->debugfs_root, data: rd, |
262 | fops: &rd_debugfs_fops); |
263 | |
264 | return rd; |
265 | } |
266 | |
267 | int msm_rd_debugfs_init(struct drm_minor *minor) |
268 | { |
269 | struct msm_drm_private *priv = minor->dev->dev_private; |
270 | struct msm_rd_state *rd; |
271 | int ret; |
272 | |
273 | if (!priv->gpu_pdev) |
274 | return 0; |
275 | |
276 | /* only create on first minor: */ |
277 | if (priv->rd) |
278 | return 0; |
279 | |
280 | rd = rd_init(minor, name: "rd" ); |
281 | if (IS_ERR(ptr: rd)) { |
282 | ret = PTR_ERR(ptr: rd); |
283 | goto fail; |
284 | } |
285 | |
286 | priv->rd = rd; |
287 | |
288 | rd = rd_init(minor, name: "hangrd" ); |
289 | if (IS_ERR(ptr: rd)) { |
290 | ret = PTR_ERR(ptr: rd); |
291 | goto fail; |
292 | } |
293 | |
294 | priv->hangrd = rd; |
295 | |
296 | return 0; |
297 | |
298 | fail: |
299 | msm_rd_debugfs_cleanup(priv); |
300 | return ret; |
301 | } |
302 | |
303 | void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) |
304 | { |
305 | rd_cleanup(rd: priv->rd); |
306 | priv->rd = NULL; |
307 | |
308 | rd_cleanup(rd: priv->hangrd); |
309 | priv->hangrd = NULL; |
310 | } |
311 | |
312 | static void snapshot_buf(struct msm_rd_state *rd, |
313 | struct msm_gem_submit *submit, int idx, |
314 | uint64_t iova, uint32_t size, bool full) |
315 | { |
316 | struct drm_gem_object *obj = submit->bos[idx].obj; |
317 | unsigned offset = 0; |
318 | const char *buf; |
319 | |
320 | if (iova) { |
321 | offset = iova - submit->bos[idx].iova; |
322 | } else { |
323 | iova = submit->bos[idx].iova; |
324 | size = obj->size; |
325 | } |
326 | |
327 | /* |
328 | * Always write the GPUADDR header so can get a complete list of all the |
329 | * buffers in the cmd |
330 | */ |
331 | rd_write_section(rd, type: RD_GPUADDR, |
332 | buf: (uint32_t[3]){ iova, size, iova >> 32 }, sz: 12); |
333 | |
334 | if (!full) |
335 | return; |
336 | |
337 | /* But only dump the contents of buffers marked READ */ |
338 | if (!(submit->bos[idx].flags & MSM_SUBMIT_BO_READ)) |
339 | return; |
340 | |
341 | buf = msm_gem_get_vaddr_active(obj); |
342 | if (IS_ERR(ptr: buf)) |
343 | return; |
344 | |
345 | buf += offset; |
346 | |
347 | rd_write_section(rd, type: RD_BUFFER_CONTENTS, buf, sz: size); |
348 | |
349 | msm_gem_put_vaddr_locked(obj); |
350 | } |
351 | |
352 | /* called under gpu->lock */ |
353 | void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, |
354 | const char *fmt, ...) |
355 | { |
356 | struct task_struct *task; |
357 | char msg[256]; |
358 | int i, n; |
359 | |
360 | if (!rd->open) |
361 | return; |
362 | |
363 | mutex_lock(&rd->write_lock); |
364 | |
365 | if (fmt) { |
366 | va_list args; |
367 | |
368 | va_start(args, fmt); |
369 | n = vscnprintf(buf: msg, size: sizeof(msg), fmt, args); |
370 | va_end(args); |
371 | |
372 | rd_write_section(rd, type: RD_CMD, buf: msg, ALIGN(n, 4)); |
373 | } |
374 | |
375 | rcu_read_lock(); |
376 | task = pid_task(pid: submit->pid, PIDTYPE_PID); |
377 | if (task) { |
378 | n = scnprintf(buf: msg, size: sizeof(msg), fmt: "%.*s/%d: fence=%u" , |
379 | TASK_COMM_LEN, task->comm, |
380 | pid_nr(pid: submit->pid), submit->seqno); |
381 | } else { |
382 | n = scnprintf(buf: msg, size: sizeof(msg), fmt: "???/%d: fence=%u" , |
383 | pid_nr(pid: submit->pid), submit->seqno); |
384 | } |
385 | rcu_read_unlock(); |
386 | |
387 | rd_write_section(rd, type: RD_CMD, buf: msg, ALIGN(n, 4)); |
388 | |
389 | for (i = 0; i < submit->nr_bos; i++) |
390 | snapshot_buf(rd, submit, idx: i, iova: 0, size: 0, full: should_dump(submit, idx: i)); |
391 | |
392 | for (i = 0; i < submit->nr_cmds; i++) { |
393 | uint32_t szd = submit->cmd[i].size; /* in dwords */ |
394 | |
395 | /* snapshot cmdstream bo's (if we haven't already): */ |
396 | if (!should_dump(submit, idx: i)) { |
397 | snapshot_buf(rd, submit, idx: submit->cmd[i].idx, |
398 | iova: submit->cmd[i].iova, size: szd * 4, full: true); |
399 | } |
400 | } |
401 | |
402 | for (i = 0; i < submit->nr_cmds; i++) { |
403 | uint64_t iova = submit->cmd[i].iova; |
404 | uint32_t szd = submit->cmd[i].size; /* in dwords */ |
405 | |
406 | switch (submit->cmd[i].type) { |
407 | case MSM_SUBMIT_CMD_IB_TARGET_BUF: |
408 | /* ignore IB-targets, we've logged the buffer, the |
409 | * parser tool will follow the IB based on the logged |
410 | * buffer/gpuaddr, so nothing more to do. |
411 | */ |
412 | break; |
413 | case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: |
414 | case MSM_SUBMIT_CMD_BUF: |
415 | rd_write_section(rd, type: RD_CMDSTREAM_ADDR, |
416 | buf: (uint32_t[3]){ iova, szd, iova >> 32 }, sz: 12); |
417 | break; |
418 | } |
419 | } |
420 | |
421 | mutex_unlock(lock: &rd->write_lock); |
422 | } |
423 | #endif |
424 | |