1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Copyright (C) 2023 Linaro Ltd |
4 | */ |
5 | |
6 | #include <linux/soc/qcom/smd-rpm.h> |
7 | |
8 | #include "icc-rpm.h" |
9 | |
10 | const struct rpm_clk_resource aggre1_clk = { |
11 | .resource_type = QCOM_SMD_RPM_AGGR_CLK, |
12 | .clock_id = 1, |
13 | }; |
14 | EXPORT_SYMBOL_GPL(aggre1_clk); |
15 | |
16 | const struct rpm_clk_resource aggre2_clk = { |
17 | .resource_type = QCOM_SMD_RPM_AGGR_CLK, |
18 | .clock_id = 2, |
19 | }; |
20 | EXPORT_SYMBOL_GPL(aggre2_clk); |
21 | |
22 | const struct rpm_clk_resource bimc_clk = { |
23 | .resource_type = QCOM_SMD_RPM_MEM_CLK, |
24 | .clock_id = 0, |
25 | }; |
26 | EXPORT_SYMBOL_GPL(bimc_clk); |
27 | |
28 | const struct rpm_clk_resource mem_1_clk = { |
29 | .resource_type = QCOM_SMD_RPM_MEM_CLK, |
30 | .clock_id = 1, |
31 | }; |
32 | EXPORT_SYMBOL_GPL(mem_1_clk); |
33 | |
34 | const struct rpm_clk_resource bus_0_clk = { |
35 | .resource_type = QCOM_SMD_RPM_BUS_CLK, |
36 | .clock_id = 0, |
37 | }; |
38 | EXPORT_SYMBOL_GPL(bus_0_clk); |
39 | |
40 | const struct rpm_clk_resource bus_1_clk = { |
41 | .resource_type = QCOM_SMD_RPM_BUS_CLK, |
42 | .clock_id = 1, |
43 | }; |
44 | EXPORT_SYMBOL_GPL(bus_1_clk); |
45 | |
46 | const struct rpm_clk_resource bus_2_clk = { |
47 | .resource_type = QCOM_SMD_RPM_BUS_CLK, |
48 | .clock_id = 2, |
49 | }; |
50 | EXPORT_SYMBOL_GPL(bus_2_clk); |
51 | |
52 | const struct rpm_clk_resource mmaxi_0_clk = { |
53 | .resource_type = QCOM_SMD_RPM_MMAXI_CLK, |
54 | .clock_id = 0, |
55 | }; |
56 | EXPORT_SYMBOL_GPL(mmaxi_0_clk); |
57 | |
58 | const struct rpm_clk_resource mmaxi_1_clk = { |
59 | .resource_type = QCOM_SMD_RPM_MMAXI_CLK, |
60 | .clock_id = 1, |
61 | }; |
62 | EXPORT_SYMBOL_GPL(mmaxi_1_clk); |
63 | |
64 | const struct rpm_clk_resource qup_clk = { |
65 | .resource_type = QCOM_SMD_RPM_QUP_CLK, |
66 | .clock_id = 0, |
67 | }; |
68 | EXPORT_SYMBOL_GPL(qup_clk); |
69 | |
70 | /* Branch clocks */ |
71 | const struct rpm_clk_resource aggre1_branch_clk = { |
72 | .resource_type = QCOM_SMD_RPM_AGGR_CLK, |
73 | .clock_id = 1, |
74 | .branch = true, |
75 | }; |
76 | EXPORT_SYMBOL_GPL(aggre1_branch_clk); |
77 | |
78 | const struct rpm_clk_resource aggre2_branch_clk = { |
79 | .resource_type = QCOM_SMD_RPM_AGGR_CLK, |
80 | .clock_id = 2, |
81 | .branch = true, |
82 | }; |
83 | EXPORT_SYMBOL_GPL(aggre2_branch_clk); |
84 | |