| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * SM8450 interconnect IDs |
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| 4 | * |
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| 5 | * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. |
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| 6 | * Copyright (c) 2021, Linaro Limited |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef __DRIVERS_INTERCONNECT_QCOM_SM8450_H |
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| 10 | #define __DRIVERS_INTERCONNECT_QCOM_SM8450_H |
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| 11 | |
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| 12 | #define SM8450_MASTER_GPU_TCU 0 |
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| 13 | #define SM8450_MASTER_SYS_TCU 1 |
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| 14 | #define SM8450_MASTER_APPSS_PROC 2 |
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| 15 | #define SM8450_MASTER_LLCC 3 |
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| 16 | #define SM8450_MASTER_CNOC_LPASS_AG_NOC 4 |
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| 17 | #define SM8450_MASTER_GIC_AHB 5 |
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| 18 | #define SM8450_MASTER_CDSP_NOC_CFG 6 |
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| 19 | #define SM8450_MASTER_QDSS_BAM 7 |
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| 20 | #define SM8450_MASTER_QSPI_0 8 |
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| 21 | #define SM8450_MASTER_QUP_0 9 |
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| 22 | #define SM8450_MASTER_QUP_1 10 |
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| 23 | #define SM8450_MASTER_QUP_2 11 |
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| 24 | #define SM8450_MASTER_A1NOC_CFG 12 |
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| 25 | #define SM8450_MASTER_A2NOC_CFG 13 |
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| 26 | #define SM8450_MASTER_A1NOC_SNOC 14 |
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| 27 | #define SM8450_MASTER_A2NOC_SNOC 15 |
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| 28 | #define SM8450_MASTER_CAMNOC_HF 16 |
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| 29 | #define SM8450_MASTER_CAMNOC_ICP 17 |
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| 30 | #define SM8450_MASTER_CAMNOC_SF 18 |
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| 31 | #define SM8450_MASTER_GEM_NOC_CNOC 19 |
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| 32 | #define SM8450_MASTER_GEM_NOC_PCIE_SNOC 20 |
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| 33 | #define SM8450_MASTER_GFX3D 21 |
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| 34 | #define SM8450_MASTER_LPASS_ANOC 22 |
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| 35 | #define SM8450_MASTER_MDP 23 |
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| 36 | #define SM8450_MASTER_MDP0 SM8450_MASTER_MDP |
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| 37 | #define SM8450_MASTER_MDP1 SM8450_MASTER_MDP |
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| 38 | #define SM8450_MASTER_MSS_PROC 24 |
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| 39 | #define SM8450_MASTER_CNOC_MNOC_CFG 25 |
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| 40 | #define SM8450_MASTER_MNOC_HF_MEM_NOC 26 |
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| 41 | #define SM8450_MASTER_MNOC_SF_MEM_NOC 27 |
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| 42 | #define SM8450_MASTER_COMPUTE_NOC 28 |
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| 43 | #define SM8450_MASTER_ANOC_PCIE_GEM_NOC 29 |
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| 44 | #define SM8450_MASTER_PCIE_ANOC_CFG 30 |
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| 45 | #define SM8450_MASTER_ROTATOR 31 |
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| 46 | #define SM8450_MASTER_SNOC_CFG 32 |
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| 47 | #define SM8450_MASTER_SNOC_GC_MEM_NOC 33 |
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| 48 | #define SM8450_MASTER_SNOC_SF_MEM_NOC 34 |
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| 49 | #define SM8450_MASTER_CDSP_HCP 35 |
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| 50 | #define SM8450_MASTER_VIDEO 36 |
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| 51 | #define SM8450_MASTER_VIDEO_P0 SM8450_MASTER_VIDEO |
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| 52 | #define SM8450_MASTER_VIDEO_P1 SM8450_MASTER_VIDEO |
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| 53 | #define SM8450_MASTER_VIDEO_CV_PROC 37 |
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| 54 | #define SM8450_MASTER_VIDEO_PROC 38 |
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| 55 | #define SM8450_MASTER_VIDEO_V_PROC 39 |
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| 56 | #define SM8450_MASTER_QUP_CORE_0 40 |
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| 57 | #define SM8450_MASTER_QUP_CORE_1 41 |
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| 58 | #define SM8450_MASTER_QUP_CORE_2 42 |
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| 59 | #define SM8450_MASTER_CRYPTO 43 |
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| 60 | #define SM8450_MASTER_IPA 44 |
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| 61 | #define SM8450_MASTER_LPASS_PROC 45 |
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| 62 | #define SM8450_MASTER_CDSP_PROC 46 |
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| 63 | #define SM8450_MASTER_PIMEM 47 |
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| 64 | #define SM8450_MASTER_SENSORS_PROC 48 |
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| 65 | #define SM8450_MASTER_SP 49 |
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| 66 | #define SM8450_MASTER_GIC 50 |
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| 67 | #define SM8450_MASTER_PCIE_0 51 |
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| 68 | #define SM8450_MASTER_PCIE_1 52 |
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| 69 | #define SM8450_MASTER_QDSS_ETR 53 |
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| 70 | #define SM8450_MASTER_QDSS_ETR_1 54 |
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| 71 | #define SM8450_MASTER_SDCC_2 55 |
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| 72 | #define SM8450_MASTER_SDCC_4 56 |
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| 73 | #define SM8450_MASTER_UFS_MEM 57 |
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| 74 | #define SM8450_MASTER_USB3_0 58 |
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| 75 | #define SM8450_SLAVE_EBI1 512 |
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| 76 | #define SM8450_SLAVE_AHB2PHY_SOUTH 513 |
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| 77 | #define SM8450_SLAVE_AHB2PHY_NORTH 514 |
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| 78 | #define SM8450_SLAVE_AOSS 515 |
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| 79 | #define SM8450_SLAVE_CAMERA_CFG 516 |
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| 80 | #define SM8450_SLAVE_CLK_CTL 517 |
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| 81 | #define SM8450_SLAVE_CDSP_CFG 518 |
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| 82 | #define SM8450_SLAVE_RBCPR_CX_CFG 519 |
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| 83 | #define SM8450_SLAVE_RBCPR_MMCX_CFG 520 |
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| 84 | #define SM8450_SLAVE_RBCPR_MXA_CFG 521 |
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| 85 | #define SM8450_SLAVE_RBCPR_MXC_CFG 522 |
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| 86 | #define SM8450_SLAVE_CRYPTO_0_CFG 523 |
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| 87 | #define SM8450_SLAVE_CX_RDPM 524 |
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| 88 | #define SM8450_SLAVE_DISPLAY_CFG 525 |
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| 89 | #define SM8450_SLAVE_GFX3D_CFG 526 |
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| 90 | #define SM8450_SLAVE_IMEM_CFG 527 |
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| 91 | #define SM8450_SLAVE_IPA_CFG 528 |
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| 92 | #define SM8450_SLAVE_IPC_ROUTER_CFG 529 |
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| 93 | #define SM8450_SLAVE_LPASS 530 |
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| 94 | #define SM8450_SLAVE_LPASS_CORE_CFG 531 |
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| 95 | #define SM8450_SLAVE_LPASS_LPI_CFG 532 |
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| 96 | #define SM8450_SLAVE_LPASS_MPU_CFG 533 |
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| 97 | #define SM8450_SLAVE_LPASS_TOP_CFG 534 |
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| 98 | #define SM8450_SLAVE_CNOC_MSS 535 |
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| 99 | #define SM8450_SLAVE_MX_RDPM 536 |
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| 100 | #define SM8450_SLAVE_PCIE_0_CFG 537 |
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| 101 | #define SM8450_SLAVE_PCIE_1_CFG 538 |
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| 102 | #define SM8450_SLAVE_PDM 539 |
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| 103 | #define SM8450_SLAVE_PIMEM_CFG 540 |
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| 104 | #define SM8450_SLAVE_PRNG 541 |
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| 105 | #define SM8450_SLAVE_QDSS_CFG 542 |
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| 106 | #define SM8450_SLAVE_QSPI_0 543 |
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| 107 | #define SM8450_SLAVE_QUP_0 544 |
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| 108 | #define SM8450_SLAVE_QUP_1 545 |
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| 109 | #define SM8450_SLAVE_QUP_2 546 |
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| 110 | #define SM8450_SLAVE_SDCC_2 547 |
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| 111 | #define SM8450_SLAVE_SDCC_4 548 |
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| 112 | #define SM8450_SLAVE_SPSS_CFG 549 |
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| 113 | #define SM8450_SLAVE_TCSR 550 |
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| 114 | #define SM8450_SLAVE_TLMM 551 |
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| 115 | #define SM8450_SLAVE_TME_CFG 552 |
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| 116 | #define SM8450_SLAVE_UFS_MEM_CFG 553 |
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| 117 | #define SM8450_SLAVE_USB3_0 554 |
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| 118 | #define SM8450_SLAVE_VENUS_CFG 555 |
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| 119 | #define SM8450_SLAVE_VSENSE_CTRL_CFG 556 |
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| 120 | #define SM8450_SLAVE_A1NOC_CFG 557 |
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| 121 | #define SM8450_SLAVE_A1NOC_SNOC 558 |
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| 122 | #define SM8450_SLAVE_A2NOC_CFG 559 |
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| 123 | #define SM8450_SLAVE_A2NOC_SNOC 560 |
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| 124 | #define 561 |
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| 125 | #define SM8450_SLAVE_GEM_NOC_CNOC 562 |
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| 126 | #define SM8450_SLAVE_SNOC_GEM_NOC_GC 563 |
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| 127 | #define SM8450_SLAVE_SNOC_GEM_NOC_SF 564 |
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| 128 | #define SM8450_SLAVE_LLCC 565 |
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| 129 | #define SM8450_SLAVE_MNOC_HF_MEM_NOC 566 |
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| 130 | #define SM8450_SLAVE_MNOC_SF_MEM_NOC 567 |
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| 131 | #define SM8450_SLAVE_CNOC_MNOC_CFG 568 |
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| 132 | #define SM8450_SLAVE_CDSP_MEM_NOC 569 |
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| 133 | #define SM8450_SLAVE_MEM_NOC_PCIE_SNOC 570 |
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| 134 | #define SM8450_SLAVE_PCIE_ANOC_CFG 571 |
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| 135 | #define SM8450_SLAVE_ANOC_PCIE_GEM_NOC 572 |
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| 136 | #define SM8450_SLAVE_SNOC_CFG 573 |
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| 137 | #define SM8450_SLAVE_LPASS_SNOC 574 |
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| 138 | #define SM8450_SLAVE_QUP_CORE_0 575 |
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| 139 | #define SM8450_SLAVE_QUP_CORE_1 576 |
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| 140 | #define SM8450_SLAVE_QUP_CORE_2 577 |
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| 141 | #define SM8450_SLAVE_IMEM 578 |
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| 142 | #define SM8450_SLAVE_PIMEM 579 |
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| 143 | #define SM8450_SLAVE_SERVICE_NSP_NOC 580 |
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| 144 | #define SM8450_SLAVE_SERVICE_A1NOC 581 |
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| 145 | #define SM8450_SLAVE_SERVICE_A2NOC 582 |
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| 146 | #define SM8450_SLAVE_SERVICE_CNOC 583 |
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| 147 | #define SM8450_SLAVE_SERVICE_MNOC 584 |
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| 148 | #define SM8450_SLAVE_SERVICES_LPASS_AML_NOC 585 |
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| 149 | #define SM8450_SLAVE_SERVICE_LPASS_AG_NOC 586 |
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| 150 | #define SM8450_SLAVE_SERVICE_PCIE_ANOC 587 |
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| 151 | #define SM8450_SLAVE_SERVICE_SNOC 588 |
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| 152 | #define SM8450_SLAVE_PCIE_0 589 |
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| 153 | #define SM8450_SLAVE_PCIE_1 590 |
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| 154 | #define SM8450_SLAVE_QDSS_STM 591 |
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| 155 | #define SM8450_SLAVE_TCU 592 |
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| 156 | #define SM8450_MASTER_LLCC_DISP 1000 |
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| 157 | #define SM8450_MASTER_MDP_DISP 1001 |
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| 158 | #define SM8450_MASTER_MDP0_DISP SM8450_MASTER_MDP_DISP |
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| 159 | #define SM8450_MASTER_MDP1_DISP SM8450_MASTER_MDP_DISP |
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| 160 | #define SM8450_MASTER_MNOC_HF_MEM_NOC_DISP 1002 |
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| 161 | #define SM8450_MASTER_MNOC_SF_MEM_NOC_DISP 1003 |
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| 162 | #define SM8450_MASTER_ANOC_PCIE_GEM_NOC_DISP 1004 |
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| 163 | #define SM8450_MASTER_ROTATOR_DISP 1005 |
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| 164 | #define SM8450_SLAVE_EBI1_DISP 1512 |
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| 165 | #define SM8450_SLAVE_LLCC_DISP 1513 |
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| 166 | #define SM8450_SLAVE_MNOC_HF_MEM_NOC_DISP 1514 |
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| 167 | #define SM8450_SLAVE_MNOC_SF_MEM_NOC_DISP 1515 |
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| 168 | |
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| 169 | #endif |
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| 170 | |
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