1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Copyright (C) 2014 Linaro Ltd. |
4 | * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> |
5 | * |
6 | * PCC (Platform Communication Channel) is defined in the ACPI 5.0+ |
7 | * specification. It is a mailbox like mechanism to allow clients |
8 | * such as CPPC (Collaborative Processor Performance Control), RAS |
9 | * (Reliability, Availability and Serviceability) and MPST (Memory |
10 | * Node Power State Table) to talk to the platform (e.g. BMC) through |
11 | * shared memory regions as defined in the PCC table entries. The PCC |
12 | * specification supports a Doorbell mechanism for the PCC clients |
13 | * to notify the platform about new data. This Doorbell information |
14 | * is also specified in each PCC table entry. |
15 | * |
16 | * Typical high level flow of operation is: |
17 | * |
18 | * PCC Reads: |
19 | * * Client tries to acquire a channel lock. |
20 | * * After it is acquired it writes READ cmd in communication region cmd |
21 | * address. |
22 | * * Client issues mbox_send_message() which rings the PCC doorbell |
23 | * for its PCC channel. |
24 | * * If command completes, then client has control over channel and |
25 | * it can proceed with its reads. |
26 | * * Client releases lock. |
27 | * |
28 | * PCC Writes: |
29 | * * Client tries to acquire channel lock. |
30 | * * Client writes to its communication region after it acquires a |
31 | * channel lock. |
32 | * * Client writes WRITE cmd in communication region cmd address. |
33 | * * Client issues mbox_send_message() which rings the PCC doorbell |
34 | * for its PCC channel. |
35 | * * If command completes, then writes have succeeded and it can release |
36 | * the channel lock. |
37 | * |
38 | * There is a Nominal latency defined for each channel which indicates |
39 | * how long to wait until a command completes. If command is not complete |
40 | * the client needs to retry or assume failure. |
41 | * |
42 | * For more details about PCC, please see the ACPI specification from |
43 | * http://www.uefi.org/ACPIv5.1 Section 14. |
44 | * |
45 | * This file implements PCC as a Mailbox controller and allows for PCC |
46 | * clients to be implemented as its Mailbox Client Channels. |
47 | */ |
48 | |
49 | #include <linux/acpi.h> |
50 | #include <linux/delay.h> |
51 | #include <linux/io.h> |
52 | #include <linux/init.h> |
53 | #include <linux/interrupt.h> |
54 | #include <linux/list.h> |
55 | #include <linux/log2.h> |
56 | #include <linux/platform_device.h> |
57 | #include <linux/mailbox_controller.h> |
58 | #include <linux/mailbox_client.h> |
59 | #include <linux/io-64-nonatomic-lo-hi.h> |
60 | #include <acpi/pcc.h> |
61 | |
62 | #include "mailbox.h" |
63 | |
64 | #define MBOX_IRQ_NAME "pcc-mbox" |
65 | |
66 | /** |
67 | * struct pcc_chan_reg - PCC register bundle |
68 | * |
69 | * @vaddr: cached virtual address for this register |
70 | * @gas: pointer to the generic address structure for this register |
71 | * @preserve_mask: bitmask to preserve when writing to this register |
72 | * @set_mask: bitmask to set when writing to this register |
73 | * @status_mask: bitmask to determine and/or update the status for this register |
74 | */ |
75 | struct pcc_chan_reg { |
76 | void __iomem *vaddr; |
77 | struct acpi_generic_address *gas; |
78 | u64 preserve_mask; |
79 | u64 set_mask; |
80 | u64 status_mask; |
81 | }; |
82 | |
83 | /** |
84 | * struct pcc_chan_info - PCC channel specific information |
85 | * |
86 | * @chan: PCC channel information with Shared Memory Region info |
87 | * @db: PCC register bundle for the doorbell register |
88 | * @plat_irq_ack: PCC register bundle for the platform interrupt acknowledge |
89 | * register |
90 | * @cmd_complete: PCC register bundle for the command complete check register |
91 | * @cmd_update: PCC register bundle for the command complete update register |
92 | * @error: PCC register bundle for the error status register |
93 | * @plat_irq: platform interrupt |
94 | * @type: PCC subspace type |
95 | * @plat_irq_flags: platform interrupt flags |
96 | * @chan_in_use: this flag is used just to check if the interrupt needs |
97 | * handling when it is shared. Since only one transfer can occur |
98 | * at a time and mailbox takes care of locking, this flag can be |
99 | * accessed without a lock. Note: the type only support the |
100 | * communication from OSPM to Platform, like type3, use it, and |
101 | * other types completely ignore it. |
102 | */ |
103 | struct pcc_chan_info { |
104 | struct pcc_mbox_chan chan; |
105 | struct pcc_chan_reg db; |
106 | struct pcc_chan_reg plat_irq_ack; |
107 | struct pcc_chan_reg cmd_complete; |
108 | struct pcc_chan_reg cmd_update; |
109 | struct pcc_chan_reg error; |
110 | int plat_irq; |
111 | u8 type; |
112 | unsigned int plat_irq_flags; |
113 | bool chan_in_use; |
114 | }; |
115 | |
116 | #define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan) |
117 | static struct pcc_chan_info *chan_info; |
118 | static int pcc_chan_count; |
119 | |
120 | static int pcc_send_data(struct mbox_chan *chan, void *data); |
121 | |
122 | /* |
123 | * PCC can be used with perf critical drivers such as CPPC |
124 | * So it makes sense to locally cache the virtual address and |
125 | * use it to read/write to PCC registers such as doorbell register |
126 | * |
127 | * The below read_register and write_registers are used to read and |
128 | * write from perf critical registers such as PCC doorbell register |
129 | */ |
130 | static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width) |
131 | { |
132 | switch (bit_width) { |
133 | case 8: |
134 | *val = readb(addr: vaddr); |
135 | break; |
136 | case 16: |
137 | *val = readw(addr: vaddr); |
138 | break; |
139 | case 32: |
140 | *val = readl(addr: vaddr); |
141 | break; |
142 | case 64: |
143 | *val = readq(addr: vaddr); |
144 | break; |
145 | } |
146 | } |
147 | |
148 | static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width) |
149 | { |
150 | switch (bit_width) { |
151 | case 8: |
152 | writeb(val, addr: vaddr); |
153 | break; |
154 | case 16: |
155 | writew(val, addr: vaddr); |
156 | break; |
157 | case 32: |
158 | writel(val, addr: vaddr); |
159 | break; |
160 | case 64: |
161 | writeq(val, addr: vaddr); |
162 | break; |
163 | } |
164 | } |
165 | |
166 | static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val) |
167 | { |
168 | int ret = 0; |
169 | |
170 | if (!reg->gas) { |
171 | *val = 0; |
172 | return 0; |
173 | } |
174 | |
175 | if (reg->vaddr) |
176 | read_register(vaddr: reg->vaddr, val, bit_width: reg->gas->bit_width); |
177 | else |
178 | ret = acpi_read(value: val, reg: reg->gas); |
179 | |
180 | return ret; |
181 | } |
182 | |
183 | static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val) |
184 | { |
185 | int ret = 0; |
186 | |
187 | if (!reg->gas) |
188 | return 0; |
189 | |
190 | if (reg->vaddr) |
191 | write_register(vaddr: reg->vaddr, val, bit_width: reg->gas->bit_width); |
192 | else |
193 | ret = acpi_write(value: val, reg: reg->gas); |
194 | |
195 | return ret; |
196 | } |
197 | |
198 | static int pcc_chan_reg_read_modify_write(struct pcc_chan_reg *reg) |
199 | { |
200 | int ret = 0; |
201 | u64 val; |
202 | |
203 | ret = pcc_chan_reg_read(reg, val: &val); |
204 | if (ret) |
205 | return ret; |
206 | |
207 | val &= reg->preserve_mask; |
208 | val |= reg->set_mask; |
209 | |
210 | return pcc_chan_reg_write(reg, val); |
211 | } |
212 | |
213 | /** |
214 | * pcc_map_interrupt - Map a PCC subspace GSI to a linux IRQ number |
215 | * @interrupt: GSI number. |
216 | * @flags: interrupt flags |
217 | * |
218 | * Returns: a valid linux IRQ number on success |
219 | * 0 or -EINVAL on failure |
220 | */ |
221 | static int pcc_map_interrupt(u32 interrupt, u32 flags) |
222 | { |
223 | int trigger, polarity; |
224 | |
225 | if (!interrupt) |
226 | return 0; |
227 | |
228 | trigger = (flags & ACPI_PCCT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE |
229 | : ACPI_LEVEL_SENSITIVE; |
230 | |
231 | polarity = (flags & ACPI_PCCT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW |
232 | : ACPI_ACTIVE_HIGH; |
233 | |
234 | return acpi_register_gsi(NULL, gsi: interrupt, triggering: trigger, polarity); |
235 | } |
236 | |
237 | static bool pcc_chan_plat_irq_can_be_shared(struct pcc_chan_info *pchan) |
238 | { |
239 | return (pchan->plat_irq_flags & ACPI_PCCT_INTERRUPT_MODE) == |
240 | ACPI_LEVEL_SENSITIVE; |
241 | } |
242 | |
243 | static bool pcc_mbox_cmd_complete_check(struct pcc_chan_info *pchan) |
244 | { |
245 | u64 val; |
246 | int ret; |
247 | |
248 | ret = pcc_chan_reg_read(reg: &pchan->cmd_complete, val: &val); |
249 | if (ret) |
250 | return false; |
251 | |
252 | if (!pchan->cmd_complete.gas) |
253 | return true; |
254 | |
255 | /* |
256 | * Judge if the channel respond the interrupt based on the value of |
257 | * command complete. |
258 | */ |
259 | val &= pchan->cmd_complete.status_mask; |
260 | |
261 | /* |
262 | * If this is PCC slave subspace channel, and the command complete |
263 | * bit 0 indicates that Platform is sending a notification and OSPM |
264 | * needs to respond this interrupt to process this command. |
265 | */ |
266 | if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) |
267 | return !val; |
268 | |
269 | return !!val; |
270 | } |
271 | |
272 | /** |
273 | * pcc_mbox_irq - PCC mailbox interrupt handler |
274 | * @irq: interrupt number |
275 | * @p: data/cookie passed from the caller to identify the channel |
276 | * |
277 | * Returns: IRQ_HANDLED if interrupt is handled or IRQ_NONE if not |
278 | */ |
279 | static irqreturn_t pcc_mbox_irq(int irq, void *p) |
280 | { |
281 | struct pcc_chan_info *pchan; |
282 | struct mbox_chan *chan = p; |
283 | u64 val; |
284 | int ret; |
285 | |
286 | pchan = chan->con_priv; |
287 | if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE && |
288 | !pchan->chan_in_use) |
289 | return IRQ_NONE; |
290 | |
291 | if (!pcc_mbox_cmd_complete_check(pchan)) |
292 | return IRQ_NONE; |
293 | |
294 | ret = pcc_chan_reg_read(reg: &pchan->error, val: &val); |
295 | if (ret) |
296 | return IRQ_NONE; |
297 | val &= pchan->error.status_mask; |
298 | if (val) { |
299 | val &= ~pchan->error.status_mask; |
300 | pcc_chan_reg_write(reg: &pchan->error, val); |
301 | return IRQ_NONE; |
302 | } |
303 | |
304 | if (pcc_chan_reg_read_modify_write(reg: &pchan->plat_irq_ack)) |
305 | return IRQ_NONE; |
306 | |
307 | mbox_chan_received_data(chan, NULL); |
308 | |
309 | /* |
310 | * The PCC slave subspace channel needs to set the command complete bit |
311 | * and ring doorbell after processing message. |
312 | * |
313 | * The PCC master subspace channel clears chan_in_use to free channel. |
314 | */ |
315 | if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) |
316 | pcc_send_data(chan, NULL); |
317 | pchan->chan_in_use = false; |
318 | |
319 | return IRQ_HANDLED; |
320 | } |
321 | |
322 | /** |
323 | * pcc_mbox_request_channel - PCC clients call this function to |
324 | * request a pointer to their PCC subspace, from which they |
325 | * can get the details of communicating with the remote. |
326 | * @cl: Pointer to Mailbox client, so we know where to bind the |
327 | * Channel. |
328 | * @subspace_id: The PCC Subspace index as parsed in the PCC client |
329 | * ACPI package. This is used to lookup the array of PCC |
330 | * subspaces as parsed by the PCC Mailbox controller. |
331 | * |
332 | * Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR. |
333 | */ |
334 | struct pcc_mbox_chan * |
335 | pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) |
336 | { |
337 | struct pcc_chan_info *pchan; |
338 | struct mbox_chan *chan; |
339 | int rc; |
340 | |
341 | if (subspace_id < 0 || subspace_id >= pcc_chan_count) |
342 | return ERR_PTR(error: -ENOENT); |
343 | |
344 | pchan = chan_info + subspace_id; |
345 | chan = pchan->chan.mchan; |
346 | if (IS_ERR(ptr: chan) || chan->cl) { |
347 | pr_err("Channel not found for idx: %d\n" , subspace_id); |
348 | return ERR_PTR(error: -EBUSY); |
349 | } |
350 | |
351 | rc = mbox_bind_client(chan, cl); |
352 | if (rc) |
353 | return ERR_PTR(error: rc); |
354 | |
355 | return &pchan->chan; |
356 | } |
357 | EXPORT_SYMBOL_GPL(pcc_mbox_request_channel); |
358 | |
359 | /** |
360 | * pcc_mbox_free_channel - Clients call this to free their Channel. |
361 | * |
362 | * @pchan: Pointer to the PCC mailbox channel as returned by |
363 | * pcc_mbox_request_channel() |
364 | */ |
365 | void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan) |
366 | { |
367 | struct mbox_chan *chan = pchan->mchan; |
368 | |
369 | if (!chan || !chan->cl) |
370 | return; |
371 | |
372 | mbox_free_channel(chan); |
373 | } |
374 | EXPORT_SYMBOL_GPL(pcc_mbox_free_channel); |
375 | |
376 | /** |
377 | * pcc_send_data - Called from Mailbox Controller code. Used |
378 | * here only to ring the channel doorbell. The PCC client |
379 | * specific read/write is done in the client driver in |
380 | * order to maintain atomicity over PCC channel once |
381 | * OS has control over it. See above for flow of operations. |
382 | * @chan: Pointer to Mailbox channel over which to send data. |
383 | * @data: Client specific data written over channel. Used here |
384 | * only for debug after PCC transaction completes. |
385 | * |
386 | * Return: Err if something failed else 0 for success. |
387 | */ |
388 | static int pcc_send_data(struct mbox_chan *chan, void *data) |
389 | { |
390 | int ret; |
391 | struct pcc_chan_info *pchan = chan->con_priv; |
392 | |
393 | ret = pcc_chan_reg_read_modify_write(reg: &pchan->cmd_update); |
394 | if (ret) |
395 | return ret; |
396 | |
397 | ret = pcc_chan_reg_read_modify_write(reg: &pchan->db); |
398 | if (!ret && pchan->plat_irq > 0) |
399 | pchan->chan_in_use = true; |
400 | |
401 | return ret; |
402 | } |
403 | |
404 | /** |
405 | * pcc_startup - Called from Mailbox Controller code. Used here |
406 | * to request the interrupt. |
407 | * @chan: Pointer to Mailbox channel to startup. |
408 | * |
409 | * Return: Err if something failed else 0 for success. |
410 | */ |
411 | static int pcc_startup(struct mbox_chan *chan) |
412 | { |
413 | struct pcc_chan_info *pchan = chan->con_priv; |
414 | unsigned long irqflags; |
415 | int rc; |
416 | |
417 | if (pchan->plat_irq > 0) { |
418 | irqflags = pcc_chan_plat_irq_can_be_shared(pchan) ? |
419 | IRQF_SHARED | IRQF_ONESHOT : 0; |
420 | rc = devm_request_irq(dev: chan->mbox->dev, irq: pchan->plat_irq, handler: pcc_mbox_irq, |
421 | irqflags, MBOX_IRQ_NAME, dev_id: chan); |
422 | if (unlikely(rc)) { |
423 | dev_err(chan->mbox->dev, "failed to register PCC interrupt %d\n" , |
424 | pchan->plat_irq); |
425 | return rc; |
426 | } |
427 | } |
428 | |
429 | return 0; |
430 | } |
431 | |
432 | /** |
433 | * pcc_shutdown - Called from Mailbox Controller code. Used here |
434 | * to free the interrupt. |
435 | * @chan: Pointer to Mailbox channel to shutdown. |
436 | */ |
437 | static void pcc_shutdown(struct mbox_chan *chan) |
438 | { |
439 | struct pcc_chan_info *pchan = chan->con_priv; |
440 | |
441 | if (pchan->plat_irq > 0) |
442 | devm_free_irq(dev: chan->mbox->dev, irq: pchan->plat_irq, dev_id: chan); |
443 | } |
444 | |
445 | static const struct mbox_chan_ops pcc_chan_ops = { |
446 | .send_data = pcc_send_data, |
447 | .startup = pcc_startup, |
448 | .shutdown = pcc_shutdown, |
449 | }; |
450 | |
451 | /** |
452 | * parse_pcc_subspace - Count PCC subspaces defined |
453 | * @header: Pointer to the ACPI subtable header under the PCCT. |
454 | * @end: End of subtable entry. |
455 | * |
456 | * Return: If we find a PCC subspace entry of a valid type, return 0. |
457 | * Otherwise, return -EINVAL. |
458 | * |
459 | * This gets called for each entry in the PCC table. |
460 | */ |
461 | static int parse_pcc_subspace(union acpi_subtable_headers *, |
462 | const unsigned long end) |
463 | { |
464 | struct acpi_pcct_subspace *ss = (struct acpi_pcct_subspace *) header; |
465 | |
466 | if (ss->header.type < ACPI_PCCT_TYPE_RESERVED) |
467 | return 0; |
468 | |
469 | return -EINVAL; |
470 | } |
471 | |
472 | static int |
473 | pcc_chan_reg_init(struct pcc_chan_reg *reg, struct acpi_generic_address *gas, |
474 | u64 preserve_mask, u64 set_mask, u64 status_mask, char *name) |
475 | { |
476 | if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { |
477 | if (!(gas->bit_width >= 8 && gas->bit_width <= 64 && |
478 | is_power_of_2(n: gas->bit_width))) { |
479 | pr_err("Error: Cannot access register of %u bit width" , |
480 | gas->bit_width); |
481 | return -EFAULT; |
482 | } |
483 | |
484 | reg->vaddr = acpi_os_ioremap(phys: gas->address, size: gas->bit_width / 8); |
485 | if (!reg->vaddr) { |
486 | pr_err("Failed to ioremap PCC %s register\n" , name); |
487 | return -ENOMEM; |
488 | } |
489 | } |
490 | reg->gas = gas; |
491 | reg->preserve_mask = preserve_mask; |
492 | reg->set_mask = set_mask; |
493 | reg->status_mask = status_mask; |
494 | return 0; |
495 | } |
496 | |
497 | /** |
498 | * pcc_parse_subspace_irq - Parse the PCC IRQ and PCC ACK register |
499 | * |
500 | * @pchan: Pointer to the PCC channel info structure. |
501 | * @pcct_entry: Pointer to the ACPI subtable header. |
502 | * |
503 | * Return: 0 for Success, else errno. |
504 | * |
505 | * There should be one entry per PCC channel. This gets called for each |
506 | * entry in the PCC table. This uses PCCY Type1 structure for all applicable |
507 | * types(Type 1-4) to fetch irq |
508 | */ |
509 | static int pcc_parse_subspace_irq(struct pcc_chan_info *pchan, |
510 | struct acpi_subtable_header *pcct_entry) |
511 | { |
512 | int ret = 0; |
513 | struct acpi_pcct_hw_reduced *pcct_ss; |
514 | |
515 | if (pcct_entry->type < ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE || |
516 | pcct_entry->type > ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) |
517 | return 0; |
518 | |
519 | pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry; |
520 | pchan->plat_irq = pcc_map_interrupt(interrupt: pcct_ss->platform_interrupt, |
521 | flags: (u32)pcct_ss->flags); |
522 | if (pchan->plat_irq <= 0) { |
523 | pr_err("PCC GSI %d not registered\n" , |
524 | pcct_ss->platform_interrupt); |
525 | return -EINVAL; |
526 | } |
527 | pchan->plat_irq_flags = pcct_ss->flags; |
528 | |
529 | if (pcct_ss->header.type == ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { |
530 | struct acpi_pcct_hw_reduced_type2 *pcct2_ss = (void *)pcct_ss; |
531 | |
532 | ret = pcc_chan_reg_init(reg: &pchan->plat_irq_ack, |
533 | gas: &pcct2_ss->platform_ack_register, |
534 | preserve_mask: pcct2_ss->ack_preserve_mask, |
535 | set_mask: pcct2_ss->ack_write_mask, status_mask: 0, |
536 | name: "PLAT IRQ ACK" ); |
537 | |
538 | } else if (pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE || |
539 | pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) { |
540 | struct acpi_pcct_ext_pcc_master *pcct_ext = (void *)pcct_ss; |
541 | |
542 | ret = pcc_chan_reg_init(reg: &pchan->plat_irq_ack, |
543 | gas: &pcct_ext->platform_ack_register, |
544 | preserve_mask: pcct_ext->ack_preserve_mask, |
545 | set_mask: pcct_ext->ack_set_mask, status_mask: 0, |
546 | name: "PLAT IRQ ACK" ); |
547 | } |
548 | |
549 | if (pcc_chan_plat_irq_can_be_shared(pchan) && |
550 | !pchan->plat_irq_ack.gas) { |
551 | pr_err("PCC subspace has level IRQ with no ACK register\n" ); |
552 | return -EINVAL; |
553 | } |
554 | |
555 | return ret; |
556 | } |
557 | |
558 | /** |
559 | * pcc_parse_subspace_db_reg - Parse the PCC doorbell register |
560 | * |
561 | * @pchan: Pointer to the PCC channel info structure. |
562 | * @pcct_entry: Pointer to the ACPI subtable header. |
563 | * |
564 | * Return: 0 for Success, else errno. |
565 | */ |
566 | static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan, |
567 | struct acpi_subtable_header *pcct_entry) |
568 | { |
569 | int ret = 0; |
570 | |
571 | if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { |
572 | struct acpi_pcct_subspace *pcct_ss; |
573 | |
574 | pcct_ss = (struct acpi_pcct_subspace *)pcct_entry; |
575 | |
576 | ret = pcc_chan_reg_init(reg: &pchan->db, |
577 | gas: &pcct_ss->doorbell_register, |
578 | preserve_mask: pcct_ss->preserve_mask, |
579 | set_mask: pcct_ss->write_mask, status_mask: 0, name: "Doorbell" ); |
580 | |
581 | } else { |
582 | struct acpi_pcct_ext_pcc_master *pcct_ext; |
583 | |
584 | pcct_ext = (struct acpi_pcct_ext_pcc_master *)pcct_entry; |
585 | |
586 | ret = pcc_chan_reg_init(reg: &pchan->db, |
587 | gas: &pcct_ext->doorbell_register, |
588 | preserve_mask: pcct_ext->preserve_mask, |
589 | set_mask: pcct_ext->write_mask, status_mask: 0, name: "Doorbell" ); |
590 | if (ret) |
591 | return ret; |
592 | |
593 | ret = pcc_chan_reg_init(reg: &pchan->cmd_complete, |
594 | gas: &pcct_ext->cmd_complete_register, |
595 | preserve_mask: 0, set_mask: 0, status_mask: pcct_ext->cmd_complete_mask, |
596 | name: "Command Complete Check" ); |
597 | if (ret) |
598 | return ret; |
599 | |
600 | ret = pcc_chan_reg_init(reg: &pchan->cmd_update, |
601 | gas: &pcct_ext->cmd_update_register, |
602 | preserve_mask: pcct_ext->cmd_update_preserve_mask, |
603 | set_mask: pcct_ext->cmd_update_set_mask, status_mask: 0, |
604 | name: "Command Complete Update" ); |
605 | if (ret) |
606 | return ret; |
607 | |
608 | ret = pcc_chan_reg_init(reg: &pchan->error, |
609 | gas: &pcct_ext->error_status_register, |
610 | preserve_mask: 0, set_mask: 0, status_mask: pcct_ext->error_status_mask, |
611 | name: "Error Status" ); |
612 | } |
613 | return ret; |
614 | } |
615 | |
616 | /** |
617 | * pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information |
618 | * |
619 | * @pchan: Pointer to the PCC channel info structure. |
620 | * @pcct_entry: Pointer to the ACPI subtable header. |
621 | * |
622 | */ |
623 | static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan, |
624 | struct acpi_subtable_header *pcct_entry) |
625 | { |
626 | if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { |
627 | struct acpi_pcct_subspace *pcct_ss = |
628 | (struct acpi_pcct_subspace *)pcct_entry; |
629 | |
630 | pchan->chan.shmem_base_addr = pcct_ss->base_address; |
631 | pchan->chan.shmem_size = pcct_ss->length; |
632 | pchan->chan.latency = pcct_ss->latency; |
633 | pchan->chan.max_access_rate = pcct_ss->max_access_rate; |
634 | pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time; |
635 | } else { |
636 | struct acpi_pcct_ext_pcc_master *pcct_ext = |
637 | (struct acpi_pcct_ext_pcc_master *)pcct_entry; |
638 | |
639 | pchan->chan.shmem_base_addr = pcct_ext->base_address; |
640 | pchan->chan.shmem_size = pcct_ext->length; |
641 | pchan->chan.latency = pcct_ext->latency; |
642 | pchan->chan.max_access_rate = pcct_ext->max_access_rate; |
643 | pchan->chan.min_turnaround_time = pcct_ext->min_turnaround_time; |
644 | } |
645 | } |
646 | |
647 | /** |
648 | * acpi_pcc_probe - Parse the ACPI tree for the PCCT. |
649 | * |
650 | * Return: 0 for Success, else errno. |
651 | */ |
652 | static int __init acpi_pcc_probe(void) |
653 | { |
654 | int count, i, rc = 0; |
655 | acpi_status status; |
656 | struct acpi_table_header *pcct_tbl; |
657 | struct acpi_subtable_proc proc[ACPI_PCCT_TYPE_RESERVED]; |
658 | |
659 | status = acpi_get_table(ACPI_SIG_PCCT, instance: 0, out_table: &pcct_tbl); |
660 | if (ACPI_FAILURE(status) || !pcct_tbl) |
661 | return -ENODEV; |
662 | |
663 | /* Set up the subtable handlers */ |
664 | for (i = ACPI_PCCT_TYPE_GENERIC_SUBSPACE; |
665 | i < ACPI_PCCT_TYPE_RESERVED; i++) { |
666 | proc[i].id = i; |
667 | proc[i].count = 0; |
668 | proc[i].handler = parse_pcc_subspace; |
669 | } |
670 | |
671 | count = acpi_table_parse_entries_array(ACPI_SIG_PCCT, |
672 | table_size: sizeof(struct acpi_table_pcct), proc, |
673 | proc_num: ACPI_PCCT_TYPE_RESERVED, MAX_PCC_SUBSPACES); |
674 | if (count <= 0 || count > MAX_PCC_SUBSPACES) { |
675 | if (count < 0) |
676 | pr_warn("Error parsing PCC subspaces from PCCT\n" ); |
677 | else |
678 | pr_warn("Invalid PCCT: %d PCC subspaces\n" , count); |
679 | |
680 | rc = -EINVAL; |
681 | } else { |
682 | pcc_chan_count = count; |
683 | } |
684 | |
685 | acpi_put_table(table: pcct_tbl); |
686 | |
687 | return rc; |
688 | } |
689 | |
690 | /** |
691 | * pcc_mbox_probe - Called when we find a match for the |
692 | * PCCT platform device. This is purely used to represent |
693 | * the PCCT as a virtual device for registering with the |
694 | * generic Mailbox framework. |
695 | * |
696 | * @pdev: Pointer to platform device returned when a match |
697 | * is found. |
698 | * |
699 | * Return: 0 for Success, else errno. |
700 | */ |
701 | static int pcc_mbox_probe(struct platform_device *pdev) |
702 | { |
703 | struct device *dev = &pdev->dev; |
704 | struct mbox_controller *pcc_mbox_ctrl; |
705 | struct mbox_chan *pcc_mbox_channels; |
706 | struct acpi_table_header *pcct_tbl; |
707 | struct acpi_subtable_header *pcct_entry; |
708 | struct acpi_table_pcct *acpi_pcct_tbl; |
709 | acpi_status status = AE_OK; |
710 | int i, rc, count = pcc_chan_count; |
711 | |
712 | /* Search for PCCT */ |
713 | status = acpi_get_table(ACPI_SIG_PCCT, instance: 0, out_table: &pcct_tbl); |
714 | |
715 | if (ACPI_FAILURE(status) || !pcct_tbl) |
716 | return -ENODEV; |
717 | |
718 | pcc_mbox_channels = devm_kcalloc(dev, n: count, size: sizeof(*pcc_mbox_channels), |
719 | GFP_KERNEL); |
720 | if (!pcc_mbox_channels) { |
721 | rc = -ENOMEM; |
722 | goto err; |
723 | } |
724 | |
725 | chan_info = devm_kcalloc(dev, n: count, size: sizeof(*chan_info), GFP_KERNEL); |
726 | if (!chan_info) { |
727 | rc = -ENOMEM; |
728 | goto err; |
729 | } |
730 | |
731 | pcc_mbox_ctrl = devm_kzalloc(dev, size: sizeof(*pcc_mbox_ctrl), GFP_KERNEL); |
732 | if (!pcc_mbox_ctrl) { |
733 | rc = -ENOMEM; |
734 | goto err; |
735 | } |
736 | |
737 | /* Point to the first PCC subspace entry */ |
738 | pcct_entry = (struct acpi_subtable_header *) ( |
739 | (unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct)); |
740 | |
741 | acpi_pcct_tbl = (struct acpi_table_pcct *) pcct_tbl; |
742 | if (acpi_pcct_tbl->flags & ACPI_PCCT_DOORBELL) |
743 | pcc_mbox_ctrl->txdone_irq = true; |
744 | |
745 | for (i = 0; i < count; i++) { |
746 | struct pcc_chan_info *pchan = chan_info + i; |
747 | |
748 | pcc_mbox_channels[i].con_priv = pchan; |
749 | pchan->chan.mchan = &pcc_mbox_channels[i]; |
750 | |
751 | if (pcct_entry->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE && |
752 | !pcc_mbox_ctrl->txdone_irq) { |
753 | pr_err("Platform Interrupt flag must be set to 1" ); |
754 | rc = -EINVAL; |
755 | goto err; |
756 | } |
757 | |
758 | if (pcc_mbox_ctrl->txdone_irq) { |
759 | rc = pcc_parse_subspace_irq(pchan, pcct_entry); |
760 | if (rc < 0) |
761 | goto err; |
762 | } |
763 | rc = pcc_parse_subspace_db_reg(pchan, pcct_entry); |
764 | if (rc < 0) |
765 | goto err; |
766 | |
767 | pcc_parse_subspace_shmem(pchan, pcct_entry); |
768 | |
769 | pchan->type = pcct_entry->type; |
770 | pcct_entry = (struct acpi_subtable_header *) |
771 | ((unsigned long) pcct_entry + pcct_entry->length); |
772 | } |
773 | |
774 | pcc_mbox_ctrl->num_chans = count; |
775 | |
776 | pr_info("Detected %d PCC Subspaces\n" , pcc_mbox_ctrl->num_chans); |
777 | |
778 | pcc_mbox_ctrl->chans = pcc_mbox_channels; |
779 | pcc_mbox_ctrl->ops = &pcc_chan_ops; |
780 | pcc_mbox_ctrl->dev = dev; |
781 | |
782 | pr_info("Registering PCC driver as Mailbox controller\n" ); |
783 | rc = mbox_controller_register(mbox: pcc_mbox_ctrl); |
784 | if (rc) |
785 | pr_err("Err registering PCC as Mailbox controller: %d\n" , rc); |
786 | else |
787 | return 0; |
788 | err: |
789 | acpi_put_table(table: pcct_tbl); |
790 | return rc; |
791 | } |
792 | |
793 | static struct platform_driver pcc_mbox_driver = { |
794 | .probe = pcc_mbox_probe, |
795 | .driver = { |
796 | .name = "PCCT" , |
797 | }, |
798 | }; |
799 | |
800 | static int __init pcc_init(void) |
801 | { |
802 | int ret; |
803 | struct platform_device *pcc_pdev; |
804 | |
805 | if (acpi_disabled) |
806 | return -ENODEV; |
807 | |
808 | /* Check if PCC support is available. */ |
809 | ret = acpi_pcc_probe(); |
810 | |
811 | if (ret) { |
812 | pr_debug("ACPI PCC probe failed.\n" ); |
813 | return -ENODEV; |
814 | } |
815 | |
816 | pcc_pdev = platform_create_bundle(&pcc_mbox_driver, |
817 | pcc_mbox_probe, NULL, 0, NULL, 0); |
818 | |
819 | if (IS_ERR(ptr: pcc_pdev)) { |
820 | pr_debug("Err creating PCC platform bundle\n" ); |
821 | pcc_chan_count = 0; |
822 | return PTR_ERR(ptr: pcc_pdev); |
823 | } |
824 | |
825 | return 0; |
826 | } |
827 | |
828 | /* |
829 | * Make PCC init postcore so that users of this mailbox |
830 | * such as the ACPI Processor driver have it available |
831 | * at their init. |
832 | */ |
833 | postcore_initcall(pcc_init); |
834 | |