1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework |
4 | * |
5 | * Largely derived from at91_dataflash.c: |
6 | * Copyright (C) 2003-2005 SAN People (Pty) Ltd |
7 | */ |
8 | #include <linux/module.h> |
9 | #include <linux/slab.h> |
10 | #include <linux/delay.h> |
11 | #include <linux/device.h> |
12 | #include <linux/mutex.h> |
13 | #include <linux/err.h> |
14 | #include <linux/math64.h> |
15 | #include <linux/of.h> |
16 | |
17 | #include <linux/spi/spi.h> |
18 | #include <linux/spi/flash.h> |
19 | |
20 | #include <linux/mtd/mtd.h> |
21 | #include <linux/mtd/partitions.h> |
22 | |
23 | /* |
24 | * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in |
25 | * each chip, which may be used for double buffered I/O; but this driver |
26 | * doesn't (yet) use these for any kind of i/o overlap or prefetching. |
27 | * |
28 | * Sometimes DataFlash is packaged in MMC-format cards, although the |
29 | * MMC stack can't (yet?) distinguish between MMC and DataFlash |
30 | * protocols during enumeration. |
31 | */ |
32 | |
33 | /* reads can bypass the buffers */ |
34 | #define OP_READ_CONTINUOUS 0xE8 |
35 | #define OP_READ_PAGE 0xD2 |
36 | |
37 | /* group B requests can run even while status reports "busy" */ |
38 | #define OP_READ_STATUS 0xD7 /* group B */ |
39 | |
40 | /* move data between host and buffer */ |
41 | #define OP_READ_BUFFER1 0xD4 /* group B */ |
42 | #define OP_READ_BUFFER2 0xD6 /* group B */ |
43 | #define OP_WRITE_BUFFER1 0x84 /* group B */ |
44 | #define OP_WRITE_BUFFER2 0x87 /* group B */ |
45 | |
46 | /* erasing flash */ |
47 | #define OP_ERASE_PAGE 0x81 |
48 | #define OP_ERASE_BLOCK 0x50 |
49 | |
50 | /* move data between buffer and flash */ |
51 | #define OP_TRANSFER_BUF1 0x53 |
52 | #define OP_TRANSFER_BUF2 0x55 |
53 | #define OP_MREAD_BUFFER1 0xD4 |
54 | #define OP_MREAD_BUFFER2 0xD6 |
55 | #define OP_MWERASE_BUFFER1 0x83 |
56 | #define OP_MWERASE_BUFFER2 0x86 |
57 | #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ |
58 | #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ |
59 | |
60 | /* write to buffer, then write-erase to flash */ |
61 | #define OP_PROGRAM_VIA_BUF1 0x82 |
62 | #define OP_PROGRAM_VIA_BUF2 0x85 |
63 | |
64 | /* compare buffer to flash */ |
65 | #define OP_COMPARE_BUF1 0x60 |
66 | #define OP_COMPARE_BUF2 0x61 |
67 | |
68 | /* read flash to buffer, then write-erase to flash */ |
69 | #define OP_REWRITE_VIA_BUF1 0x58 |
70 | #define OP_REWRITE_VIA_BUF2 0x59 |
71 | |
72 | /* newer chips report JEDEC manufacturer and device IDs; chip |
73 | * serial number and OTP bits; and per-sector writeprotect. |
74 | */ |
75 | #define OP_READ_ID 0x9F |
76 | #define OP_READ_SECURITY 0x77 |
77 | #define OP_WRITE_SECURITY_REVC 0x9A |
78 | #define OP_WRITE_SECURITY 0x9B /* revision D */ |
79 | |
80 | #define CFI_MFR_ATMEL 0x1F |
81 | |
82 | #define DATAFLASH_SHIFT_EXTID 24 |
83 | #define DATAFLASH_SHIFT_ID 40 |
84 | |
85 | struct dataflash { |
86 | u8 command[4]; |
87 | char name[24]; |
88 | |
89 | unsigned short page_offset; /* offset in flash address */ |
90 | unsigned int page_size; /* of bytes per page */ |
91 | |
92 | struct mutex lock; |
93 | struct spi_device *spi; |
94 | |
95 | struct mtd_info mtd; |
96 | }; |
97 | |
98 | #ifdef CONFIG_OF |
99 | static const struct of_device_id dataflash_dt_ids[] = { |
100 | { .compatible = "atmel,at45" , }, |
101 | { .compatible = "atmel,dataflash" , }, |
102 | { /* sentinel */ } |
103 | }; |
104 | MODULE_DEVICE_TABLE(of, dataflash_dt_ids); |
105 | #endif |
106 | |
107 | static const struct spi_device_id dataflash_spi_ids[] = { |
108 | { .name = "at45" , }, |
109 | { .name = "dataflash" , }, |
110 | { /* sentinel */ } |
111 | }; |
112 | MODULE_DEVICE_TABLE(spi, dataflash_spi_ids); |
113 | |
114 | /* ......................................................................... */ |
115 | |
116 | /* |
117 | * Return the status of the DataFlash device. |
118 | */ |
119 | static inline int dataflash_status(struct spi_device *spi) |
120 | { |
121 | /* NOTE: at45db321c over 25 MHz wants to write |
122 | * a dummy byte after the opcode... |
123 | */ |
124 | return spi_w8r8(spi, OP_READ_STATUS); |
125 | } |
126 | |
127 | /* |
128 | * Poll the DataFlash device until it is READY. |
129 | * This usually takes 5-20 msec or so; more for sector erase. |
130 | */ |
131 | static int dataflash_waitready(struct spi_device *spi) |
132 | { |
133 | int status; |
134 | |
135 | for (;;) { |
136 | status = dataflash_status(spi); |
137 | if (status < 0) { |
138 | dev_dbg(&spi->dev, "status %d?\n" , status); |
139 | status = 0; |
140 | } |
141 | |
142 | if (status & (1 << 7)) /* RDY/nBSY */ |
143 | return status; |
144 | |
145 | usleep_range(min: 3000, max: 4000); |
146 | } |
147 | } |
148 | |
149 | /* ......................................................................... */ |
150 | |
151 | /* |
152 | * Erase pages of flash. |
153 | */ |
154 | static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) |
155 | { |
156 | struct dataflash *priv = mtd->priv; |
157 | struct spi_device *spi = priv->spi; |
158 | struct spi_transfer x = { }; |
159 | struct spi_message msg; |
160 | unsigned blocksize = priv->page_size << 3; |
161 | u8 *command; |
162 | u32 rem; |
163 | |
164 | dev_dbg(&spi->dev, "erase addr=0x%llx len 0x%llx\n" , |
165 | (long long)instr->addr, (long long)instr->len); |
166 | |
167 | div_u64_rem(dividend: instr->len, divisor: priv->page_size, remainder: &rem); |
168 | if (rem) |
169 | return -EINVAL; |
170 | div_u64_rem(dividend: instr->addr, divisor: priv->page_size, remainder: &rem); |
171 | if (rem) |
172 | return -EINVAL; |
173 | |
174 | spi_message_init(m: &msg); |
175 | |
176 | x.tx_buf = command = priv->command; |
177 | x.len = 4; |
178 | spi_message_add_tail(t: &x, m: &msg); |
179 | |
180 | mutex_lock(&priv->lock); |
181 | while (instr->len > 0) { |
182 | unsigned int pageaddr; |
183 | int status; |
184 | int do_block; |
185 | |
186 | /* Calculate flash page address; use block erase (for speed) if |
187 | * we're at a block boundary and need to erase the whole block. |
188 | */ |
189 | pageaddr = div_u64(dividend: instr->addr, divisor: priv->page_size); |
190 | do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize; |
191 | pageaddr = pageaddr << priv->page_offset; |
192 | |
193 | command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; |
194 | command[1] = (u8)(pageaddr >> 16); |
195 | command[2] = (u8)(pageaddr >> 8); |
196 | command[3] = 0; |
197 | |
198 | dev_dbg(&spi->dev, "ERASE %s: (%x) %x %x %x [%i]\n" , |
199 | do_block ? "block" : "page" , |
200 | command[0], command[1], command[2], command[3], |
201 | pageaddr); |
202 | |
203 | status = spi_sync(spi, message: &msg); |
204 | (void) dataflash_waitready(spi); |
205 | |
206 | if (status < 0) { |
207 | dev_err(&spi->dev, "erase %x, err %d\n" , |
208 | pageaddr, status); |
209 | /* REVISIT: can retry instr->retries times; or |
210 | * giveup and instr->fail_addr = instr->addr; |
211 | */ |
212 | continue; |
213 | } |
214 | |
215 | if (do_block) { |
216 | instr->addr += blocksize; |
217 | instr->len -= blocksize; |
218 | } else { |
219 | instr->addr += priv->page_size; |
220 | instr->len -= priv->page_size; |
221 | } |
222 | } |
223 | mutex_unlock(lock: &priv->lock); |
224 | |
225 | return 0; |
226 | } |
227 | |
228 | /* |
229 | * Read from the DataFlash device. |
230 | * from : Start offset in flash device |
231 | * len : Amount to read |
232 | * retlen : About of data actually read |
233 | * buf : Buffer containing the data |
234 | */ |
235 | static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, |
236 | size_t *retlen, u_char *buf) |
237 | { |
238 | struct dataflash *priv = mtd->priv; |
239 | struct spi_transfer x[2] = { }; |
240 | struct spi_message msg; |
241 | unsigned int addr; |
242 | u8 *command; |
243 | int status; |
244 | |
245 | dev_dbg(&priv->spi->dev, "read 0x%x..0x%x\n" , |
246 | (unsigned int)from, (unsigned int)(from + len)); |
247 | |
248 | /* Calculate flash page/byte address */ |
249 | addr = (((unsigned)from / priv->page_size) << priv->page_offset) |
250 | + ((unsigned)from % priv->page_size); |
251 | |
252 | command = priv->command; |
253 | |
254 | dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n" , |
255 | command[0], command[1], command[2], command[3]); |
256 | |
257 | spi_message_init(m: &msg); |
258 | |
259 | x[0].tx_buf = command; |
260 | x[0].len = 8; |
261 | spi_message_add_tail(t: &x[0], m: &msg); |
262 | |
263 | x[1].rx_buf = buf; |
264 | x[1].len = len; |
265 | spi_message_add_tail(t: &x[1], m: &msg); |
266 | |
267 | mutex_lock(&priv->lock); |
268 | |
269 | /* Continuous read, max clock = f(car) which may be less than |
270 | * the peak rate available. Some chips support commands with |
271 | * fewer "don't care" bytes. Both buffers stay unchanged. |
272 | */ |
273 | command[0] = OP_READ_CONTINUOUS; |
274 | command[1] = (u8)(addr >> 16); |
275 | command[2] = (u8)(addr >> 8); |
276 | command[3] = (u8)(addr >> 0); |
277 | /* plus 4 "don't care" bytes */ |
278 | |
279 | status = spi_sync(spi: priv->spi, message: &msg); |
280 | mutex_unlock(lock: &priv->lock); |
281 | |
282 | if (status >= 0) { |
283 | *retlen = msg.actual_length - 8; |
284 | status = 0; |
285 | } else |
286 | dev_dbg(&priv->spi->dev, "read %x..%x --> %d\n" , |
287 | (unsigned)from, (unsigned)(from + len), |
288 | status); |
289 | return status; |
290 | } |
291 | |
292 | /* |
293 | * Write to the DataFlash device. |
294 | * to : Start offset in flash device |
295 | * len : Amount to write |
296 | * retlen : Amount of data actually written |
297 | * buf : Buffer containing the data |
298 | */ |
299 | static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, |
300 | size_t * retlen, const u_char * buf) |
301 | { |
302 | struct dataflash *priv = mtd->priv; |
303 | struct spi_device *spi = priv->spi; |
304 | struct spi_transfer x[2] = { }; |
305 | struct spi_message msg; |
306 | unsigned int pageaddr, addr, offset, writelen; |
307 | size_t remaining = len; |
308 | u_char *writebuf = (u_char *) buf; |
309 | int status = -EINVAL; |
310 | u8 *command; |
311 | |
312 | dev_dbg(&spi->dev, "write 0x%x..0x%x\n" , |
313 | (unsigned int)to, (unsigned int)(to + len)); |
314 | |
315 | spi_message_init(m: &msg); |
316 | |
317 | x[0].tx_buf = command = priv->command; |
318 | x[0].len = 4; |
319 | spi_message_add_tail(t: &x[0], m: &msg); |
320 | |
321 | pageaddr = ((unsigned)to / priv->page_size); |
322 | offset = ((unsigned)to % priv->page_size); |
323 | if (offset + len > priv->page_size) |
324 | writelen = priv->page_size - offset; |
325 | else |
326 | writelen = len; |
327 | |
328 | mutex_lock(&priv->lock); |
329 | while (remaining > 0) { |
330 | dev_dbg(&spi->dev, "write @ %i:%i len=%i\n" , |
331 | pageaddr, offset, writelen); |
332 | |
333 | /* REVISIT: |
334 | * (a) each page in a sector must be rewritten at least |
335 | * once every 10K sibling erase/program operations. |
336 | * (b) for pages that are already erased, we could |
337 | * use WRITE+MWRITE not PROGRAM for ~30% speedup. |
338 | * (c) WRITE to buffer could be done while waiting for |
339 | * a previous MWRITE/MWERASE to complete ... |
340 | * (d) error handling here seems to be mostly missing. |
341 | * |
342 | * Two persistent bits per page, plus a per-sector counter, |
343 | * could support (a) and (b) ... we might consider using |
344 | * the second half of sector zero, which is just one block, |
345 | * to track that state. (On AT91, that sector should also |
346 | * support boot-from-DataFlash.) |
347 | */ |
348 | |
349 | addr = pageaddr << priv->page_offset; |
350 | |
351 | /* (1) Maybe transfer partial page to Buffer1 */ |
352 | if (writelen != priv->page_size) { |
353 | command[0] = OP_TRANSFER_BUF1; |
354 | command[1] = (addr & 0x00FF0000) >> 16; |
355 | command[2] = (addr & 0x0000FF00) >> 8; |
356 | command[3] = 0; |
357 | |
358 | dev_dbg(&spi->dev, "TRANSFER: (%x) %x %x %x\n" , |
359 | command[0], command[1], command[2], command[3]); |
360 | |
361 | status = spi_sync(spi, message: &msg); |
362 | if (status < 0) |
363 | dev_dbg(&spi->dev, "xfer %u -> %d\n" , |
364 | addr, status); |
365 | |
366 | (void) dataflash_waitready(spi: priv->spi); |
367 | } |
368 | |
369 | /* (2) Program full page via Buffer1 */ |
370 | addr += offset; |
371 | command[0] = OP_PROGRAM_VIA_BUF1; |
372 | command[1] = (addr & 0x00FF0000) >> 16; |
373 | command[2] = (addr & 0x0000FF00) >> 8; |
374 | command[3] = (addr & 0x000000FF); |
375 | |
376 | dev_dbg(&spi->dev, "PROGRAM: (%x) %x %x %x\n" , |
377 | command[0], command[1], command[2], command[3]); |
378 | |
379 | x[1].tx_buf = writebuf; |
380 | x[1].len = writelen; |
381 | spi_message_add_tail(t: x + 1, m: &msg); |
382 | status = spi_sync(spi, message: &msg); |
383 | spi_transfer_del(t: x + 1); |
384 | if (status < 0) |
385 | dev_dbg(&spi->dev, "pgm %u/%u -> %d\n" , |
386 | addr, writelen, status); |
387 | |
388 | (void) dataflash_waitready(spi: priv->spi); |
389 | |
390 | |
391 | #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY |
392 | |
393 | /* (3) Compare to Buffer1 */ |
394 | addr = pageaddr << priv->page_offset; |
395 | command[0] = OP_COMPARE_BUF1; |
396 | command[1] = (addr & 0x00FF0000) >> 16; |
397 | command[2] = (addr & 0x0000FF00) >> 8; |
398 | command[3] = 0; |
399 | |
400 | dev_dbg(&spi->dev, "COMPARE: (%x) %x %x %x\n" , |
401 | command[0], command[1], command[2], command[3]); |
402 | |
403 | status = spi_sync(spi, message: &msg); |
404 | if (status < 0) |
405 | dev_dbg(&spi->dev, "compare %u -> %d\n" , |
406 | addr, status); |
407 | |
408 | status = dataflash_waitready(spi: priv->spi); |
409 | |
410 | /* Check result of the compare operation */ |
411 | if (status & (1 << 6)) { |
412 | dev_err(&spi->dev, "compare page %u, err %d\n" , |
413 | pageaddr, status); |
414 | remaining = 0; |
415 | status = -EIO; |
416 | break; |
417 | } else |
418 | status = 0; |
419 | |
420 | #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */ |
421 | |
422 | remaining = remaining - writelen; |
423 | pageaddr++; |
424 | offset = 0; |
425 | writebuf += writelen; |
426 | *retlen += writelen; |
427 | |
428 | if (remaining > priv->page_size) |
429 | writelen = priv->page_size; |
430 | else |
431 | writelen = remaining; |
432 | } |
433 | mutex_unlock(lock: &priv->lock); |
434 | |
435 | return status; |
436 | } |
437 | |
438 | /* ......................................................................... */ |
439 | |
440 | #ifdef CONFIG_MTD_DATAFLASH_OTP |
441 | |
442 | static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len, |
443 | size_t *retlen, struct otp_info *info) |
444 | { |
445 | /* Report both blocks as identical: bytes 0..64, locked. |
446 | * Unless the user block changed from all-ones, we can't |
447 | * tell whether it's still writable; so we assume it isn't. |
448 | */ |
449 | info->start = 0; |
450 | info->length = 64; |
451 | info->locked = 1; |
452 | *retlen = sizeof(*info); |
453 | return 0; |
454 | } |
455 | |
456 | static ssize_t otp_read(struct spi_device *spi, unsigned base, |
457 | u8 *buf, loff_t off, size_t len) |
458 | { |
459 | struct spi_message m; |
460 | size_t l; |
461 | u8 *scratch; |
462 | struct spi_transfer t; |
463 | int status; |
464 | |
465 | if (off > 64) |
466 | return -EINVAL; |
467 | |
468 | if ((off + len) > 64) |
469 | len = 64 - off; |
470 | |
471 | spi_message_init(m: &m); |
472 | |
473 | l = 4 + base + off + len; |
474 | scratch = kzalloc(size: l, GFP_KERNEL); |
475 | if (!scratch) |
476 | return -ENOMEM; |
477 | |
478 | /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes |
479 | * IN: ignore 4 bytes, data bytes 0..N (max 127) |
480 | */ |
481 | scratch[0] = OP_READ_SECURITY; |
482 | |
483 | memset(&t, 0, sizeof t); |
484 | t.tx_buf = scratch; |
485 | t.rx_buf = scratch; |
486 | t.len = l; |
487 | spi_message_add_tail(t: &t, m: &m); |
488 | |
489 | dataflash_waitready(spi); |
490 | |
491 | status = spi_sync(spi, message: &m); |
492 | if (status >= 0) { |
493 | memcpy(buf, scratch + 4 + base + off, len); |
494 | status = len; |
495 | } |
496 | |
497 | kfree(objp: scratch); |
498 | return status; |
499 | } |
500 | |
501 | static int dataflash_read_fact_otp(struct mtd_info *mtd, |
502 | loff_t from, size_t len, size_t *retlen, u_char *buf) |
503 | { |
504 | struct dataflash *priv = mtd->priv; |
505 | int status; |
506 | |
507 | /* 64 bytes, from 0..63 ... start at 64 on-chip */ |
508 | mutex_lock(&priv->lock); |
509 | status = otp_read(spi: priv->spi, base: 64, buf, off: from, len); |
510 | mutex_unlock(lock: &priv->lock); |
511 | |
512 | if (status < 0) |
513 | return status; |
514 | *retlen = status; |
515 | return 0; |
516 | } |
517 | |
518 | static int dataflash_read_user_otp(struct mtd_info *mtd, |
519 | loff_t from, size_t len, size_t *retlen, u_char *buf) |
520 | { |
521 | struct dataflash *priv = mtd->priv; |
522 | int status; |
523 | |
524 | /* 64 bytes, from 0..63 ... start at 0 on-chip */ |
525 | mutex_lock(&priv->lock); |
526 | status = otp_read(spi: priv->spi, base: 0, buf, off: from, len); |
527 | mutex_unlock(lock: &priv->lock); |
528 | |
529 | if (status < 0) |
530 | return status; |
531 | *retlen = status; |
532 | return 0; |
533 | } |
534 | |
535 | static int dataflash_write_user_otp(struct mtd_info *mtd, |
536 | loff_t from, size_t len, size_t *retlen, const u_char *buf) |
537 | { |
538 | struct spi_message m; |
539 | const size_t l = 4 + 64; |
540 | u8 *scratch; |
541 | struct spi_transfer t; |
542 | struct dataflash *priv = mtd->priv; |
543 | int status; |
544 | |
545 | if (from >= 64) { |
546 | /* |
547 | * Attempting to write beyond the end of OTP memory, |
548 | * no data can be written. |
549 | */ |
550 | *retlen = 0; |
551 | return 0; |
552 | } |
553 | |
554 | /* Truncate the write to fit into OTP memory. */ |
555 | if ((from + len) > 64) |
556 | len = 64 - from; |
557 | |
558 | /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes |
559 | * IN: ignore all |
560 | */ |
561 | scratch = kzalloc(size: l, GFP_KERNEL); |
562 | if (!scratch) |
563 | return -ENOMEM; |
564 | scratch[0] = OP_WRITE_SECURITY; |
565 | memcpy(scratch + 4 + from, buf, len); |
566 | |
567 | spi_message_init(m: &m); |
568 | |
569 | memset(&t, 0, sizeof t); |
570 | t.tx_buf = scratch; |
571 | t.len = l; |
572 | spi_message_add_tail(t: &t, m: &m); |
573 | |
574 | /* Write the OTP bits, if they've not yet been written. |
575 | * This modifies SRAM buffer1. |
576 | */ |
577 | mutex_lock(&priv->lock); |
578 | dataflash_waitready(spi: priv->spi); |
579 | status = spi_sync(spi: priv->spi, message: &m); |
580 | mutex_unlock(lock: &priv->lock); |
581 | |
582 | kfree(objp: scratch); |
583 | |
584 | if (status >= 0) { |
585 | status = 0; |
586 | *retlen = len; |
587 | } |
588 | return status; |
589 | } |
590 | |
591 | static char *otp_setup(struct mtd_info *device, char revision) |
592 | { |
593 | device->_get_fact_prot_info = dataflash_get_otp_info; |
594 | device->_read_fact_prot_reg = dataflash_read_fact_otp; |
595 | device->_get_user_prot_info = dataflash_get_otp_info; |
596 | device->_read_user_prot_reg = dataflash_read_user_otp; |
597 | |
598 | /* rev c parts (at45db321c and at45db1281 only!) use a |
599 | * different write procedure; not (yet?) implemented. |
600 | */ |
601 | if (revision > 'c') |
602 | device->_write_user_prot_reg = dataflash_write_user_otp; |
603 | |
604 | return ", OTP" ; |
605 | } |
606 | |
607 | #else |
608 | |
609 | static char *otp_setup(struct mtd_info *device, char revision) |
610 | { |
611 | return " (OTP)" ; |
612 | } |
613 | |
614 | #endif |
615 | |
616 | /* ......................................................................... */ |
617 | |
618 | /* |
619 | * Register DataFlash device with MTD subsystem. |
620 | */ |
621 | static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages, |
622 | int pagesize, int pageoffset, char revision) |
623 | { |
624 | struct dataflash *priv; |
625 | struct mtd_info *device; |
626 | struct flash_platform_data *pdata = dev_get_platdata(dev: &spi->dev); |
627 | char *otp_tag = "" ; |
628 | int err = 0; |
629 | |
630 | priv = kzalloc(size: sizeof *priv, GFP_KERNEL); |
631 | if (!priv) |
632 | return -ENOMEM; |
633 | |
634 | mutex_init(&priv->lock); |
635 | priv->spi = spi; |
636 | priv->page_size = pagesize; |
637 | priv->page_offset = pageoffset; |
638 | |
639 | /* name must be usable with cmdlinepart */ |
640 | sprintf(buf: priv->name, fmt: "spi%d.%d-%s" , |
641 | spi->controller->bus_num, spi_get_chipselect(spi, idx: 0), |
642 | name); |
643 | |
644 | device = &priv->mtd; |
645 | device->name = (pdata && pdata->name) ? pdata->name : priv->name; |
646 | device->size = nr_pages * pagesize; |
647 | device->erasesize = pagesize; |
648 | device->writesize = pagesize; |
649 | device->type = MTD_DATAFLASH; |
650 | device->flags = MTD_WRITEABLE; |
651 | device->_erase = dataflash_erase; |
652 | device->_read = dataflash_read; |
653 | device->_write = dataflash_write; |
654 | device->priv = priv; |
655 | |
656 | device->dev.parent = &spi->dev; |
657 | mtd_set_of_node(mtd: device, np: spi->dev.of_node); |
658 | |
659 | if (revision >= 'c') |
660 | otp_tag = otp_setup(device, revision); |
661 | |
662 | dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n" , |
663 | name, (long long)((device->size + 1023) >> 10), |
664 | pagesize, otp_tag); |
665 | spi_set_drvdata(spi, data: priv); |
666 | |
667 | err = mtd_device_register(device, |
668 | pdata ? pdata->parts : NULL, |
669 | pdata ? pdata->nr_parts : 0); |
670 | |
671 | if (!err) |
672 | return 0; |
673 | |
674 | kfree(objp: priv); |
675 | return err; |
676 | } |
677 | |
678 | static inline int add_dataflash(struct spi_device *spi, char *name, |
679 | int nr_pages, int pagesize, int pageoffset) |
680 | { |
681 | return add_dataflash_otp(spi, name, nr_pages, pagesize, |
682 | pageoffset, revision: 0); |
683 | } |
684 | |
685 | struct flash_info { |
686 | char *name; |
687 | |
688 | /* JEDEC id has a high byte of zero plus three data bytes: |
689 | * the manufacturer id, then a two byte device id. |
690 | */ |
691 | u64 jedec_id; |
692 | |
693 | /* The size listed here is what works with OP_ERASE_PAGE. */ |
694 | unsigned nr_pages; |
695 | u16 pagesize; |
696 | u16 pageoffset; |
697 | |
698 | u16 flags; |
699 | #define SUP_EXTID 0x0004 /* supports extended ID data */ |
700 | #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ |
701 | #define IS_POW2PS 0x0001 /* uses 2^N byte pages */ |
702 | }; |
703 | |
704 | static struct flash_info dataflash_data[] = { |
705 | |
706 | /* |
707 | * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, |
708 | * one with IS_POW2PS and the other without. The entry with the |
709 | * non-2^N byte page size can't name exact chip revisions without |
710 | * losing backwards compatibility for cmdlinepart. |
711 | * |
712 | * These newer chips also support 128-byte security registers (with |
713 | * 64 bytes one-time-programmable) and software write-protection. |
714 | */ |
715 | { "AT45DB011B" , 0x1f2200, 512, 264, 9, SUP_POW2PS}, |
716 | { "at45db011d" , 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, |
717 | |
718 | { "AT45DB021B" , 0x1f2300, 1024, 264, 9, SUP_POW2PS}, |
719 | { "at45db021d" , 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, |
720 | |
721 | { "AT45DB041x" , 0x1f2400, 2048, 264, 9, SUP_POW2PS}, |
722 | { "at45db041d" , 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, |
723 | |
724 | { "AT45DB081B" , 0x1f2500, 4096, 264, 9, SUP_POW2PS}, |
725 | { "at45db081d" , 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, |
726 | |
727 | { "AT45DB161x" , 0x1f2600, 4096, 528, 10, SUP_POW2PS}, |
728 | { "at45db161d" , 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, |
729 | |
730 | { "AT45DB321x" , 0x1f2700, 8192, 528, 10, 0}, /* rev C */ |
731 | |
732 | { "AT45DB321x" , 0x1f2701, 8192, 528, 10, SUP_POW2PS}, |
733 | { "at45db321d" , 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, |
734 | |
735 | { "AT45DB642x" , 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, |
736 | { "at45db642d" , 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, |
737 | |
738 | { "AT45DB641E" , 0x1f28000100ULL, 32768, 264, 9, SUP_EXTID | SUP_POW2PS}, |
739 | { "at45db641e" , 0x1f28000100ULL, 32768, 256, 8, SUP_EXTID | SUP_POW2PS | IS_POW2PS}, |
740 | }; |
741 | |
742 | static struct flash_info *jedec_lookup(struct spi_device *spi, |
743 | u64 jedec, bool use_extid) |
744 | { |
745 | struct flash_info *info; |
746 | int status; |
747 | |
748 | for (info = dataflash_data; |
749 | info < dataflash_data + ARRAY_SIZE(dataflash_data); |
750 | info++) { |
751 | if (use_extid && !(info->flags & SUP_EXTID)) |
752 | continue; |
753 | |
754 | if (info->jedec_id == jedec) { |
755 | dev_dbg(&spi->dev, "OTP, sector protect%s\n" , |
756 | (info->flags & SUP_POW2PS) ? |
757 | ", binary pagesize" : "" ); |
758 | if (info->flags & SUP_POW2PS) { |
759 | status = dataflash_status(spi); |
760 | if (status < 0) { |
761 | dev_dbg(&spi->dev, "status error %d\n" , |
762 | status); |
763 | return ERR_PTR(error: status); |
764 | } |
765 | if (status & 0x1) { |
766 | if (info->flags & IS_POW2PS) |
767 | return info; |
768 | } else { |
769 | if (!(info->flags & IS_POW2PS)) |
770 | return info; |
771 | } |
772 | } else |
773 | return info; |
774 | } |
775 | } |
776 | |
777 | return ERR_PTR(error: -ENODEV); |
778 | } |
779 | |
780 | static struct flash_info *jedec_probe(struct spi_device *spi) |
781 | { |
782 | int ret; |
783 | u8 code = OP_READ_ID; |
784 | u64 jedec; |
785 | u8 id[sizeof(jedec)] = {0}; |
786 | const unsigned int id_size = 5; |
787 | struct flash_info *info; |
788 | |
789 | /* |
790 | * JEDEC also defines an optional "extended device information" |
791 | * string for after vendor-specific data, after the three bytes |
792 | * we use here. Supporting some chips might require using it. |
793 | * |
794 | * If the vendor ID isn't Atmel's (0x1f), assume this call failed. |
795 | * That's not an error; only rev C and newer chips handle it, and |
796 | * only Atmel sells these chips. |
797 | */ |
798 | ret = spi_write_then_read(spi, txbuf: &code, n_tx: 1, rxbuf: id, n_rx: id_size); |
799 | if (ret < 0) { |
800 | dev_dbg(&spi->dev, "error %d reading JEDEC ID\n" , ret); |
801 | return ERR_PTR(error: ret); |
802 | } |
803 | |
804 | if (id[0] != CFI_MFR_ATMEL) |
805 | return NULL; |
806 | |
807 | jedec = be64_to_cpup(p: (__be64 *)id); |
808 | |
809 | /* |
810 | * First, try to match device using extended device |
811 | * information |
812 | */ |
813 | info = jedec_lookup(spi, jedec: jedec >> DATAFLASH_SHIFT_EXTID, use_extid: true); |
814 | if (!IS_ERR(ptr: info)) |
815 | return info; |
816 | /* |
817 | * If that fails, make another pass using regular ID |
818 | * information |
819 | */ |
820 | info = jedec_lookup(spi, jedec: jedec >> DATAFLASH_SHIFT_ID, use_extid: false); |
821 | if (!IS_ERR(ptr: info)) |
822 | return info; |
823 | /* |
824 | * Treat other chips as errors ... we won't know the right page |
825 | * size (it might be binary) even when we can tell which density |
826 | * class is involved (legacy chip id scheme). |
827 | */ |
828 | dev_warn(&spi->dev, "JEDEC id %016llx not handled\n" , jedec); |
829 | return ERR_PTR(error: -ENODEV); |
830 | } |
831 | |
832 | /* |
833 | * Detect and initialize DataFlash device, using JEDEC IDs on newer chips |
834 | * or else the ID code embedded in the status bits: |
835 | * |
836 | * Device Density ID code #Pages PageSize Offset |
837 | * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 |
838 | * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 |
839 | * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 |
840 | * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 |
841 | * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 |
842 | * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 |
843 | * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 |
844 | * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 |
845 | */ |
846 | static int dataflash_probe(struct spi_device *spi) |
847 | { |
848 | int status; |
849 | struct flash_info *info; |
850 | |
851 | /* |
852 | * Try to detect dataflash by JEDEC ID. |
853 | * If it succeeds we know we have either a C or D part. |
854 | * D will support power of 2 pagesize option. |
855 | * Both support the security register, though with different |
856 | * write procedures. |
857 | */ |
858 | info = jedec_probe(spi); |
859 | if (IS_ERR(ptr: info)) |
860 | return PTR_ERR(ptr: info); |
861 | if (info != NULL) |
862 | return add_dataflash_otp(spi, name: info->name, nr_pages: info->nr_pages, |
863 | pagesize: info->pagesize, pageoffset: info->pageoffset, |
864 | revision: (info->flags & SUP_POW2PS) ? 'd' : 'c'); |
865 | |
866 | /* |
867 | * Older chips support only legacy commands, identifing |
868 | * capacity using bits in the status byte. |
869 | */ |
870 | status = dataflash_status(spi); |
871 | if (status <= 0 || status == 0xff) { |
872 | dev_dbg(&spi->dev, "status error %d\n" , status); |
873 | if (status == 0 || status == 0xff) |
874 | status = -ENODEV; |
875 | return status; |
876 | } |
877 | |
878 | /* if there's a device there, assume it's dataflash. |
879 | * board setup should have set spi->max_speed_max to |
880 | * match f(car) for continuous reads, mode 0 or 3. |
881 | */ |
882 | switch (status & 0x3c) { |
883 | case 0x0c: /* 0 0 1 1 x x */ |
884 | status = add_dataflash(spi, name: "AT45DB011B" , nr_pages: 512, pagesize: 264, pageoffset: 9); |
885 | break; |
886 | case 0x14: /* 0 1 0 1 x x */ |
887 | status = add_dataflash(spi, name: "AT45DB021B" , nr_pages: 1024, pagesize: 264, pageoffset: 9); |
888 | break; |
889 | case 0x1c: /* 0 1 1 1 x x */ |
890 | status = add_dataflash(spi, name: "AT45DB041x" , nr_pages: 2048, pagesize: 264, pageoffset: 9); |
891 | break; |
892 | case 0x24: /* 1 0 0 1 x x */ |
893 | status = add_dataflash(spi, name: "AT45DB081B" , nr_pages: 4096, pagesize: 264, pageoffset: 9); |
894 | break; |
895 | case 0x2c: /* 1 0 1 1 x x */ |
896 | status = add_dataflash(spi, name: "AT45DB161x" , nr_pages: 4096, pagesize: 528, pageoffset: 10); |
897 | break; |
898 | case 0x34: /* 1 1 0 1 x x */ |
899 | status = add_dataflash(spi, name: "AT45DB321x" , nr_pages: 8192, pagesize: 528, pageoffset: 10); |
900 | break; |
901 | case 0x38: /* 1 1 1 x x x */ |
902 | case 0x3c: |
903 | status = add_dataflash(spi, name: "AT45DB642x" , nr_pages: 8192, pagesize: 1056, pageoffset: 11); |
904 | break; |
905 | /* obsolete AT45DB1282 not (yet?) supported */ |
906 | default: |
907 | dev_info(&spi->dev, "unsupported device (%x)\n" , |
908 | status & 0x3c); |
909 | status = -ENODEV; |
910 | } |
911 | |
912 | if (status < 0) |
913 | dev_dbg(&spi->dev, "add_dataflash --> %d\n" , status); |
914 | |
915 | return status; |
916 | } |
917 | |
918 | static void dataflash_remove(struct spi_device *spi) |
919 | { |
920 | struct dataflash *flash = spi_get_drvdata(spi); |
921 | |
922 | dev_dbg(&spi->dev, "remove\n" ); |
923 | |
924 | WARN_ON(mtd_device_unregister(&flash->mtd)); |
925 | |
926 | kfree(objp: flash); |
927 | } |
928 | |
929 | static struct spi_driver dataflash_driver = { |
930 | .driver = { |
931 | .name = "mtd_dataflash" , |
932 | .of_match_table = of_match_ptr(dataflash_dt_ids), |
933 | }, |
934 | .probe = dataflash_probe, |
935 | .remove = dataflash_remove, |
936 | .id_table = dataflash_spi_ids, |
937 | |
938 | /* FIXME: investigate suspend and resume... */ |
939 | }; |
940 | |
941 | module_spi_driver(dataflash_driver); |
942 | |
943 | MODULE_LICENSE("GPL" ); |
944 | MODULE_AUTHOR("Andrew Victor, David Brownell" ); |
945 | MODULE_DESCRIPTION("MTD DataFlash driver" ); |
946 | MODULE_ALIAS("spi:mtd_dataflash" ); |
947 | |