1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Copyright (C) 2005, Intec Automation Inc. |
4 | * Copyright (C) 2014, Freescale Semiconductor, Inc. |
5 | */ |
6 | |
7 | #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H |
8 | #define __LINUX_MTD_SPI_NOR_INTERNAL_H |
9 | |
10 | #include "sfdp.h" |
11 | |
12 | #define SPI_NOR_MAX_ID_LEN 6 |
13 | /* |
14 | * 256 bytes is a sane default for most older flashes. Newer flashes will |
15 | * have the page size defined within their SFDP tables. |
16 | */ |
17 | #define SPI_NOR_DEFAULT_PAGE_SIZE 256 |
18 | #define SPI_NOR_DEFAULT_N_BANKS 1 |
19 | #define SPI_NOR_DEFAULT_SECTOR_SIZE SZ_64K |
20 | |
21 | /* Standard SPI NOR flash operations. */ |
22 | #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ |
23 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \ |
24 | SPI_MEM_OP_ADDR(naddr, 0, 0), \ |
25 | SPI_MEM_OP_DUMMY(ndummy, 0), \ |
26 | SPI_MEM_OP_DATA_IN(len, buf, 0)) |
27 | |
28 | #define SPI_NOR_WREN_OP \ |
29 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \ |
30 | SPI_MEM_OP_NO_ADDR, \ |
31 | SPI_MEM_OP_NO_DUMMY, \ |
32 | SPI_MEM_OP_NO_DATA) |
33 | |
34 | #define SPI_NOR_WRDI_OP \ |
35 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \ |
36 | SPI_MEM_OP_NO_ADDR, \ |
37 | SPI_MEM_OP_NO_DUMMY, \ |
38 | SPI_MEM_OP_NO_DATA) |
39 | |
40 | #define SPI_NOR_RDSR_OP(buf) \ |
41 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \ |
42 | SPI_MEM_OP_NO_ADDR, \ |
43 | SPI_MEM_OP_NO_DUMMY, \ |
44 | SPI_MEM_OP_DATA_IN(1, buf, 0)) |
45 | |
46 | #define SPI_NOR_WRSR_OP(buf, len) \ |
47 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \ |
48 | SPI_MEM_OP_NO_ADDR, \ |
49 | SPI_MEM_OP_NO_DUMMY, \ |
50 | SPI_MEM_OP_DATA_OUT(len, buf, 0)) |
51 | |
52 | #define SPI_NOR_RDSR2_OP(buf) \ |
53 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \ |
54 | SPI_MEM_OP_NO_ADDR, \ |
55 | SPI_MEM_OP_NO_DUMMY, \ |
56 | SPI_MEM_OP_DATA_OUT(1, buf, 0)) |
57 | |
58 | #define SPI_NOR_WRSR2_OP(buf) \ |
59 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \ |
60 | SPI_MEM_OP_NO_ADDR, \ |
61 | SPI_MEM_OP_NO_DUMMY, \ |
62 | SPI_MEM_OP_DATA_OUT(1, buf, 0)) |
63 | |
64 | #define SPI_NOR_RDCR_OP(buf) \ |
65 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \ |
66 | SPI_MEM_OP_NO_ADDR, \ |
67 | SPI_MEM_OP_NO_DUMMY, \ |
68 | SPI_MEM_OP_DATA_IN(1, buf, 0)) |
69 | |
70 | #define SPI_NOR_EN4B_EX4B_OP(enable) \ |
71 | SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \ |
72 | SPI_MEM_OP_NO_ADDR, \ |
73 | SPI_MEM_OP_NO_DUMMY, \ |
74 | SPI_MEM_OP_NO_DATA) |
75 | |
76 | #define SPI_NOR_BRWR_OP(buf) \ |
77 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \ |
78 | SPI_MEM_OP_NO_ADDR, \ |
79 | SPI_MEM_OP_NO_DUMMY, \ |
80 | SPI_MEM_OP_DATA_OUT(1, buf, 0)) |
81 | |
82 | #define SPI_NOR_GBULK_OP \ |
83 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \ |
84 | SPI_MEM_OP_NO_ADDR, \ |
85 | SPI_MEM_OP_NO_DUMMY, \ |
86 | SPI_MEM_OP_NO_DATA) |
87 | |
88 | #define SPI_NOR_CHIP_ERASE_OP \ |
89 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CHIP_ERASE, 0), \ |
90 | SPI_MEM_OP_NO_ADDR, \ |
91 | SPI_MEM_OP_NO_DUMMY, \ |
92 | SPI_MEM_OP_NO_DATA) |
93 | |
94 | #define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr) \ |
95 | SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ |
96 | SPI_MEM_OP_ADDR(addr_nbytes, addr, 0), \ |
97 | SPI_MEM_OP_NO_DUMMY, \ |
98 | SPI_MEM_OP_NO_DATA) |
99 | |
100 | #define SPI_NOR_READ_OP(opcode) \ |
101 | SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ |
102 | SPI_MEM_OP_ADDR(3, 0, 0), \ |
103 | SPI_MEM_OP_DUMMY(1, 0), \ |
104 | SPI_MEM_OP_DATA_IN(2, NULL, 0)) |
105 | |
106 | #define SPI_NOR_PP_OP(opcode) \ |
107 | SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ |
108 | SPI_MEM_OP_ADDR(3, 0, 0), \ |
109 | SPI_MEM_OP_NO_DUMMY, \ |
110 | SPI_MEM_OP_DATA_OUT(2, NULL, 0)) |
111 | |
112 | #define SPINOR_SRSTEN_OP \ |
113 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \ |
114 | SPI_MEM_OP_NO_DUMMY, \ |
115 | SPI_MEM_OP_NO_ADDR, \ |
116 | SPI_MEM_OP_NO_DATA) |
117 | |
118 | #define SPINOR_SRST_OP \ |
119 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \ |
120 | SPI_MEM_OP_NO_DUMMY, \ |
121 | SPI_MEM_OP_NO_ADDR, \ |
122 | SPI_MEM_OP_NO_DATA) |
123 | |
124 | /* Keep these in sync with the list in debugfs.c */ |
125 | enum spi_nor_option_flags { |
126 | SNOR_F_HAS_SR_TB = BIT(0), |
127 | SNOR_F_NO_OP_CHIP_ERASE = BIT(1), |
128 | SNOR_F_BROKEN_RESET = BIT(2), |
129 | SNOR_F_4B_OPCODES = BIT(3), |
130 | SNOR_F_HAS_4BAIT = BIT(4), |
131 | SNOR_F_HAS_LOCK = BIT(5), |
132 | SNOR_F_HAS_16BIT_SR = BIT(6), |
133 | SNOR_F_NO_READ_CR = BIT(7), |
134 | SNOR_F_HAS_SR_TB_BIT6 = BIT(8), |
135 | SNOR_F_HAS_4BIT_BP = BIT(9), |
136 | SNOR_F_HAS_SR_BP3_BIT6 = BIT(10), |
137 | SNOR_F_IO_MODE_EN_VOLATILE = BIT(11), |
138 | SNOR_F_SOFT_RESET = BIT(12), |
139 | SNOR_F_SWP_IS_VOLATILE = BIT(13), |
140 | SNOR_F_RWW = BIT(14), |
141 | SNOR_F_ECC = BIT(15), |
142 | SNOR_F_NO_WP = BIT(16), |
143 | }; |
144 | |
145 | struct spi_nor_read_command { |
146 | u8 num_mode_clocks; |
147 | u8 num_wait_states; |
148 | u8 opcode; |
149 | enum spi_nor_protocol proto; |
150 | }; |
151 | |
152 | struct spi_nor_pp_command { |
153 | u8 opcode; |
154 | enum spi_nor_protocol proto; |
155 | }; |
156 | |
157 | enum spi_nor_read_command_index { |
158 | SNOR_CMD_READ, |
159 | SNOR_CMD_READ_FAST, |
160 | SNOR_CMD_READ_1_1_1_DTR, |
161 | |
162 | /* Dual SPI */ |
163 | SNOR_CMD_READ_1_1_2, |
164 | SNOR_CMD_READ_1_2_2, |
165 | SNOR_CMD_READ_2_2_2, |
166 | SNOR_CMD_READ_1_2_2_DTR, |
167 | |
168 | /* Quad SPI */ |
169 | SNOR_CMD_READ_1_1_4, |
170 | SNOR_CMD_READ_1_4_4, |
171 | SNOR_CMD_READ_4_4_4, |
172 | SNOR_CMD_READ_1_4_4_DTR, |
173 | |
174 | /* Octal SPI */ |
175 | SNOR_CMD_READ_1_1_8, |
176 | SNOR_CMD_READ_1_8_8, |
177 | SNOR_CMD_READ_8_8_8, |
178 | SNOR_CMD_READ_1_8_8_DTR, |
179 | SNOR_CMD_READ_8_8_8_DTR, |
180 | |
181 | SNOR_CMD_READ_MAX |
182 | }; |
183 | |
184 | enum spi_nor_pp_command_index { |
185 | SNOR_CMD_PP, |
186 | |
187 | /* Quad SPI */ |
188 | SNOR_CMD_PP_1_1_4, |
189 | SNOR_CMD_PP_1_4_4, |
190 | SNOR_CMD_PP_4_4_4, |
191 | |
192 | /* Octal SPI */ |
193 | SNOR_CMD_PP_1_1_8, |
194 | SNOR_CMD_PP_1_8_8, |
195 | SNOR_CMD_PP_8_8_8, |
196 | SNOR_CMD_PP_8_8_8_DTR, |
197 | |
198 | SNOR_CMD_PP_MAX |
199 | }; |
200 | |
201 | /** |
202 | * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type |
203 | * @size: the size of the sector/block erased by the erase type. |
204 | * JEDEC JESD216B imposes erase sizes to be a power of 2. |
205 | * @size_shift: @size is a power of 2, the shift is stored in |
206 | * @size_shift. |
207 | * @size_mask: the size mask based on @size_shift. |
208 | * @opcode: the SPI command op code to erase the sector/block. |
209 | * @idx: Erase Type index as sorted in the Basic Flash Parameter |
210 | * Table. It will be used to synchronize the supported |
211 | * Erase Types with the ones identified in the SFDP |
212 | * optional tables. |
213 | */ |
214 | struct spi_nor_erase_type { |
215 | u32 size; |
216 | u32 size_shift; |
217 | u32 size_mask; |
218 | u8 opcode; |
219 | u8 idx; |
220 | }; |
221 | |
222 | /** |
223 | * struct spi_nor_erase_command - Used for non-uniform erases |
224 | * The structure is used to describe a list of erase commands to be executed |
225 | * once we validate that the erase can be performed. The elements in the list |
226 | * are run-length encoded. |
227 | * @list: for inclusion into the list of erase commands. |
228 | * @count: how many times the same erase command should be |
229 | * consecutively used. |
230 | * @size: the size of the sector/block erased by the command. |
231 | * @opcode: the SPI command op code to erase the sector/block. |
232 | */ |
233 | struct spi_nor_erase_command { |
234 | struct list_head list; |
235 | u32 count; |
236 | u32 size; |
237 | u8 opcode; |
238 | }; |
239 | |
240 | /** |
241 | * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region |
242 | * @offset: the offset in the data array of erase region start. |
243 | * LSB bits are used as a bitmask encoding flags to |
244 | * determine if this region is overlaid, if this region is |
245 | * the last in the SPI NOR flash memory and to indicate |
246 | * all the supported erase commands inside this region. |
247 | * The erase types are sorted in ascending order with the |
248 | * smallest Erase Type size being at BIT(0). |
249 | * @size: the size of the region in bytes. |
250 | */ |
251 | struct spi_nor_erase_region { |
252 | u64 offset; |
253 | u64 size; |
254 | }; |
255 | |
256 | #define SNOR_ERASE_TYPE_MAX 4 |
257 | #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0) |
258 | |
259 | #define SNOR_LAST_REGION BIT(4) |
260 | #define SNOR_OVERLAID_REGION BIT(5) |
261 | |
262 | #define SNOR_ERASE_FLAGS_MAX 6 |
263 | #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0) |
264 | |
265 | /** |
266 | * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map |
267 | * @regions: array of erase regions. The regions are consecutive in |
268 | * address space. Walking through the regions is done |
269 | * incrementally. |
270 | * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform |
271 | * sector size (legacy implementation). |
272 | * @erase_type: an array of erase types shared by all the regions. |
273 | * The erase types are sorted in ascending order, with the |
274 | * smallest Erase Type size being the first member in the |
275 | * erase_type array. |
276 | * @uniform_erase_type: bitmask encoding erase types that can erase the |
277 | * entire memory. This member is completed at init by |
278 | * uniform and non-uniform SPI NOR flash memories if they |
279 | * support at least one erase type that can erase the |
280 | * entire memory. |
281 | */ |
282 | struct spi_nor_erase_map { |
283 | struct spi_nor_erase_region *regions; |
284 | struct spi_nor_erase_region uniform_region; |
285 | struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX]; |
286 | u8 uniform_erase_type; |
287 | }; |
288 | |
289 | /** |
290 | * struct spi_nor_locking_ops - SPI NOR locking methods |
291 | * @lock: lock a region of the SPI NOR. |
292 | * @unlock: unlock a region of the SPI NOR. |
293 | * @is_locked: check if a region of the SPI NOR is completely locked |
294 | */ |
295 | struct spi_nor_locking_ops { |
296 | int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len); |
297 | int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); |
298 | int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); |
299 | }; |
300 | |
301 | /** |
302 | * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions |
303 | * @len: size of one OTP region in bytes. |
304 | * @base: start address of the OTP area. |
305 | * @offset: offset between consecutive OTP regions if there are more |
306 | * than one. |
307 | * @n_regions: number of individual OTP regions. |
308 | */ |
309 | struct spi_nor_otp_organization { |
310 | size_t len; |
311 | loff_t base; |
312 | loff_t offset; |
313 | unsigned int n_regions; |
314 | }; |
315 | |
316 | /** |
317 | * struct spi_nor_otp_ops - SPI NOR OTP methods |
318 | * @read: read from the SPI NOR OTP area. |
319 | * @write: write to the SPI NOR OTP area. |
320 | * @lock: lock an OTP region. |
321 | * @erase: erase an OTP region. |
322 | * @is_locked: check if an OTP region of the SPI NOR is locked. |
323 | */ |
324 | struct spi_nor_otp_ops { |
325 | int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); |
326 | int (*write)(struct spi_nor *nor, loff_t addr, size_t len, |
327 | const u8 *buf); |
328 | int (*lock)(struct spi_nor *nor, unsigned int region); |
329 | int (*erase)(struct spi_nor *nor, loff_t addr); |
330 | int (*is_locked)(struct spi_nor *nor, unsigned int region); |
331 | }; |
332 | |
333 | /** |
334 | * struct spi_nor_otp - SPI NOR OTP grouping structure |
335 | * @org: OTP region organization |
336 | * @ops: OTP access ops |
337 | */ |
338 | struct spi_nor_otp { |
339 | const struct spi_nor_otp_organization *org; |
340 | const struct spi_nor_otp_ops *ops; |
341 | }; |
342 | |
343 | /** |
344 | * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings. |
345 | * Includes legacy flash parameters and settings that can be overwritten |
346 | * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216 |
347 | * Serial Flash Discoverable Parameters (SFDP) tables. |
348 | * |
349 | * @bank_size: the flash memory bank density in bytes. |
350 | * @size: the total flash memory density in bytes. |
351 | * @writesize Minimal writable flash unit size. Defaults to 1. Set to |
352 | * ECC unit size for ECC-ed flashes. |
353 | * @page_size: the page size of the SPI NOR flash memory. |
354 | * @addr_nbytes: number of address bytes to send. |
355 | * @addr_mode_nbytes: number of address bytes of current address mode. Useful |
356 | * when the flash operates with 4B opcodes but needs the |
357 | * internal address mode for opcodes that don't have a 4B |
358 | * opcode correspondent. |
359 | * @rdsr_dummy: dummy cycles needed for Read Status Register command |
360 | * in octal DTR mode. |
361 | * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register |
362 | * command in octal DTR mode. |
363 | * @n_banks: number of banks. |
364 | * @n_dice: number of dice in the flash memory. |
365 | * @vreg_offset: volatile register offset for each die. |
366 | * @hwcaps: describes the read and page program hardware |
367 | * capabilities. |
368 | * @reads: read capabilities ordered by priority: the higher index |
369 | * in the array, the higher priority. |
370 | * @page_programs: page program capabilities ordered by priority: the |
371 | * higher index in the array, the higher priority. |
372 | * @erase_map: the erase map parsed from the SFDP Sector Map Parameter |
373 | * Table. |
374 | * @otp: SPI NOR OTP info. |
375 | * @set_octal_dtr: enables or disables SPI NOR octal DTR mode. |
376 | * @quad_enable: enables SPI NOR quad mode. |
377 | * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. |
378 | * @convert_addr: converts an absolute address into something the flash |
379 | * will understand. Particularly useful when pagesize is |
380 | * not a power-of-2. |
381 | * @setup: (optional) configures the SPI NOR memory. Useful for |
382 | * SPI NOR flashes that have peculiarities to the SPI NOR |
383 | * standard e.g. different opcodes, specific address |
384 | * calculation, page size, etc. |
385 | * @ready: (optional) flashes might use a different mechanism |
386 | * than reading the status register to indicate they |
387 | * are ready for a new command |
388 | * @locking_ops: SPI NOR locking methods. |
389 | * @priv: flash's private data. |
390 | */ |
391 | struct spi_nor_flash_parameter { |
392 | u64 bank_size; |
393 | u64 size; |
394 | u32 writesize; |
395 | u32 page_size; |
396 | u8 addr_nbytes; |
397 | u8 addr_mode_nbytes; |
398 | u8 rdsr_dummy; |
399 | u8 rdsr_addr_nbytes; |
400 | u8 n_banks; |
401 | u8 n_dice; |
402 | u32 *vreg_offset; |
403 | |
404 | struct spi_nor_hwcaps hwcaps; |
405 | struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; |
406 | struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX]; |
407 | |
408 | struct spi_nor_erase_map erase_map; |
409 | struct spi_nor_otp otp; |
410 | |
411 | int (*set_octal_dtr)(struct spi_nor *nor, bool enable); |
412 | int (*quad_enable)(struct spi_nor *nor); |
413 | int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); |
414 | u32 (*convert_addr)(struct spi_nor *nor, u32 addr); |
415 | int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps); |
416 | int (*ready)(struct spi_nor *nor); |
417 | |
418 | const struct spi_nor_locking_ops *locking_ops; |
419 | void *priv; |
420 | }; |
421 | |
422 | /** |
423 | * struct spi_nor_fixups - SPI NOR fixup hooks |
424 | * @default_init: called after default flash parameters init. Used to tweak |
425 | * flash parameters when information provided by the flash_info |
426 | * table is incomplete or wrong. |
427 | * @post_bfpt: called after the BFPT table has been parsed |
428 | * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs |
429 | * that do not support RDSFDP). Typically used to tweak various |
430 | * parameters that could not be extracted by other means (i.e. |
431 | * when information provided by the SFDP/flash_info tables are |
432 | * incomplete or wrong). |
433 | * @late_init: used to initialize flash parameters that are not declared in the |
434 | * JESD216 SFDP standard, or where SFDP tables not defined at all. |
435 | * Will replace the default_init() hook. |
436 | * |
437 | * Those hooks can be used to tweak the SPI NOR configuration when the SFDP |
438 | * table is broken or not available. |
439 | */ |
440 | struct spi_nor_fixups { |
441 | void (*default_init)(struct spi_nor *nor); |
442 | int (*post_bfpt)(struct spi_nor *nor, |
443 | const struct sfdp_parameter_header *, |
444 | const struct sfdp_bfpt *bfpt); |
445 | int (*post_sfdp)(struct spi_nor *nor); |
446 | int (*late_init)(struct spi_nor *nor); |
447 | }; |
448 | |
449 | /** |
450 | * struct spi_nor_id - SPI NOR flash ID. |
451 | * |
452 | * @bytes: the bytes returned by the flash when issuing command 9F. Typically, |
453 | * the first byte is the manufacturer ID code (see JEP106) and the next |
454 | * two bytes are a flash part specific ID. |
455 | * @len: the number of bytes of ID. |
456 | */ |
457 | struct spi_nor_id { |
458 | const u8 *bytes; |
459 | u8 len; |
460 | }; |
461 | |
462 | /** |
463 | * struct flash_info - SPI NOR flash_info entry. |
464 | * @id: pointer to struct spi_nor_id or NULL, which means "no ID" (mostly |
465 | * older chips). |
466 | * @name: the name of the flash. |
467 | * @size: the size of the flash in bytes. |
468 | * @sector_size: (optional) the size listed here is what works with |
469 | * SPINOR_OP_SE, which isn't necessarily called a "sector" by |
470 | * the vendor. Defaults to 64k. |
471 | * @n_banks: (optional) the number of banks. Defaults to 1. |
472 | * @page_size: (optional) the flash's page size. Defaults to 256. |
473 | * @addr_nbytes: number of address bytes to send. |
474 | * |
475 | * @flags: flags that indicate support that is not defined by the |
476 | * JESD216 standard in its SFDP tables. Flag meanings: |
477 | * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR |
478 | * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be |
479 | * used with SPI_NOR_HAS_LOCK. |
480 | * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register. |
481 | * Must be used with SPI_NOR_HAS_TB. |
482 | * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block |
483 | * protection. |
484 | * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with |
485 | * SPI_NOR_4BIT_BP. |
486 | * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits. |
487 | * Usually these will power-up in a write-protected |
488 | * state. |
489 | * SPI_NOR_NO_ERASE: no erase command needed. |
490 | * NO_CHIP_ERASE: chip does not support chip erase. |
491 | * SPI_NOR_NO_FR: can't do fastread. |
492 | * SPI_NOR_QUAD_PP: flash supports Quad Input Page Program. |
493 | * SPI_NOR_RWW: flash supports reads while write. |
494 | * |
495 | * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP. |
496 | * Used when SFDP tables are not defined in the flash. These |
497 | * flags are used together with the SPI_NOR_SKIP_SFDP flag. |
498 | * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables. |
499 | * SECT_4K: SPINOR_OP_BE_4K works uniformly. |
500 | * SPI_NOR_DUAL_READ: flash supports Dual Read. |
501 | * SPI_NOR_QUAD_READ: flash supports Quad Read. |
502 | * SPI_NOR_OCTAL_READ: flash supports Octal Read. |
503 | * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. |
504 | * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. |
505 | * |
506 | * @fixup_flags: flags that indicate support that can be discovered via SFDP |
507 | * ideally, but can not be discovered for this particular flash |
508 | * because the SFDP table that indicates this support is not |
509 | * defined by the flash. In case the table for this support is |
510 | * defined but has wrong values, one should instead use a |
511 | * post_sfdp() hook to set the SNOR_F equivalent flag. |
512 | * |
513 | * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support |
514 | * memory size above 128Mib. |
515 | * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode |
516 | * via a volatile bit. |
517 | * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup |
518 | * hooks to differentiate support between flashes of the same |
519 | * manufacturer. |
520 | * @otp_org: flash's OTP organization. |
521 | * @fixups: part specific fixup hooks. |
522 | */ |
523 | struct flash_info { |
524 | char *name; |
525 | const struct spi_nor_id *id; |
526 | size_t size; |
527 | unsigned sector_size; |
528 | u16 page_size; |
529 | u8 n_banks; |
530 | u8 addr_nbytes; |
531 | |
532 | u16 flags; |
533 | #define SPI_NOR_HAS_LOCK BIT(0) |
534 | #define SPI_NOR_HAS_TB BIT(1) |
535 | #define SPI_NOR_TB_SR_BIT6 BIT(2) |
536 | #define SPI_NOR_4BIT_BP BIT(3) |
537 | #define SPI_NOR_BP3_SR_BIT6 BIT(4) |
538 | #define SPI_NOR_SWP_IS_VOLATILE BIT(5) |
539 | #define SPI_NOR_NO_ERASE BIT(6) |
540 | #define NO_CHIP_ERASE BIT(7) |
541 | #define SPI_NOR_NO_FR BIT(8) |
542 | #define SPI_NOR_QUAD_PP BIT(9) |
543 | #define SPI_NOR_RWW BIT(10) |
544 | |
545 | u8 no_sfdp_flags; |
546 | #define SPI_NOR_SKIP_SFDP BIT(0) |
547 | #define SECT_4K BIT(1) |
548 | #define SPI_NOR_DUAL_READ BIT(3) |
549 | #define SPI_NOR_QUAD_READ BIT(4) |
550 | #define SPI_NOR_OCTAL_READ BIT(5) |
551 | #define SPI_NOR_OCTAL_DTR_READ BIT(6) |
552 | #define SPI_NOR_OCTAL_DTR_PP BIT(7) |
553 | |
554 | u8 fixup_flags; |
555 | #define SPI_NOR_4B_OPCODES BIT(0) |
556 | #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1) |
557 | |
558 | u8 mfr_flags; |
559 | |
560 | const struct spi_nor_otp_organization *otp; |
561 | const struct spi_nor_fixups *fixups; |
562 | }; |
563 | |
564 | #define SNOR_ID(...) \ |
565 | (&(const struct spi_nor_id){ \ |
566 | .bytes = (const u8[]){ __VA_ARGS__ }, \ |
567 | .len = sizeof((u8[]){ __VA_ARGS__ }), \ |
568 | }) |
569 | |
570 | #define SNOR_OTP(_len, _n_regions, _base, _offset) \ |
571 | (&(const struct spi_nor_otp_organization){ \ |
572 | .len = (_len), \ |
573 | .base = (_base), \ |
574 | .offset = (_offset), \ |
575 | .n_regions = (_n_regions), \ |
576 | }) |
577 | |
578 | /** |
579 | * struct spi_nor_manufacturer - SPI NOR manufacturer object |
580 | * @name: manufacturer name |
581 | * @parts: array of parts supported by this manufacturer |
582 | * @nparts: number of entries in the parts array |
583 | * @fixups: hooks called at various points in time during spi_nor_scan() |
584 | */ |
585 | struct spi_nor_manufacturer { |
586 | const char *name; |
587 | const struct flash_info *parts; |
588 | unsigned int nparts; |
589 | const struct spi_nor_fixups *fixups; |
590 | }; |
591 | |
592 | /** |
593 | * struct sfdp - SFDP data |
594 | * @num_dwords: number of entries in the dwords array |
595 | * @dwords: array of double words of the SFDP data |
596 | */ |
597 | struct sfdp { |
598 | size_t num_dwords; |
599 | u32 *dwords; |
600 | }; |
601 | |
602 | /* Manufacturer drivers. */ |
603 | extern const struct spi_nor_manufacturer spi_nor_atmel; |
604 | extern const struct spi_nor_manufacturer spi_nor_eon; |
605 | extern const struct spi_nor_manufacturer spi_nor_esmt; |
606 | extern const struct spi_nor_manufacturer spi_nor_everspin; |
607 | extern const struct spi_nor_manufacturer spi_nor_gigadevice; |
608 | extern const struct spi_nor_manufacturer spi_nor_intel; |
609 | extern const struct spi_nor_manufacturer spi_nor_issi; |
610 | extern const struct spi_nor_manufacturer spi_nor_macronix; |
611 | extern const struct spi_nor_manufacturer spi_nor_micron; |
612 | extern const struct spi_nor_manufacturer spi_nor_st; |
613 | extern const struct spi_nor_manufacturer spi_nor_spansion; |
614 | extern const struct spi_nor_manufacturer spi_nor_sst; |
615 | extern const struct spi_nor_manufacturer spi_nor_winbond; |
616 | extern const struct spi_nor_manufacturer spi_nor_xilinx; |
617 | extern const struct spi_nor_manufacturer spi_nor_xmc; |
618 | |
619 | extern const struct attribute_group *spi_nor_sysfs_groups[]; |
620 | |
621 | void spi_nor_spimem_setup_op(const struct spi_nor *nor, |
622 | struct spi_mem_op *op, |
623 | const enum spi_nor_protocol proto); |
624 | int spi_nor_write_enable(struct spi_nor *nor); |
625 | int spi_nor_write_disable(struct spi_nor *nor); |
626 | int spi_nor_set_4byte_addr_mode_en4b_ex4b(struct spi_nor *nor, bool enable); |
627 | int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(struct spi_nor *nor, |
628 | bool enable); |
629 | int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *nor, bool enable); |
630 | int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable); |
631 | int spi_nor_wait_till_ready(struct spi_nor *nor); |
632 | int spi_nor_global_block_unlock(struct spi_nor *nor); |
633 | int spi_nor_prep_and_lock(struct spi_nor *nor); |
634 | void spi_nor_unlock_and_unprep(struct spi_nor *nor); |
635 | int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); |
636 | int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); |
637 | int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); |
638 | int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id, |
639 | enum spi_nor_protocol reg_proto); |
640 | int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); |
641 | int spi_nor_sr_ready(struct spi_nor *nor); |
642 | int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); |
643 | int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); |
644 | int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); |
645 | int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); |
646 | |
647 | ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, |
648 | u8 *buf); |
649 | ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, |
650 | const u8 *buf); |
651 | int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op, |
652 | enum spi_nor_protocol proto); |
653 | int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op, |
654 | enum spi_nor_protocol proto); |
655 | int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); |
656 | |
657 | int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); |
658 | int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, |
659 | const u8 *buf); |
660 | int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr); |
661 | int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region); |
662 | int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region); |
663 | |
664 | int spi_nor_hwcaps_read2cmd(u32 hwcaps); |
665 | int spi_nor_hwcaps_pp2cmd(u32 hwcaps); |
666 | u8 spi_nor_convert_3to4_read(u8 opcode); |
667 | void spi_nor_set_read_settings(struct spi_nor_read_command *read, |
668 | u8 num_mode_clocks, |
669 | u8 num_wait_states, |
670 | u8 opcode, |
671 | enum spi_nor_protocol proto); |
672 | void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode, |
673 | enum spi_nor_protocol proto); |
674 | |
675 | void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size, |
676 | u8 opcode); |
677 | void spi_nor_mask_erase_type(struct spi_nor_erase_type *erase); |
678 | struct spi_nor_erase_region * |
679 | spi_nor_region_next(struct spi_nor_erase_region *region); |
680 | void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map, |
681 | u8 erase_mask, u64 flash_size); |
682 | |
683 | int spi_nor_post_bfpt_fixups(struct spi_nor *nor, |
684 | const struct sfdp_parameter_header *, |
685 | const struct sfdp_bfpt *bfpt); |
686 | |
687 | void spi_nor_init_default_locking_ops(struct spi_nor *nor); |
688 | void spi_nor_try_unlock_all(struct spi_nor *nor); |
689 | void spi_nor_set_mtd_locking_ops(struct spi_nor *nor); |
690 | void spi_nor_set_mtd_otp_ops(struct spi_nor *nor); |
691 | |
692 | int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, |
693 | u8 *buf, size_t len); |
694 | int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, |
695 | const u8 *buf, size_t len); |
696 | |
697 | int spi_nor_check_sfdp_signature(struct spi_nor *nor); |
698 | int spi_nor_parse_sfdp(struct spi_nor *nor); |
699 | |
700 | static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd) |
701 | { |
702 | return container_of(mtd, struct spi_nor, mtd); |
703 | } |
704 | |
705 | /** |
706 | * spi_nor_needs_sfdp() - returns true if SFDP parsing is used for this flash. |
707 | * |
708 | * Return: true if SFDP parsing is needed |
709 | */ |
710 | static inline bool spi_nor_needs_sfdp(const struct spi_nor *nor) |
711 | { |
712 | /* |
713 | * The flash size is one property parsed by the SFDP. We use it as an |
714 | * indicator whether we need SFDP parsing for a particular flash. I.e. |
715 | * non-legacy flash entries in flash_info will have a size of zero iff |
716 | * SFDP should be used. |
717 | */ |
718 | return !nor->info->size; |
719 | } |
720 | |
721 | #ifdef CONFIG_DEBUG_FS |
722 | void spi_nor_debugfs_register(struct spi_nor *nor); |
723 | void spi_nor_debugfs_shutdown(void); |
724 | #else |
725 | static inline void spi_nor_debugfs_register(struct spi_nor *nor) {} |
726 | static inline void spi_nor_debugfs_shutdown(void) {} |
727 | #endif |
728 | |
729 | #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */ |
730 | |