1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (C) 2008 Per Dalen <per.dalen@cnw.se> |
4 | * |
5 | * Parts of this software are based on (derived) the following: |
6 | * |
7 | * - Kvaser linux driver, version 4.72 BETA |
8 | * Copyright (C) 2002-2007 KVASER AB |
9 | * |
10 | * - Lincan driver, version 0.3.3, OCERA project |
11 | * Copyright (C) 2004 Pavel Pisa |
12 | * Copyright (C) 2001 Arnaud Westenberg |
13 | * |
14 | * - Socketcan SJA1000 drivers |
15 | * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com> |
16 | * Copyright (c) 2002-2007 Volkswagen Group Electronic Research |
17 | * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33, |
18 | * 38106 Braunschweig, GERMANY |
19 | */ |
20 | |
21 | #include <linux/kernel.h> |
22 | #include <linux/module.h> |
23 | #include <linux/interrupt.h> |
24 | #include <linux/netdevice.h> |
25 | #include <linux/delay.h> |
26 | #include <linux/pci.h> |
27 | #include <linux/can/dev.h> |
28 | #include <linux/io.h> |
29 | |
30 | #include "sja1000.h" |
31 | |
32 | #define DRV_NAME "kvaser_pci" |
33 | |
34 | MODULE_AUTHOR("Per Dalen <per.dalen@cnw.se>" ); |
35 | MODULE_DESCRIPTION("Socket-CAN driver for KVASER PCAN PCI cards" ); |
36 | MODULE_LICENSE("GPL v2" ); |
37 | |
38 | #define MAX_NO_OF_CHANNELS 4 /* max no of channels on a single card */ |
39 | |
40 | struct kvaser_pci { |
41 | int channel; |
42 | struct pci_dev *pci_dev; |
43 | struct net_device *slave_dev[MAX_NO_OF_CHANNELS-1]; |
44 | void __iomem *conf_addr; |
45 | void __iomem *res_addr; |
46 | int no_channels; |
47 | u8 xilinx_ver; |
48 | }; |
49 | |
50 | #define KVASER_PCI_CAN_CLOCK (16000000 / 2) |
51 | |
52 | /* |
53 | * The board configuration is probably following: |
54 | * RX1 is connected to ground. |
55 | * TX1 is not connected. |
56 | * CLKO is not connected. |
57 | * Setting the OCR register to 0xDA is a good idea. |
58 | * This means normal output mode , push-pull and the correct polarity. |
59 | */ |
60 | #define KVASER_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL) |
61 | |
62 | /* |
63 | * In the CDR register, you should set CBP to 1. |
64 | * You will probably also want to set the clock divider value to 0 |
65 | * (meaning divide-by-2), the Pelican bit, and the clock-off bit |
66 | * (you will have no need for CLKOUT anyway). |
67 | */ |
68 | #define KVASER_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) |
69 | |
70 | /* |
71 | * These register values are valid for revision 14 of the Xilinx logic. |
72 | */ |
73 | #define XILINX_VERINT 7 /* Lower nibble simulate interrupts, |
74 | high nibble version number. */ |
75 | |
76 | #define XILINX_PRESUMED_VERSION 14 |
77 | |
78 | /* |
79 | * Important S5920 registers |
80 | */ |
81 | #define S5920_INTCSR 0x38 |
82 | #define S5920_PTCR 0x60 |
83 | #define INTCSR_ADDON_INTENABLE_M 0x2000 |
84 | |
85 | |
86 | #define KVASER_PCI_PORT_BYTES 0x20 |
87 | |
88 | #define PCI_CONFIG_PORT_SIZE 0x80 /* size of the config io-memory */ |
89 | #define PCI_PORT_SIZE 0x80 /* size of a channel io-memory */ |
90 | #define PCI_PORT_XILINX_SIZE 0x08 /* size of a xilinx io-memory */ |
91 | |
92 | #define KVASER_PCI_VENDOR_ID1 0x10e8 /* the PCI device and vendor IDs */ |
93 | #define KVASER_PCI_DEVICE_ID1 0x8406 |
94 | |
95 | #define KVASER_PCI_VENDOR_ID2 0x1a07 /* the PCI device and vendor IDs */ |
96 | #define KVASER_PCI_DEVICE_ID2 0x0008 |
97 | |
98 | static const struct pci_device_id kvaser_pci_tbl[] = { |
99 | {KVASER_PCI_VENDOR_ID1, KVASER_PCI_DEVICE_ID1, PCI_ANY_ID, PCI_ANY_ID,}, |
100 | {KVASER_PCI_VENDOR_ID2, KVASER_PCI_DEVICE_ID2, PCI_ANY_ID, PCI_ANY_ID,}, |
101 | { 0,} |
102 | }; |
103 | |
104 | MODULE_DEVICE_TABLE(pci, kvaser_pci_tbl); |
105 | |
106 | static u8 kvaser_pci_read_reg(const struct sja1000_priv *priv, int port) |
107 | { |
108 | return ioread8(priv->reg_base + port); |
109 | } |
110 | |
111 | static void kvaser_pci_write_reg(const struct sja1000_priv *priv, |
112 | int port, u8 val) |
113 | { |
114 | iowrite8(val, priv->reg_base + port); |
115 | } |
116 | |
117 | static void kvaser_pci_disable_irq(struct net_device *dev) |
118 | { |
119 | struct sja1000_priv *priv = netdev_priv(dev); |
120 | struct kvaser_pci *board = priv->priv; |
121 | u32 intcsr; |
122 | |
123 | /* Disable interrupts from card */ |
124 | intcsr = ioread32(board->conf_addr + S5920_INTCSR); |
125 | intcsr &= ~INTCSR_ADDON_INTENABLE_M; |
126 | iowrite32(intcsr, board->conf_addr + S5920_INTCSR); |
127 | } |
128 | |
129 | static void kvaser_pci_enable_irq(struct net_device *dev) |
130 | { |
131 | struct sja1000_priv *priv = netdev_priv(dev); |
132 | struct kvaser_pci *board = priv->priv; |
133 | u32 tmp_en_io; |
134 | |
135 | /* Enable interrupts from card */ |
136 | tmp_en_io = ioread32(board->conf_addr + S5920_INTCSR); |
137 | tmp_en_io |= INTCSR_ADDON_INTENABLE_M; |
138 | iowrite32(tmp_en_io, board->conf_addr + S5920_INTCSR); |
139 | } |
140 | |
141 | static int number_of_sja1000_chip(void __iomem *base_addr) |
142 | { |
143 | u8 status; |
144 | int i; |
145 | |
146 | for (i = 0; i < MAX_NO_OF_CHANNELS; i++) { |
147 | /* reset chip */ |
148 | iowrite8(MOD_RM, base_addr + |
149 | (i * KVASER_PCI_PORT_BYTES) + SJA1000_MOD); |
150 | status = ioread8(base_addr + |
151 | (i * KVASER_PCI_PORT_BYTES) + SJA1000_MOD); |
152 | /* check reset bit */ |
153 | if (!(status & MOD_RM)) |
154 | break; |
155 | } |
156 | |
157 | return i; |
158 | } |
159 | |
160 | static void kvaser_pci_del_chan(struct net_device *dev) |
161 | { |
162 | struct sja1000_priv *priv; |
163 | struct kvaser_pci *board; |
164 | int i; |
165 | |
166 | if (!dev) |
167 | return; |
168 | priv = netdev_priv(dev); |
169 | board = priv->priv; |
170 | if (!board) |
171 | return; |
172 | |
173 | dev_info(&board->pci_dev->dev, "Removing device %s\n" , |
174 | dev->name); |
175 | |
176 | /* Disable PCI interrupts */ |
177 | kvaser_pci_disable_irq(dev); |
178 | |
179 | for (i = 0; i < board->no_channels - 1; i++) { |
180 | if (board->slave_dev[i]) { |
181 | dev_info(&board->pci_dev->dev, "Removing device %s\n" , |
182 | board->slave_dev[i]->name); |
183 | unregister_sja1000dev(dev: board->slave_dev[i]); |
184 | free_sja1000dev(dev: board->slave_dev[i]); |
185 | } |
186 | } |
187 | unregister_sja1000dev(dev); |
188 | |
189 | pci_iounmap(dev: board->pci_dev, priv->reg_base); |
190 | pci_iounmap(dev: board->pci_dev, board->conf_addr); |
191 | pci_iounmap(dev: board->pci_dev, board->res_addr); |
192 | |
193 | free_sja1000dev(dev); |
194 | } |
195 | |
196 | static int kvaser_pci_add_chan(struct pci_dev *pdev, int channel, |
197 | struct net_device **master_dev, |
198 | void __iomem *conf_addr, |
199 | void __iomem *res_addr, |
200 | void __iomem *base_addr) |
201 | { |
202 | struct net_device *dev; |
203 | struct sja1000_priv *priv; |
204 | struct kvaser_pci *board; |
205 | int err; |
206 | |
207 | dev = alloc_sja1000dev(sizeof_priv: sizeof(struct kvaser_pci)); |
208 | if (dev == NULL) |
209 | return -ENOMEM; |
210 | |
211 | priv = netdev_priv(dev); |
212 | board = priv->priv; |
213 | |
214 | board->pci_dev = pdev; |
215 | board->channel = channel; |
216 | |
217 | /* S5920 */ |
218 | board->conf_addr = conf_addr; |
219 | |
220 | /* XILINX board wide address */ |
221 | board->res_addr = res_addr; |
222 | |
223 | if (channel == 0) { |
224 | board->xilinx_ver = |
225 | ioread8(board->res_addr + XILINX_VERINT) >> 4; |
226 | |
227 | /* Assert PTADR# - we're in passive mode so the other bits are |
228 | not important */ |
229 | iowrite32(0x80808080UL, board->conf_addr + S5920_PTCR); |
230 | |
231 | /* Enable interrupts from card */ |
232 | kvaser_pci_enable_irq(dev); |
233 | } else { |
234 | struct sja1000_priv *master_priv = netdev_priv(dev: *master_dev); |
235 | struct kvaser_pci *master_board = master_priv->priv; |
236 | master_board->slave_dev[channel - 1] = dev; |
237 | master_board->no_channels = channel + 1; |
238 | board->xilinx_ver = master_board->xilinx_ver; |
239 | } |
240 | |
241 | priv->reg_base = base_addr + channel * KVASER_PCI_PORT_BYTES; |
242 | |
243 | priv->read_reg = kvaser_pci_read_reg; |
244 | priv->write_reg = kvaser_pci_write_reg; |
245 | |
246 | priv->can.clock.freq = KVASER_PCI_CAN_CLOCK; |
247 | |
248 | priv->ocr = KVASER_PCI_OCR; |
249 | priv->cdr = KVASER_PCI_CDR; |
250 | |
251 | priv->irq_flags = IRQF_SHARED; |
252 | dev->irq = pdev->irq; |
253 | |
254 | dev_info(&pdev->dev, "reg_base=%p conf_addr=%p irq=%d\n" , |
255 | priv->reg_base, board->conf_addr, dev->irq); |
256 | |
257 | SET_NETDEV_DEV(dev, &pdev->dev); |
258 | dev->dev_id = channel; |
259 | |
260 | /* Register SJA1000 device */ |
261 | err = register_sja1000dev(dev); |
262 | if (err) { |
263 | dev_err(&pdev->dev, "Registering device failed (err=%d)\n" , |
264 | err); |
265 | goto failure; |
266 | } |
267 | |
268 | if (channel == 0) |
269 | *master_dev = dev; |
270 | |
271 | return 0; |
272 | |
273 | failure: |
274 | kvaser_pci_del_chan(dev); |
275 | return err; |
276 | } |
277 | |
278 | static int kvaser_pci_init_one(struct pci_dev *pdev, |
279 | const struct pci_device_id *ent) |
280 | { |
281 | int err; |
282 | struct net_device *master_dev = NULL; |
283 | struct sja1000_priv *priv; |
284 | struct kvaser_pci *board; |
285 | int no_channels; |
286 | void __iomem *base_addr = NULL; |
287 | void __iomem *conf_addr = NULL; |
288 | void __iomem *res_addr = NULL; |
289 | int i; |
290 | |
291 | dev_info(&pdev->dev, "initializing device %04x:%04x\n" , |
292 | pdev->vendor, pdev->device); |
293 | |
294 | err = pci_enable_device(dev: pdev); |
295 | if (err) |
296 | goto failure; |
297 | |
298 | err = pci_request_regions(pdev, DRV_NAME); |
299 | if (err) |
300 | goto failure_release_pci; |
301 | |
302 | /* S5920 */ |
303 | conf_addr = pci_iomap(dev: pdev, bar: 0, PCI_CONFIG_PORT_SIZE); |
304 | if (conf_addr == NULL) { |
305 | err = -ENODEV; |
306 | goto failure_release_regions; |
307 | } |
308 | |
309 | /* XILINX board wide address */ |
310 | res_addr = pci_iomap(dev: pdev, bar: 2, PCI_PORT_XILINX_SIZE); |
311 | if (res_addr == NULL) { |
312 | err = -ENOMEM; |
313 | goto failure_iounmap; |
314 | } |
315 | |
316 | base_addr = pci_iomap(dev: pdev, bar: 1, PCI_PORT_SIZE); |
317 | if (base_addr == NULL) { |
318 | err = -ENOMEM; |
319 | goto failure_iounmap; |
320 | } |
321 | |
322 | no_channels = number_of_sja1000_chip(base_addr); |
323 | if (no_channels == 0) { |
324 | err = -ENOMEM; |
325 | goto failure_iounmap; |
326 | } |
327 | |
328 | for (i = 0; i < no_channels; i++) { |
329 | err = kvaser_pci_add_chan(pdev, channel: i, master_dev: &master_dev, |
330 | conf_addr, res_addr, |
331 | base_addr); |
332 | if (err) |
333 | goto failure_cleanup; |
334 | } |
335 | |
336 | priv = netdev_priv(dev: master_dev); |
337 | board = priv->priv; |
338 | |
339 | dev_info(&pdev->dev, "xilinx version=%d number of channels=%d\n" , |
340 | board->xilinx_ver, board->no_channels); |
341 | |
342 | pci_set_drvdata(pdev, data: master_dev); |
343 | return 0; |
344 | |
345 | failure_cleanup: |
346 | kvaser_pci_del_chan(dev: master_dev); |
347 | |
348 | failure_iounmap: |
349 | if (conf_addr != NULL) |
350 | pci_iounmap(dev: pdev, conf_addr); |
351 | if (res_addr != NULL) |
352 | pci_iounmap(dev: pdev, res_addr); |
353 | if (base_addr != NULL) |
354 | pci_iounmap(dev: pdev, base_addr); |
355 | |
356 | failure_release_regions: |
357 | pci_release_regions(pdev); |
358 | |
359 | failure_release_pci: |
360 | pci_disable_device(dev: pdev); |
361 | |
362 | failure: |
363 | return err; |
364 | |
365 | } |
366 | |
367 | static void kvaser_pci_remove_one(struct pci_dev *pdev) |
368 | { |
369 | struct net_device *dev = pci_get_drvdata(pdev); |
370 | |
371 | kvaser_pci_del_chan(dev); |
372 | |
373 | pci_release_regions(pdev); |
374 | pci_disable_device(dev: pdev); |
375 | } |
376 | |
377 | static struct pci_driver kvaser_pci_driver = { |
378 | .name = DRV_NAME, |
379 | .id_table = kvaser_pci_tbl, |
380 | .probe = kvaser_pci_init_one, |
381 | .remove = kvaser_pci_remove_one, |
382 | }; |
383 | |
384 | module_pci_driver(kvaser_pci_driver); |
385 | |