1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* Intel DWMAC platform driver |
3 | * |
4 | * Copyright(C) 2020 Intel Corporation |
5 | */ |
6 | |
7 | #include <linux/ethtool.h> |
8 | #include <linux/module.h> |
9 | #include <linux/of.h> |
10 | #include <linux/platform_device.h> |
11 | #include <linux/property.h> |
12 | #include <linux/stmmac.h> |
13 | |
14 | #include "dwmac4.h" |
15 | #include "stmmac.h" |
16 | #include "stmmac_platform.h" |
17 | |
18 | struct intel_dwmac { |
19 | struct device *dev; |
20 | struct clk *tx_clk; |
21 | const struct intel_dwmac_data *data; |
22 | }; |
23 | |
24 | struct intel_dwmac_data { |
25 | void (*fix_mac_speed)(void *priv, unsigned int speed, unsigned int mode); |
26 | unsigned long ptp_ref_clk_rate; |
27 | unsigned long tx_clk_rate; |
28 | bool tx_clk_en; |
29 | }; |
30 | |
31 | static void kmb_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode) |
32 | { |
33 | struct intel_dwmac *dwmac = priv; |
34 | unsigned long rate; |
35 | int ret; |
36 | |
37 | rate = clk_get_rate(clk: dwmac->tx_clk); |
38 | |
39 | switch (speed) { |
40 | case SPEED_1000: |
41 | rate = 125000000; |
42 | break; |
43 | |
44 | case SPEED_100: |
45 | rate = 25000000; |
46 | break; |
47 | |
48 | case SPEED_10: |
49 | rate = 2500000; |
50 | break; |
51 | |
52 | default: |
53 | dev_err(dwmac->dev, "Invalid speed\n" ); |
54 | break; |
55 | } |
56 | |
57 | ret = clk_set_rate(clk: dwmac->tx_clk, rate); |
58 | if (ret) |
59 | dev_err(dwmac->dev, "Failed to configure tx clock rate\n" ); |
60 | } |
61 | |
62 | static const struct intel_dwmac_data kmb_data = { |
63 | .fix_mac_speed = kmb_eth_fix_mac_speed, |
64 | .ptp_ref_clk_rate = 200000000, |
65 | .tx_clk_rate = 125000000, |
66 | .tx_clk_en = true, |
67 | }; |
68 | |
69 | static const struct of_device_id intel_eth_plat_match[] = { |
70 | { .compatible = "intel,keembay-dwmac" , .data = &kmb_data }, |
71 | { } |
72 | }; |
73 | MODULE_DEVICE_TABLE(of, intel_eth_plat_match); |
74 | |
75 | static int intel_eth_plat_probe(struct platform_device *pdev) |
76 | { |
77 | struct plat_stmmacenet_data *plat_dat; |
78 | struct stmmac_resources stmmac_res; |
79 | struct intel_dwmac *dwmac; |
80 | unsigned long rate; |
81 | int ret; |
82 | |
83 | ret = stmmac_get_platform_resources(pdev, stmmac_res: &stmmac_res); |
84 | if (ret) |
85 | return ret; |
86 | |
87 | plat_dat = devm_stmmac_probe_config_dt(pdev, mac: stmmac_res.mac); |
88 | if (IS_ERR(ptr: plat_dat)) { |
89 | dev_err(&pdev->dev, "dt configuration failed\n" ); |
90 | return PTR_ERR(ptr: plat_dat); |
91 | } |
92 | |
93 | dwmac = devm_kzalloc(dev: &pdev->dev, size: sizeof(*dwmac), GFP_KERNEL); |
94 | if (!dwmac) |
95 | return -ENOMEM; |
96 | |
97 | dwmac->dev = &pdev->dev; |
98 | dwmac->tx_clk = NULL; |
99 | |
100 | dwmac->data = device_get_match_data(dev: &pdev->dev); |
101 | if (dwmac->data) { |
102 | if (dwmac->data->fix_mac_speed) |
103 | plat_dat->fix_mac_speed = dwmac->data->fix_mac_speed; |
104 | |
105 | /* Enable TX clock */ |
106 | if (dwmac->data->tx_clk_en) { |
107 | dwmac->tx_clk = devm_clk_get(dev: &pdev->dev, id: "tx_clk" ); |
108 | if (IS_ERR(ptr: dwmac->tx_clk)) |
109 | return PTR_ERR(ptr: dwmac->tx_clk); |
110 | |
111 | clk_prepare_enable(clk: dwmac->tx_clk); |
112 | |
113 | /* Check and configure TX clock rate */ |
114 | rate = clk_get_rate(clk: dwmac->tx_clk); |
115 | if (dwmac->data->tx_clk_rate && |
116 | rate != dwmac->data->tx_clk_rate) { |
117 | rate = dwmac->data->tx_clk_rate; |
118 | ret = clk_set_rate(clk: dwmac->tx_clk, rate); |
119 | if (ret) { |
120 | dev_err(&pdev->dev, |
121 | "Failed to set tx_clk\n" ); |
122 | return ret; |
123 | } |
124 | } |
125 | } |
126 | |
127 | /* Check and configure PTP ref clock rate */ |
128 | rate = clk_get_rate(clk: plat_dat->clk_ptp_ref); |
129 | if (dwmac->data->ptp_ref_clk_rate && |
130 | rate != dwmac->data->ptp_ref_clk_rate) { |
131 | rate = dwmac->data->ptp_ref_clk_rate; |
132 | ret = clk_set_rate(clk: plat_dat->clk_ptp_ref, rate); |
133 | if (ret) { |
134 | dev_err(&pdev->dev, |
135 | "Failed to set clk_ptp_ref\n" ); |
136 | return ret; |
137 | } |
138 | } |
139 | } |
140 | |
141 | plat_dat->bsp_priv = dwmac; |
142 | plat_dat->eee_usecs_rate = plat_dat->clk_ptp_rate; |
143 | |
144 | if (plat_dat->eee_usecs_rate > 0) { |
145 | u32 tx_lpi_usec; |
146 | |
147 | tx_lpi_usec = (plat_dat->eee_usecs_rate / 1000000) - 1; |
148 | writel(val: tx_lpi_usec, addr: stmmac_res.addr + GMAC_1US_TIC_COUNTER); |
149 | } |
150 | |
151 | ret = stmmac_dvr_probe(device: &pdev->dev, plat_dat, res: &stmmac_res); |
152 | if (ret) { |
153 | clk_disable_unprepare(clk: dwmac->tx_clk); |
154 | return ret; |
155 | } |
156 | |
157 | return 0; |
158 | } |
159 | |
160 | static void intel_eth_plat_remove(struct platform_device *pdev) |
161 | { |
162 | struct intel_dwmac *dwmac = get_stmmac_bsp_priv(dev: &pdev->dev); |
163 | |
164 | stmmac_pltfr_remove(pdev); |
165 | clk_disable_unprepare(clk: dwmac->tx_clk); |
166 | } |
167 | |
168 | static struct platform_driver intel_eth_plat_driver = { |
169 | .probe = intel_eth_plat_probe, |
170 | .remove_new = intel_eth_plat_remove, |
171 | .driver = { |
172 | .name = "intel-eth-plat" , |
173 | .pm = &stmmac_pltfr_pm_ops, |
174 | .of_match_table = intel_eth_plat_match, |
175 | }, |
176 | }; |
177 | module_platform_driver(intel_eth_plat_driver); |
178 | |
179 | MODULE_LICENSE("GPL v2" ); |
180 | MODULE_DESCRIPTION("Intel DWMAC platform driver" ); |
181 | |