1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * ASIX AX8817X based USB 2.0 Ethernet Devices
4 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
5 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
6 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
7 * Copyright (c) 2002-2003 TiVo Inc.
8 */
9
10#ifndef _ASIX_H
11#define _ASIX_H
12
13// #define DEBUG // error path messages, extra info
14// #define VERBOSE // more; success messages
15
16#include <linux/module.h>
17#include <linux/kmod.h>
18#include <linux/netdevice.h>
19#include <linux/etherdevice.h>
20#include <linux/ethtool.h>
21#include <linux/workqueue.h>
22#include <linux/mii.h>
23#include <linux/usb.h>
24#include <linux/crc32.h>
25#include <linux/usb/usbnet.h>
26#include <linux/slab.h>
27#include <linux/if_vlan.h>
28#include <linux/phy.h>
29#include <net/selftests.h>
30#include <linux/phylink.h>
31
32#define DRIVER_VERSION "22-Dec-2011"
33#define DRIVER_NAME "asix"
34
35/* ASIX AX8817X based USB 2.0 Ethernet Devices */
36
37#define AX_CMD_SET_SW_MII 0x06
38#define AX_CMD_READ_MII_REG 0x07
39#define AX_CMD_WRITE_MII_REG 0x08
40#define AX_CMD_STATMNGSTS_REG 0x09
41#define AX_CMD_SET_HW_MII 0x0a
42#define AX_CMD_READ_EEPROM 0x0b
43#define AX_CMD_WRITE_EEPROM 0x0c
44#define AX_CMD_WRITE_ENABLE 0x0d
45#define AX_CMD_WRITE_DISABLE 0x0e
46#define AX_CMD_READ_RX_CTL 0x0f
47#define AX_CMD_WRITE_RX_CTL 0x10
48#define AX_CMD_READ_IPG012 0x11
49#define AX_CMD_WRITE_IPG0 0x12
50#define AX_CMD_WRITE_IPG1 0x13
51#define AX_CMD_READ_NODE_ID 0x13
52#define AX_CMD_WRITE_NODE_ID 0x14
53#define AX_CMD_WRITE_IPG2 0x14
54#define AX_CMD_WRITE_MULTI_FILTER 0x16
55#define AX88172_CMD_READ_NODE_ID 0x17
56#define AX_CMD_READ_PHY_ID 0x19
57#define AX_CMD_READ_MEDIUM_STATUS 0x1a
58#define AX_CMD_WRITE_MEDIUM_MODE 0x1b
59#define AX_CMD_READ_MONITOR_MODE 0x1c
60#define AX_CMD_WRITE_MONITOR_MODE 0x1d
61#define AX_CMD_READ_GPIOS 0x1e
62#define AX_CMD_WRITE_GPIOS 0x1f
63#define AX_CMD_SW_RESET 0x20
64#define AX_CMD_SW_PHY_STATUS 0x21
65#define AX_CMD_SW_PHY_SELECT 0x22
66#define AX_QCTCTRL 0x2A
67
68#define AX_CHIPCODE_MASK 0x70
69#define AX_AX88772_CHIPCODE 0x00
70#define AX_AX88772A_CHIPCODE 0x10
71#define AX_AX88772B_CHIPCODE 0x20
72#define AX_HOST_EN 0x01
73
74#define AX_PHYSEL_PSEL 0x01
75#define AX_PHYSEL_SSMII 0
76#define AX_PHYSEL_SSEN 0x10
77
78#define AX_PHY_SELECT_MASK (BIT(3) | BIT(2))
79#define AX_PHY_SELECT_INTERNAL 0
80#define AX_PHY_SELECT_EXTERNAL BIT(2)
81
82#define AX_MONITOR_MODE 0x01
83#define AX_MONITOR_LINK 0x02
84#define AX_MONITOR_MAGIC 0x04
85#define AX_MONITOR_HSFS 0x10
86
87/* AX88172 Medium Status Register values */
88#define AX88172_MEDIUM_FD 0x02
89#define AX88172_MEDIUM_TX 0x04
90#define AX88172_MEDIUM_FC 0x10
91#define AX88172_MEDIUM_DEFAULT \
92 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
93
94#define AX_MCAST_FILTER_SIZE 8
95#define AX_MAX_MCAST 64
96
97#define AX_SWRESET_CLEAR 0x00
98#define AX_SWRESET_RR 0x01
99#define AX_SWRESET_RT 0x02
100#define AX_SWRESET_PRTE 0x04
101#define AX_SWRESET_PRL 0x08
102#define AX_SWRESET_BZ 0x10
103#define AX_SWRESET_IPRL 0x20
104#define AX_SWRESET_IPPD 0x40
105
106#define AX88772_IPG0_DEFAULT 0x15
107#define AX88772_IPG1_DEFAULT 0x0c
108#define AX88772_IPG2_DEFAULT 0x12
109
110/* AX88772 & AX88178 Medium Mode Register */
111#define AX_MEDIUM_PF 0x0080
112#define AX_MEDIUM_JFE 0x0040
113#define AX_MEDIUM_TFC 0x0020
114#define AX_MEDIUM_RFC 0x0010
115#define AX_MEDIUM_ENCK 0x0008
116#define AX_MEDIUM_AC 0x0004
117#define AX_MEDIUM_FD 0x0002
118#define AX_MEDIUM_GM 0x0001
119#define AX_MEDIUM_SM 0x1000
120#define AX_MEDIUM_SBP 0x0800
121#define AX_MEDIUM_PS 0x0200
122#define AX_MEDIUM_RE 0x0100
123
124#define AX88178_MEDIUM_DEFAULT \
125 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
126 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
127 AX_MEDIUM_RE)
128
129#define AX88772_MEDIUM_DEFAULT \
130 (AX_MEDIUM_FD | AX_MEDIUM_PS | \
131 AX_MEDIUM_AC | AX_MEDIUM_RE)
132
133/* AX88772 & AX88178 RX_CTL values */
134#define AX_RX_CTL_SO 0x0080
135#define AX_RX_CTL_AP 0x0020
136#define AX_RX_CTL_AM 0x0010
137#define AX_RX_CTL_AB 0x0008
138#define AX_RX_CTL_SEP 0x0004
139#define AX_RX_CTL_AMALL 0x0002
140#define AX_RX_CTL_PRO 0x0001
141#define AX_RX_CTL_MFB_2048 0x0000
142#define AX_RX_CTL_MFB_4096 0x0100
143#define AX_RX_CTL_MFB_8192 0x0200
144#define AX_RX_CTL_MFB_16384 0x0300
145
146#define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB)
147
148/* GPIO 0 .. 2 toggles */
149#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
150#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
151#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
152#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
153#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
154#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
155#define AX_GPIO_RESERVED 0x40 /* Reserved */
156#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
157
158#define AX_EEPROM_MAGIC 0xdeadbeef
159#define AX_EEPROM_LEN 0x200
160
161#define AX_EMBD_PHY_ADDR 0x10
162
163/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
164struct asix_data {
165 u8 multi_filter[AX_MCAST_FILTER_SIZE];
166 u8 mac_addr[ETH_ALEN];
167 u8 phymode;
168 u8 ledmode;
169 u8 res;
170};
171
172struct asix_rx_fixup_info {
173 struct sk_buff *ax_skb;
174 u32 header;
175 u16 remaining;
176 bool split_head;
177};
178
179struct asix_common_private {
180 void (*resume)(struct usbnet *dev);
181 void (*suspend)(struct usbnet *dev);
182 int (*reset)(struct usbnet *dev, int in_pm);
183 u16 presvd_phy_advertise;
184 u16 presvd_phy_bmcr;
185 struct asix_rx_fixup_info rx_fixup_info;
186 struct mii_bus *mdio;
187 struct phy_device *phydev;
188 struct phy_device *phydev_int;
189 struct phylink *phylink;
190 struct phylink_config phylink_config;
191 u16 phy_addr;
192 bool embd_phy;
193 u8 chipcode;
194};
195
196extern const struct driver_info ax88172a_info;
197
198/* ASIX specific flags */
199#define FLAG_EEPROM_MAC (1UL << 0) /* init device MAC from eeprom */
200
201int __must_check asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
202 u16 size, void *data, int in_pm);
203
204int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
205 u16 size, void *data, int in_pm);
206
207void asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
208 u16 index, u16 size, void *data);
209
210int asix_rx_fixup_internal(struct usbnet *dev, struct sk_buff *skb,
211 struct asix_rx_fixup_info *rx);
212int asix_rx_fixup_common(struct usbnet *dev, struct sk_buff *skb);
213void asix_rx_fixup_common_free(struct asix_common_private *dp);
214
215struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
216 gfp_t flags);
217
218int asix_read_phy_addr(struct usbnet *dev, bool internal);
219
220int asix_sw_reset(struct usbnet *dev, u8 flags, int in_pm);
221
222u16 asix_read_rx_ctl(struct usbnet *dev, int in_pm);
223int asix_write_rx_ctl(struct usbnet *dev, u16 mode, int in_pm);
224
225u16 asix_read_medium_status(struct usbnet *dev, int in_pm);
226int asix_write_medium_mode(struct usbnet *dev, u16 mode, int in_pm);
227void asix_adjust_link(struct net_device *netdev);
228
229int asix_write_gpio(struct usbnet *dev, u16 value, int sleep, int in_pm);
230
231void asix_set_multicast(struct net_device *net);
232
233int asix_mdio_read(struct net_device *netdev, int phy_id, int loc);
234void asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val);
235
236int asix_mdio_bus_read(struct mii_bus *bus, int phy_id, int regnum);
237int asix_mdio_bus_write(struct mii_bus *bus, int phy_id, int regnum, u16 val);
238
239int asix_mdio_read_nopm(struct net_device *netdev, int phy_id, int loc);
240void asix_mdio_write_nopm(struct net_device *netdev, int phy_id, int loc,
241 int val);
242
243void asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo);
244int asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo);
245
246int asix_get_eeprom_len(struct net_device *net);
247int asix_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
248 u8 *data);
249int asix_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
250 u8 *data);
251
252void asix_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *info);
253
254int asix_set_mac_address(struct net_device *net, void *p);
255
256#endif /* _ASIX_H */
257

source code of linux/drivers/net/usb/asix.h