1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5#include "rtw8852b_rfk_table.h"
6
7static const struct rtw89_reg5_def rtw8852b_afe_init_defs[] = {
8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
18};
19
20RTW89_DECLARE_RFK_TBL(rtw8852b_afe_init_defs);
21
22static const struct rtw89_reg5_def rtw8852b_check_addc_defs_a[] = {
23 RTW89_DECL_RFK_WM(0x20f4, BIT(24), 0x0),
24 RTW89_DECL_RFK_WM(0x20f8, 0x80000000, 0x1),
25 RTW89_DECL_RFK_WM(0x20f0, 0xff0000, 0x1),
26 RTW89_DECL_RFK_WM(0x20f0, 0xf00, 0x2),
27 RTW89_DECL_RFK_WM(0x20f0, 0xf, 0x0),
28 RTW89_DECL_RFK_WM(0x20f0, 0xc0, 0x2),
29};
30
31RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_a);
32
33static const struct rtw89_reg5_def rtw8852b_check_addc_defs_b[] = {
34 RTW89_DECL_RFK_WM(0x20f4, BIT(24), 0x0),
35 RTW89_DECL_RFK_WM(0x20f8, 0x80000000, 0x1),
36 RTW89_DECL_RFK_WM(0x20f0, 0xff0000, 0x1),
37 RTW89_DECL_RFK_WM(0x20f0, 0xf00, 0x2),
38 RTW89_DECL_RFK_WM(0x20f0, 0xf, 0x0),
39 RTW89_DECL_RFK_WM(0x20f0, 0xc0, 0x3),
40};
41
42RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_b);
43
44static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_a[] = {
45 RTW89_DECL_RFK_WM(0x032C, BIT(30), 0x0),
46 RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0xf),
47 RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0x3),
48 RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x0),
49 RTW89_DECL_RFK_WM(0x12dc, BIT(0), 0x1),
50 RTW89_DECL_RFK_WM(0x12e8, BIT(2), 0x1),
51 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x8f, BIT(13), 0x1),
52};
53
54RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_a);
55
56static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_b[] = {
57 RTW89_DECL_RFK_WM(0x032C, BIT(30), 0x0),
58 RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0xf),
59 RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0x3),
60 RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x0),
61 RTW89_DECL_RFK_WM(0x32dc, BIT(0), 0x1),
62 RTW89_DECL_RFK_WM(0x32e8, BIT(2), 0x1),
63 RTW89_DECL_RFK_WRF(RF_PATH_B, 0x8f, BIT(13), 0x1),
64};
65
66RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_b);
67
68static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_a[] = {
69 RTW89_DECL_RFK_WM(0x12dc, BIT(0), 0x0),
70 RTW89_DECL_RFK_WM(0x12e8, BIT(2), 0x0),
71 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x8f, BIT(13), 0x0),
72 RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x1),
73};
74
75RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_a);
76
77static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_b[] = {
78 RTW89_DECL_RFK_WM(0x32dc, BIT(0), 0x0),
79 RTW89_DECL_RFK_WM(0x32e8, BIT(2), 0x0),
80 RTW89_DECL_RFK_WRF(RF_PATH_B, 0x8f, BIT(13), 0x0),
81 RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x1),
82};
83
84RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_b);
85
86static const struct rtw89_reg5_def rtw8852b_dack_s0_1_defs[] = {
87 RTW89_DECL_RFK_WM(0x12A0, BIT(15), 0x1),
88 RTW89_DECL_RFK_WM(0x12A0, 0x00007000, 0x3),
89 RTW89_DECL_RFK_WM(0x12B8, BIT(30), 0x1),
90 RTW89_DECL_RFK_WM(0x030C, BIT(28), 0x1),
91 RTW89_DECL_RFK_WM(0x032C, 0x80000000, 0x0),
92 RTW89_DECL_RFK_WM(0xC0D8, BIT(16), 0x1),
93 RTW89_DECL_RFK_WM(0xc0dc, 0x0c000000, 0x3),
94 RTW89_DECL_RFK_WM(0xC004, BIT(30), 0x0),
95 RTW89_DECL_RFK_WM(0xc024, BIT(30), 0x0),
96 RTW89_DECL_RFK_WM(0xC004, 0x3ff00000, 0x30),
97 RTW89_DECL_RFK_WM(0xC004, 0xc0000000, 0x0),
98 RTW89_DECL_RFK_WM(0xC004, BIT(17), 0x1),
99 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
100 RTW89_DECL_RFK_WM(0xc00c, BIT(2), 0x0),
101 RTW89_DECL_RFK_WM(0xc02c, BIT(2), 0x0),
102 RTW89_DECL_RFK_WM(0xC004, BIT(0), 0x1),
103 RTW89_DECL_RFK_WM(0xc024, BIT(0), 0x1),
104 RTW89_DECL_RFK_DELAY(1),
105};
106
107RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_1_defs);
108
109static const struct rtw89_reg5_def rtw8852b_dack_s0_2_defs[] = {
110 RTW89_DECL_RFK_WM(0xc0dc, 0x0c000000, 0x0),
111 RTW89_DECL_RFK_WM(0xc00c, BIT(2), 0x1),
112 RTW89_DECL_RFK_WM(0xc02c, BIT(2), 0x1),
113};
114
115RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_2_defs);
116
117static const struct rtw89_reg5_def rtw8852b_dack_s0_3_defs[] = {
118 RTW89_DECL_RFK_WM(0xC004, BIT(0), 0x0),
119 RTW89_DECL_RFK_WM(0xc024, BIT(0), 0x0),
120 RTW89_DECL_RFK_WM(0xC0D8, BIT(16), 0x0),
121 RTW89_DECL_RFK_WM(0x12A0, BIT(15), 0x0),
122 RTW89_DECL_RFK_WM(0x12A0, 0x00007000, 0x7),
123};
124
125RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_3_defs);
126
127static const struct rtw89_reg5_def rtw8852b_dack_s1_1_defs[] = {
128 RTW89_DECL_RFK_WM(0x32a0, BIT(15), 0x1),
129 RTW89_DECL_RFK_WM(0x32a0, 0x7000, 0x3),
130 RTW89_DECL_RFK_WM(0x32B8, BIT(30), 0x1),
131 RTW89_DECL_RFK_WM(0x030C, BIT(28), 0x1),
132 RTW89_DECL_RFK_WM(0x032C, 0x80000000, 0x0),
133 RTW89_DECL_RFK_WM(0xC1D8, BIT(16), 0x1),
134 RTW89_DECL_RFK_WM(0xc1dc, 0x0c000000, 0x3),
135 RTW89_DECL_RFK_WM(0xc104, BIT(30), 0x0),
136 RTW89_DECL_RFK_WM(0xc124, BIT(30), 0x0),
137 RTW89_DECL_RFK_WM(0xc104, 0x3ff00000, 0x30),
138 RTW89_DECL_RFK_WM(0xc104, 0xc0000000, 0x0),
139 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
140 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
141 RTW89_DECL_RFK_WM(0xc10c, BIT(2), 0x0),
142 RTW89_DECL_RFK_WM(0xc12c, BIT(2), 0x0),
143 RTW89_DECL_RFK_WM(0xc104, BIT(0), 0x1),
144 RTW89_DECL_RFK_WM(0xc124, BIT(0), 0x1),
145 RTW89_DECL_RFK_DELAY(1),
146};
147
148RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_1_defs);
149
150static const struct rtw89_reg5_def rtw8852b_dack_s1_2_defs[] = {
151 RTW89_DECL_RFK_WM(0xc1dc, 0x0c000000, 0x0),
152 RTW89_DECL_RFK_WM(0xc10c, BIT(2), 0x1),
153 RTW89_DECL_RFK_WM(0xc12c, BIT(2), 0x1),
154 RTW89_DECL_RFK_DELAY(1),
155};
156
157RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_2_defs);
158
159static const struct rtw89_reg5_def rtw8852b_dack_s1_3_defs[] = {
160 RTW89_DECL_RFK_WM(0xc104, BIT(0), 0x0),
161 RTW89_DECL_RFK_WM(0xc124, BIT(0), 0x0),
162 RTW89_DECL_RFK_WM(0xC1D8, BIT(16), 0x0),
163 RTW89_DECL_RFK_WM(0x32a0, BIT(15), 0x0),
164 RTW89_DECL_RFK_WM(0x32a0, 0x7000, 0x7),
165};
166
167RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_3_defs);
168
169static const struct rtw89_reg5_def rtw8852b_dpk_afe_defs[] = {
170 RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0303),
171 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
172 RTW89_DECL_RFK_WM(0x32b8, BIT(30), 0x1),
173 RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x13),
174 RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041),
175 RTW89_DECL_RFK_WM(0x12b8, BIT(28), 0x1),
176 RTW89_DECL_RFK_WM(0x58c8, BIT(24), 0x1),
177 RTW89_DECL_RFK_WM(0x78c8, BIT(24), 0x1),
178 RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x3),
179 RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x3),
180 RTW89_DECL_RFK_WM(0x2008, 0x01FFFFFF, 0x1ffffff),
181 RTW89_DECL_RFK_WM(0x0c1c, BIT(2), 0x1),
182 RTW89_DECL_RFK_WM(0x0700, BIT(27), 0x1),
183 RTW89_DECL_RFK_WM(0x0c70, 0x000003FF, 0x3ff),
184 RTW89_DECL_RFK_WM(0x0c60, 0x00000003, 0x3),
185 RTW89_DECL_RFK_WM(0x0c6c, BIT(0), 0x1),
186 RTW89_DECL_RFK_WM(0x58ac, BIT(27), 0x1),
187 RTW89_DECL_RFK_WM(0x78ac, BIT(27), 0x1),
188 RTW89_DECL_RFK_WM(0x0c3c, BIT(9), 0x1),
189 RTW89_DECL_RFK_WM(0x2344, BIT(31), 0x1),
190 RTW89_DECL_RFK_WM(0x4490, BIT(31), 0x1),
191 RTW89_DECL_RFK_WM(0x12a0, 0x000ff000, 0xbf),
192 RTW89_DECL_RFK_WM(0x32a0, 0x000f0000, 0xb),
193 RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x5),
194 RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x3333),
195 RTW89_DECL_RFK_WM(0x580c, BIT(15), 0x1),
196 RTW89_DECL_RFK_WM(0x5800, 0x0000ffff, 0x0000),
197 RTW89_DECL_RFK_WM(0x780c, BIT(15), 0x1),
198 RTW89_DECL_RFK_WM(0x7800, 0x0000ffff, 0x0000),
199};
200
201RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_defs);
202
203static const struct rtw89_reg5_def rtw8852b_dpk_afe_restore_defs[] = {
204 RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0303),
205 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x0),
206 RTW89_DECL_RFK_WM(0x32b8, BIT(30), 0x0),
207 RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x0),
208 RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x0),
209 RTW89_DECL_RFK_WM(0x2008, 0x01FFFFFF, 0x0),
210 RTW89_DECL_RFK_WM(0x0c1c, BIT(2), 0x0),
211 RTW89_DECL_RFK_WM(0x0700, BIT(27), 0x0),
212 RTW89_DECL_RFK_WM(0x0c70, 0x000003FF, 0x63),
213 RTW89_DECL_RFK_WM(0x12a0, 0x000FF000, 0x00),
214 RTW89_DECL_RFK_WM(0x32a0, 0x000FF000, 0x00),
215 RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x0),
216 RTW89_DECL_RFK_WM(0x5864, BIT(29), 0x0),
217 RTW89_DECL_RFK_WM(0x7864, BIT(29), 0x0),
218 RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0000),
219 RTW89_DECL_RFK_WM(0x58c8, BIT(24), 0x0),
220 RTW89_DECL_RFK_WM(0x78c8, BIT(24), 0x0),
221 RTW89_DECL_RFK_WM(0x0c3c, BIT(9), 0x0),
222 RTW89_DECL_RFK_WM(0x580c, BIT(15), 0x0),
223 RTW89_DECL_RFK_WM(0x58e4, 0x18000000, 0x1),
224 RTW89_DECL_RFK_WM(0x58e4, 0x18000000, 0x2),
225 RTW89_DECL_RFK_WM(0x780c, BIT(15), 0x0),
226 RTW89_DECL_RFK_WM(0x78e4, 0x18000000, 0x1),
227 RTW89_DECL_RFK_WM(0x78e4, 0x18000000, 0x2),
228};
229
230RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_restore_defs);
231
232static const struct rtw89_reg5_def rtw8852b_dpk_kip_defs[] = {
233 RTW89_DECL_RFK_WM(0x8008, 0xffffffff, 0x00000000),
234 RTW89_DECL_RFK_WM(0x8088, 0xffffffff, 0x80000000),
235};
236
237RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_kip_defs);
238
239static const struct rtw89_reg5_def rtw8852b_tssi_sys_defs[] = {
240 RTW89_DECL_RFK_WM(0x12a8, 0x0000000f, 0x5),
241 RTW89_DECL_RFK_WM(0x32a8, 0x0000000f, 0x5),
242 RTW89_DECL_RFK_WM(0x12bc, 0x000ffff0, 0x5555),
243 RTW89_DECL_RFK_WM(0x32bc, 0x000ffff0, 0x5555),
244 RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x16),
245 RTW89_DECL_RFK_WM(0x0304, 0x000000ff, 0x19),
246 RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x2041),
247 RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x2041),
248 RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x20012041),
249 RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x3),
250 RTW89_DECL_RFK_WM(0x0024, 0x00006000, 0x3),
251 RTW89_DECL_RFK_WM(0x0704, 0xffff0000, 0x601e),
252 RTW89_DECL_RFK_WM(0x2704, 0xffff0000, 0x601e),
253 RTW89_DECL_RFK_WM(0x0700, 0xf0000000, 0x4),
254 RTW89_DECL_RFK_WM(0x2700, 0xf0000000, 0x4),
255 RTW89_DECL_RFK_WM(0x0650, 0x3c000000, 0x0),
256 RTW89_DECL_RFK_WM(0x2650, 0x3c000000, 0x0),
257};
258
259RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_defs);
260
261static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_2g[] = {
262 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x33),
263 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x33),
264 RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x1),
265 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e),
266};
267
268RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_2g);
269
270static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_5g[] = {
271 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x44),
272 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x44),
273 RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x0),
274 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d),
275};
276
277RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_5g);
278
279static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_2g[] = {
280 RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x33),
281 RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x33),
282 RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x1),
283 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e),
284};
285
286RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_2g);
287
288static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_5g[] = {
289 RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x44),
290 RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x44),
291 RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x0),
292 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d),
293};
294
295RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_5g);
296
297static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_a[] = {
298 RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0),
299 RTW89_DECL_RFK_WM(0x5800, 0xffffffff, 0x003f807f),
300 RTW89_DECL_RFK_WM(0x580c, 0x0000007f, 0x40),
301 RTW89_DECL_RFK_WM(0x580c, 0x0fffff00, 0x00040),
302 RTW89_DECL_RFK_WM(0x5810, 0xffffffff, 0x59010000),
303 RTW89_DECL_RFK_WM(0x5814, 0x01ffffff, 0x002d000),
304 RTW89_DECL_RFK_WM(0x5814, 0xf8000000, 0x00),
305 RTW89_DECL_RFK_WM(0x5818, 0xffffffff, 0x002c1800),
306 RTW89_DECL_RFK_WM(0x581c, 0x3fffffff, 0x1dc80280),
307 RTW89_DECL_RFK_WM(0x5820, 0xffffffff, 0x00002080),
308 RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1),
309 RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1),
310 RTW89_DECL_RFK_WM(0x5834, 0x3fffffff, 0x000115f2),
311 RTW89_DECL_RFK_WM(0x5838, 0x7fffffff, 0x0000121),
312 RTW89_DECL_RFK_WM(0x5854, 0x3fffffff, 0x000115f2),
313 RTW89_DECL_RFK_WM(0x5858, 0x7fffffff, 0x0000121),
314 RTW89_DECL_RFK_WM(0x5860, 0x80000000, 0x0),
315 RTW89_DECL_RFK_WM(0x5864, 0x07ffffff, 0x00801ff),
316 RTW89_DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000),
317 RTW89_DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000),
318 RTW89_DECL_RFK_WM(0x58a4, 0x000000ff, 0x16),
319 RTW89_DECL_RFK_WM(0x58b0, 0xffffffff, 0x00000000),
320 RTW89_DECL_RFK_WM(0x58b4, 0x7fffffff, 0x0a002000),
321 RTW89_DECL_RFK_WM(0x58b8, 0x7fffffff, 0x00007628),
322 RTW89_DECL_RFK_WM(0x58bc, 0x07ffffff, 0x7a7807f),
323 RTW89_DECL_RFK_WM(0x58c0, 0xfffe0000, 0x003f),
324 RTW89_DECL_RFK_WM(0x58c4, 0xffffffff, 0x0003ffff),
325 RTW89_DECL_RFK_WM(0x58c8, 0x00ffffff, 0x000000),
326 RTW89_DECL_RFK_WM(0x58c8, 0xf0000000, 0x0),
327 RTW89_DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000),
328 RTW89_DECL_RFK_WM(0x58d0, 0x07ffffff, 0x2008101),
329 RTW89_DECL_RFK_WM(0x58d4, 0x000000ff, 0x00),
330 RTW89_DECL_RFK_WM(0x58d4, 0x0003fe00, 0x0ff),
331 RTW89_DECL_RFK_WM(0x58d4, 0x07fc0000, 0x100),
332 RTW89_DECL_RFK_WM(0x58d8, 0xffffffff, 0x8008016c),
333 RTW89_DECL_RFK_WM(0x58dc, 0x0001ffff, 0x0807f),
334 RTW89_DECL_RFK_WM(0x58dc, 0xfff00000, 0x800),
335 RTW89_DECL_RFK_WM(0x58f0, 0x0003ffff, 0x001ff),
336 RTW89_DECL_RFK_WM(0x58f4, 0x000fffff, 0x000),
337};
338
339RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_a);
340
341static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_b[] = {
342 RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0),
343 RTW89_DECL_RFK_WM(0x7800, 0xffffffff, 0x003f807f),
344 RTW89_DECL_RFK_WM(0x780c, 0x0000007f, 0x40),
345 RTW89_DECL_RFK_WM(0x780c, 0x0fffff00, 0x00040),
346 RTW89_DECL_RFK_WM(0x7810, 0xffffffff, 0x59010000),
347 RTW89_DECL_RFK_WM(0x7814, 0x01ffffff, 0x002d000),
348 RTW89_DECL_RFK_WM(0x7814, 0xf8000000, 0x00),
349 RTW89_DECL_RFK_WM(0x7818, 0xffffffff, 0x002c1800),
350 RTW89_DECL_RFK_WM(0x781c, 0x3fffffff, 0x1dc80280),
351 RTW89_DECL_RFK_WM(0x7820, 0xffffffff, 0x00002080),
352 RTW89_DECL_RFK_WM(0x780c, 0x10000000, 0x1),
353 RTW89_DECL_RFK_WM(0x780c, 0x40000000, 0x1),
354 RTW89_DECL_RFK_WM(0x7834, 0x3fffffff, 0x000115f2),
355 RTW89_DECL_RFK_WM(0x7838, 0x7fffffff, 0x0000121),
356 RTW89_DECL_RFK_WM(0x7854, 0x3fffffff, 0x000115f2),
357 RTW89_DECL_RFK_WM(0x7858, 0x7fffffff, 0x0000121),
358 RTW89_DECL_RFK_WM(0x7860, 0x80000000, 0x0),
359 RTW89_DECL_RFK_WM(0x7864, 0x07ffffff, 0x00801ff),
360 RTW89_DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000),
361 RTW89_DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000),
362 RTW89_DECL_RFK_WM(0x78a4, 0x000000ff, 0x16),
363 RTW89_DECL_RFK_WM(0x78b0, 0xffffffff, 0x00000000),
364 RTW89_DECL_RFK_WM(0x78b4, 0x7fffffff, 0x0a002000),
365 RTW89_DECL_RFK_WM(0x78b8, 0x7fffffff, 0x00007628),
366 RTW89_DECL_RFK_WM(0x78bc, 0x07ffffff, 0x7a7807f),
367 RTW89_DECL_RFK_WM(0x78c0, 0xfffe0000, 0x003f),
368 RTW89_DECL_RFK_WM(0x78c4, 0xffffffff, 0x0003ffff),
369 RTW89_DECL_RFK_WM(0x78c8, 0x00ffffff, 0x000000),
370 RTW89_DECL_RFK_WM(0x78c8, 0xf0000000, 0x0),
371 RTW89_DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000),
372 RTW89_DECL_RFK_WM(0x78d0, 0x07ffffff, 0x2008101),
373 RTW89_DECL_RFK_WM(0x78d4, 0x000000ff, 0x00),
374 RTW89_DECL_RFK_WM(0x78d4, 0x0003fe00, 0x0ff),
375 RTW89_DECL_RFK_WM(0x78d4, 0x07fc0000, 0x100),
376 RTW89_DECL_RFK_WM(0x78d8, 0xffffffff, 0x8008016c),
377 RTW89_DECL_RFK_WM(0x78dc, 0x0001ffff, 0x0807f),
378 RTW89_DECL_RFK_WM(0x78dc, 0xfff00000, 0x800),
379 RTW89_DECL_RFK_WM(0x78f0, 0x0003ffff, 0x001ff),
380 RTW89_DECL_RFK_WM(0x78f4, 0x000fffff, 0x000),
381};
382
383RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_b);
384
385static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_a[] = {
386 RTW89_DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fe),
387 RTW89_DECL_RFK_WM(0x58e4, 0x0000007f, 0x1f),
388};
389
390RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_a);
391
392static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_b[] = {
393 RTW89_DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fe),
394 RTW89_DECL_RFK_WM(0x78e4, 0x0000007f, 0x1f),
395};
396
397RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_b);
398
399static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_a[] = {
400 RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x000),
401 RTW89_DECL_RFK_WM(0x5814, 0x003ff000, 0x0ef),
402 RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x0),
403};
404
405RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_a);
406
407static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_b[] = {
408 RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x000),
409 RTW89_DECL_RFK_WM(0x7814, 0x003ff000, 0x0ef),
410 RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x0),
411};
412
413RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_b);
414
415static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_a[] = {
416 RTW89_DECL_RFK_WM(0x58b0, 0x00000400, 0x1),
417 RTW89_DECL_RFK_WM(0x58b0, 0x00000fff, 0x000),
418 RTW89_DECL_RFK_WM(0x58b0, 0x00000800, 0x1),
419 RTW89_DECL_RFK_WM(0x5a00, 0xffffffff, 0x00000000),
420 RTW89_DECL_RFK_WM(0x5a04, 0xffffffff, 0x00000000),
421 RTW89_DECL_RFK_WM(0x5a08, 0xffffffff, 0x00000000),
422 RTW89_DECL_RFK_WM(0x5a0c, 0xffffffff, 0x00000000),
423 RTW89_DECL_RFK_WM(0x5a10, 0xffffffff, 0x00000000),
424 RTW89_DECL_RFK_WM(0x5a14, 0xffffffff, 0x00000000),
425 RTW89_DECL_RFK_WM(0x5a18, 0xffffffff, 0x00000000),
426 RTW89_DECL_RFK_WM(0x5a1c, 0xffffffff, 0x00000000),
427 RTW89_DECL_RFK_WM(0x5a20, 0xffffffff, 0x00000000),
428 RTW89_DECL_RFK_WM(0x5a24, 0xffffffff, 0x00000000),
429 RTW89_DECL_RFK_WM(0x5a28, 0xffffffff, 0x00000000),
430 RTW89_DECL_RFK_WM(0x5a2c, 0xffffffff, 0x00000000),
431 RTW89_DECL_RFK_WM(0x5a30, 0xffffffff, 0x00000000),
432 RTW89_DECL_RFK_WM(0x5a34, 0xffffffff, 0x00000000),
433 RTW89_DECL_RFK_WM(0x5a38, 0xffffffff, 0x00000000),
434 RTW89_DECL_RFK_WM(0x5a3c, 0xffffffff, 0x00000000),
435 RTW89_DECL_RFK_WM(0x5a40, 0xffffffff, 0x00000000),
436 RTW89_DECL_RFK_WM(0x5a44, 0xffffffff, 0x00000000),
437 RTW89_DECL_RFK_WM(0x5a48, 0xffffffff, 0x00000000),
438 RTW89_DECL_RFK_WM(0x5a4c, 0xffffffff, 0x00000000),
439 RTW89_DECL_RFK_WM(0x5a50, 0xffffffff, 0x00000000),
440 RTW89_DECL_RFK_WM(0x5a54, 0xffffffff, 0x00000000),
441 RTW89_DECL_RFK_WM(0x5a58, 0xffffffff, 0x00000000),
442 RTW89_DECL_RFK_WM(0x5a5c, 0xffffffff, 0x00000000),
443 RTW89_DECL_RFK_WM(0x5a60, 0xffffffff, 0x00000000),
444 RTW89_DECL_RFK_WM(0x5a64, 0xffffffff, 0x00000000),
445 RTW89_DECL_RFK_WM(0x5a68, 0xffffffff, 0x00000000),
446 RTW89_DECL_RFK_WM(0x5a6c, 0xffffffff, 0x00000000),
447 RTW89_DECL_RFK_WM(0x5a70, 0xffffffff, 0x00000000),
448 RTW89_DECL_RFK_WM(0x5a74, 0xffffffff, 0x00000000),
449 RTW89_DECL_RFK_WM(0x5a78, 0xffffffff, 0x00000000),
450 RTW89_DECL_RFK_WM(0x5a7c, 0xffffffff, 0x00000000),
451 RTW89_DECL_RFK_WM(0x5a80, 0xffffffff, 0x00000000),
452 RTW89_DECL_RFK_WM(0x5a84, 0xffffffff, 0x00000000),
453 RTW89_DECL_RFK_WM(0x5a88, 0xffffffff, 0x00000000),
454 RTW89_DECL_RFK_WM(0x5a8c, 0xffffffff, 0x00000000),
455 RTW89_DECL_RFK_WM(0x5a90, 0xffffffff, 0x00000000),
456 RTW89_DECL_RFK_WM(0x5a94, 0xffffffff, 0x00000000),
457 RTW89_DECL_RFK_WM(0x5a98, 0xffffffff, 0x00000000),
458 RTW89_DECL_RFK_WM(0x5a9c, 0xffffffff, 0x00000000),
459 RTW89_DECL_RFK_WM(0x5aa0, 0xffffffff, 0x00000000),
460 RTW89_DECL_RFK_WM(0x5aa4, 0xffffffff, 0x00000000),
461 RTW89_DECL_RFK_WM(0x5aa8, 0xffffffff, 0x00000000),
462 RTW89_DECL_RFK_WM(0x5aac, 0xffffffff, 0x00000000),
463 RTW89_DECL_RFK_WM(0x5ab0, 0xffffffff, 0x00000000),
464 RTW89_DECL_RFK_WM(0x5ab4, 0xffffffff, 0x00000000),
465 RTW89_DECL_RFK_WM(0x5ab8, 0xffffffff, 0x00000000),
466 RTW89_DECL_RFK_WM(0x5abc, 0xffffffff, 0x00000000),
467 RTW89_DECL_RFK_WM(0x5ac0, 0xffffffff, 0x00000000),
468};
469
470RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_a);
471
472static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_b[] = {
473 RTW89_DECL_RFK_WM(0x78b0, 0x00000fff, 0x000),
474 RTW89_DECL_RFK_WM(0x78b0, 0x00000800, 0x1),
475 RTW89_DECL_RFK_WM(0x7a00, 0xffffffff, 0x00000000),
476 RTW89_DECL_RFK_WM(0x7a04, 0xffffffff, 0x00000000),
477 RTW89_DECL_RFK_WM(0x7a08, 0xffffffff, 0x00000000),
478 RTW89_DECL_RFK_WM(0x7a0c, 0xffffffff, 0x00000000),
479 RTW89_DECL_RFK_WM(0x7a10, 0xffffffff, 0x00000000),
480 RTW89_DECL_RFK_WM(0x7a14, 0xffffffff, 0x00000000),
481 RTW89_DECL_RFK_WM(0x7a18, 0xffffffff, 0x00000000),
482 RTW89_DECL_RFK_WM(0x7a1c, 0xffffffff, 0x00000000),
483 RTW89_DECL_RFK_WM(0x7a20, 0xffffffff, 0x00000000),
484 RTW89_DECL_RFK_WM(0x7a24, 0xffffffff, 0x00000000),
485 RTW89_DECL_RFK_WM(0x7a28, 0xffffffff, 0x00000000),
486 RTW89_DECL_RFK_WM(0x7a2c, 0xffffffff, 0x00000000),
487 RTW89_DECL_RFK_WM(0x7a30, 0xffffffff, 0x00000000),
488 RTW89_DECL_RFK_WM(0x7a34, 0xffffffff, 0x00000000),
489 RTW89_DECL_RFK_WM(0x7a38, 0xffffffff, 0x00000000),
490 RTW89_DECL_RFK_WM(0x7a3c, 0xffffffff, 0x00000000),
491 RTW89_DECL_RFK_WM(0x7a40, 0xffffffff, 0x00000000),
492 RTW89_DECL_RFK_WM(0x7a44, 0xffffffff, 0x00000000),
493 RTW89_DECL_RFK_WM(0x7a48, 0xffffffff, 0x00000000),
494 RTW89_DECL_RFK_WM(0x7a4c, 0xffffffff, 0x00000000),
495 RTW89_DECL_RFK_WM(0x7a50, 0xffffffff, 0x00000000),
496 RTW89_DECL_RFK_WM(0x7a54, 0xffffffff, 0x00000000),
497 RTW89_DECL_RFK_WM(0x7a58, 0xffffffff, 0x00000000),
498 RTW89_DECL_RFK_WM(0x7a5c, 0xffffffff, 0x00000000),
499 RTW89_DECL_RFK_WM(0x7a60, 0xffffffff, 0x00000000),
500 RTW89_DECL_RFK_WM(0x7a64, 0xffffffff, 0x00000000),
501 RTW89_DECL_RFK_WM(0x7a68, 0xffffffff, 0x00000000),
502 RTW89_DECL_RFK_WM(0x7a6c, 0xffffffff, 0x00000000),
503 RTW89_DECL_RFK_WM(0x7a70, 0xffffffff, 0x00000000),
504 RTW89_DECL_RFK_WM(0x7a74, 0xffffffff, 0x00000000),
505 RTW89_DECL_RFK_WM(0x7a78, 0xffffffff, 0x00000000),
506 RTW89_DECL_RFK_WM(0x7a7c, 0xffffffff, 0x00000000),
507 RTW89_DECL_RFK_WM(0x7a80, 0xffffffff, 0x00000000),
508 RTW89_DECL_RFK_WM(0x7a84, 0xffffffff, 0x00000000),
509 RTW89_DECL_RFK_WM(0x7a88, 0xffffffff, 0x00000000),
510 RTW89_DECL_RFK_WM(0x7a8c, 0xffffffff, 0x00000000),
511 RTW89_DECL_RFK_WM(0x7a90, 0xffffffff, 0x00000000),
512 RTW89_DECL_RFK_WM(0x7a94, 0xffffffff, 0x00000000),
513 RTW89_DECL_RFK_WM(0x7a98, 0xffffffff, 0x00000000),
514 RTW89_DECL_RFK_WM(0x7a9c, 0xffffffff, 0x00000000),
515 RTW89_DECL_RFK_WM(0x7aa0, 0xffffffff, 0x00000000),
516 RTW89_DECL_RFK_WM(0x7aa4, 0xffffffff, 0x00000000),
517 RTW89_DECL_RFK_WM(0x7aa8, 0xffffffff, 0x00000000),
518 RTW89_DECL_RFK_WM(0x7aac, 0xffffffff, 0x00000000),
519 RTW89_DECL_RFK_WM(0x7ab0, 0xffffffff, 0x00000000),
520 RTW89_DECL_RFK_WM(0x7ab4, 0xffffffff, 0x00000000),
521 RTW89_DECL_RFK_WM(0x7ab8, 0xffffffff, 0x00000000),
522 RTW89_DECL_RFK_WM(0x7abc, 0xffffffff, 0x00000000),
523 RTW89_DECL_RFK_WM(0x7ac0, 0xffffffff, 0x00000000),
524};
525
526RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_b);
527
528static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_2g[] = {
529 RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0801008),
530 RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201020),
531 RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008),
532 RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0804008),
533 RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008),
534 RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008),
535 RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808),
536 RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081e28),
537 RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808),
538 RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08081e28),
539 RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808),
540 RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1),
541};
542
543RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_2g);
544
545static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_5g[] = {
546 RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008),
547 RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201020),
548 RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008),
549 RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008),
550 RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008),
551 RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008),
552 RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808),
553 RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081e08),
554 RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808),
555 RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808),
556 RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808),
557 RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1),
558};
559
560RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_5g);
561
562static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_2g[] = {
563 RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0801008),
564 RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201020),
565 RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008),
566 RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0804008),
567 RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008),
568 RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008),
569 RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808),
570 RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081e28),
571 RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808),
572 RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08081e28),
573 RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808),
574 RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1),
575};
576
577RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_2g);
578
579static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_5g[] = {
580 RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0201008),
581 RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201020),
582 RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008),
583 RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0201008),
584 RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008),
585 RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008),
586 RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808),
587 RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081e08),
588 RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808),
589 RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08080808),
590 RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808),
591 RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1),
592};
593
594RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_5g);
595
596static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_all_defs[] = {
597 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1),
598 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721),
599 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101),
600 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01ef27af),
601 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000075),
602 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000),
603 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x017f13ae),
604 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x0000006e),
605 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000),
606};
607
608RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_all_defs);
609
610static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_part_defs[] = {
611 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01ef27af),
612 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000075),
613 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x017f13ae),
614 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x0000006e),
615};
616
617RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_part_defs);
618
619static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_all_defs[] = {
620 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1),
621 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721),
622 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101),
623 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x016037e7),
624 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x0000006f),
625 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000),
626 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
627 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000),
628 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000),
629};
630
631RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_all_defs);
632
633static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_part_defs[] = {
634 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x016037e7),
635 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x0000006f),
636 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
637 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000),
638};
639
640RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_part_defs);
641
642static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_all_defs[] = {
643 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1),
644 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721),
645 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101),
646 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01f053f1),
647 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070),
648 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000),
649 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
650 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000),
651 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000),
652};
653
654RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_all_defs);
655
656static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_part_defs[] = {
657 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01f053f1),
658 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070),
659 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
660 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000),
661};
662
663RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_part_defs);
664
665static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_all_defs[] = {
666 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1),
667 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721),
668 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101),
669 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01c047ee),
670 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070),
671 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000),
672 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
673 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000),
674 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000),
675};
676
677RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_all_defs);
678
679static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_part_defs[] = {
680 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01c047ee),
681 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070),
682 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
683 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000),
684};
685
686RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_part_defs);
687
688static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_all_defs[] = {
689 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1),
690 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721),
691 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101),
692 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01ff2bb5),
693 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000078),
694 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000),
695 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x018f2bb0),
696 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000072),
697 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000),
698};
699
700RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_all_defs);
701
702static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_part_defs[] = {
703 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01ff2bb5),
704 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000078),
705 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x018f2bb0),
706 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000072),
707};
708
709RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_part_defs);
710
711static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_all_defs[] = {
712 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1),
713 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721),
714 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101),
715 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da),
716 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069),
717 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000),
718 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
719 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000),
720 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000),
721};
722
723RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_all_defs);
724
725static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_part_defs[] = {
726 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da),
727 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069),
728 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
729 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000),
730};
731
732RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_part_defs);
733
734static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_all_defs[] = {
735 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1),
736 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721),
737 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101),
738 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x013027e6),
739 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069),
740 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000),
741 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
742 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000),
743 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000),
744};
745
746RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_all_defs);
747
748static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_part_defs[] = {
749 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x013027e6),
750 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069),
751 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
752 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000),
753};
754
755RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_part_defs);
756
757static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_all_defs[] = {
758 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1),
759 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721),
760 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101),
761 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da),
762 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069),
763 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000),
764 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
765 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000),
766 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000),
767};
768
769RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_all_defs);
770
771static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_part_defs[] = {
772 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da),
773 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069),
774 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
775 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000),
776};
777
778RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_part_defs);
779
780static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_a[] = {
781 RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x1),
782 RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1),
783 RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x1),
784};
785
786RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_a);
787
788static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_b[] = {
789 RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x1),
790 RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x1),
791 RTW89_DECL_RFK_WM(0x7814, 0x20000000, 0x1),
792};
793
794RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_b);
795

source code of linux/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c