1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/* Copyright(c) 2019-2022 Realtek Corporation
3 */
4
5#include "rtw8852c_rfk_table.h"
6
7static const struct rtw89_reg5_def rtw8852c_dack_reload_defs[] = {
8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
12};
13
14RTW89_DECLARE_RFK_TBL(rtw8852c_dack_reload_defs);
15
16static const struct rtw89_reg5_def rtw8852c_dack_reset_defs_a[] = {
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x0),
18 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x1),
19};
20
21RTW89_DECLARE_RFK_TBL(rtw8852c_dack_reset_defs_a);
22
23static const struct rtw89_reg5_def rtw8852c_dack_reset_defs_b[] = {
24 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x0),
25 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x1),
26};
27
28RTW89_DECLARE_RFK_TBL(rtw8852c_dack_reset_defs_b);
29
30static const struct rtw89_reg5_def rtw8852c_dack_defs_s0[] = {
31 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
32 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
33 RTW89_DECL_RFK_WM(0x032c, 0x80000000, 0x0),
34 RTW89_DECL_RFK_WM(0xc004, 0xfff00000, 0x30),
35 RTW89_DECL_RFK_WM(0xc024, 0xfff00000, 0x30),
36};
37
38RTW89_DECLARE_RFK_TBL(rtw8852c_dack_defs_s0);
39
40static const struct rtw89_reg5_def rtw8852c_dack_defs_s1[] = {
41 RTW89_DECL_RFK_WM(0x32b8, BIT(30), 0x1),
42 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
43 RTW89_DECL_RFK_WM(0x032c, 0x80000000, 0x0),
44 RTW89_DECL_RFK_WM(0xc104, 0xfff00000, 0x30),
45 RTW89_DECL_RFK_WM(0xc124, 0xfff00000, 0x30),
46};
47
48RTW89_DECLARE_RFK_TBL(rtw8852c_dack_defs_s1);
49
50static const struct rtw89_reg5_def rtw8852c_drck_defs[] = {
51 RTW89_DECL_RFK_WM(0xc0c4, BIT(6), 0x0),
52 RTW89_DECL_RFK_WM(0xc094, BIT(9), 0x1),
53 RTW89_DECL_RFK_DELAY(1),
54 RTW89_DECL_RFK_WM(0xc094, BIT(9), 0x0),
55};
56
57RTW89_DECLARE_RFK_TBL(rtw8852c_drck_defs);
58
59static const struct rtw89_reg5_def rtw8852c_iqk_rxk_cfg_defs[] = {
60 RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x0f),
61 RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x03),
62 RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0001),
63 RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041),
64};
65
66RTW89_DECLARE_RFK_TBL(rtw8852c_iqk_rxk_cfg_defs);
67
68static const struct rtw89_reg5_def rtw8852c_iqk_afebb_restore_defs_a[] = {
69 RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x0),
70 RTW89_DECL_RFK_WM(0x20fc, 0x00010000, 0x1),
71 RTW89_DECL_RFK_WM(0x20fc, 0x00100000, 0x0),
72 RTW89_DECL_RFK_WM(0x20fc, 0x01000000, 0x1),
73 RTW89_DECL_RFK_WM(0x20fc, 0x10000000, 0x0),
74 RTW89_DECL_RFK_WM(0x5670, MASKDWORD, 0x00000000),
75 RTW89_DECL_RFK_WM(0x12a0, 0x000ff000, 0x00),
76 RTW89_DECL_RFK_WM(0x20fc, 0x00010000, 0x0),
77 RTW89_DECL_RFK_WM(0x20fc, 0x01000000, 0x0),
78 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x10005, 0x00001, 0x1),
79};
80
81RTW89_DECLARE_RFK_TBL(rtw8852c_iqk_afebb_restore_defs_a);
82
83static const struct rtw89_reg5_def rtw8852c_iqk_afebb_restore_defs_b[] = {
84 RTW89_DECL_RFK_WM(0x32b8, 0x40000000, 0x0),
85 RTW89_DECL_RFK_WM(0x20fc, 0x00020000, 0x1),
86 RTW89_DECL_RFK_WM(0x20fc, 0x00200000, 0x0),
87 RTW89_DECL_RFK_WM(0x20fc, 0x02000000, 0x1),
88 RTW89_DECL_RFK_WM(0x20fc, 0x20000000, 0x0),
89 RTW89_DECL_RFK_WM(0x7670, MASKDWORD, 0x00000000),
90 RTW89_DECL_RFK_WM(0x32a0, 0x000ff000, 0x00),
91 RTW89_DECL_RFK_WM(0x20fc, 0x00020000, 0x0),
92 RTW89_DECL_RFK_WM(0x20fc, 0x02000000, 0x0),
93 RTW89_DECL_RFK_WRF(RF_PATH_B, 0x10005, 0x00001, 0x1),
94};
95
96RTW89_DECLARE_RFK_TBL(rtw8852c_iqk_afebb_restore_defs_b);
97
98static const struct rtw89_reg5_def rtw8852c_read_rxsram_pre_defs[] = {
99 RTW89_DECL_RFK_WM(0x80e8, BIT(7), 0x1),
100 RTW89_DECL_RFK_WM(0x8074, BIT(31), 0x1),
101 RTW89_DECL_RFK_WM(0x80d4, MASKDWORD, 0x00020000),
102};
103
104RTW89_DECLARE_RFK_TBL(rtw8852c_read_rxsram_pre_defs);
105
106static const struct rtw89_reg5_def rtw8852c_read_rxsram_post_defs[] = {
107 RTW89_DECL_RFK_WM(0x80e8, BIT(7), 0x0),
108 RTW89_DECL_RFK_WM(0x8074, BIT(31), 0x0),
109};
110
111RTW89_DECLARE_RFK_TBL(rtw8852c_read_rxsram_post_defs);
112
113static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order0_defs[] = {
114 RTW89_DECL_RFK_WM(0x80a0, BIT(1) | BIT(0), 0x0),
115 RTW89_DECL_RFK_WM(0x809c, BIT(10) | BIT(9), 0x2),
116 RTW89_DECL_RFK_WM(0x80a0, 0x00001F00, 0x4),
117 RTW89_DECL_RFK_WM(0x8070, 0x70000000, 0x1),
118};
119
120RTW89_DECLARE_RFK_TBL(rtw8852c_dpk_mdpd_order0_defs);
121
122static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order1_defs[] = {
123 RTW89_DECL_RFK_WM(0x80a0, BIT(1) | BIT(0), 0x1),
124 RTW89_DECL_RFK_WM(0x809c, BIT(10) | BIT(9), 0x1),
125 RTW89_DECL_RFK_WM(0x80a0, 0x00001F00, 0x0),
126 RTW89_DECL_RFK_WM(0x8070, 0x70000000, 0x0),
127};
128
129RTW89_DECLARE_RFK_TBL(rtw8852c_dpk_mdpd_order1_defs);
130
131static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order2_defs[] = {
132 RTW89_DECL_RFK_WM(0x80a0, BIT(1) | BIT(0), 0x2),
133 RTW89_DECL_RFK_WM(0x809c, BIT(10) | BIT(9), 0x0),
134 RTW89_DECL_RFK_WM(0x80a0, 0x00001F00, 0x0),
135 RTW89_DECL_RFK_WM(0x8070, 0x70000000, 0x0),
136};
137
138RTW89_DECLARE_RFK_TBL(rtw8852c_dpk_mdpd_order2_defs);
139
140static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order3_defs[] = {
141 RTW89_DECL_RFK_WM(0x80a0, BIT(1) | BIT(0), 0x3),
142 RTW89_DECL_RFK_WM(0x809c, BIT(10) | BIT(9), 0x3),
143 RTW89_DECL_RFK_WM(0x80a0, 0x00001F00, 0x4),
144 RTW89_DECL_RFK_WM(0x8070, 0x70000000, 0x1),
145};
146
147RTW89_DECLARE_RFK_TBL(rtw8852c_dpk_mdpd_order3_defs);
148
149static const struct rtw89_reg5_def rtw8852c_dpk_kip_pwr_clk_on_defs[] = {
150 RTW89_DECL_RFK_WM(0x8008, MASKDWORD, 0x00000080),
151 RTW89_DECL_RFK_WM(0x8088, MASKDWORD, 0x807f030a),
152};
153
154RTW89_DECLARE_RFK_TBL(rtw8852c_dpk_kip_pwr_clk_on_defs);
155
156static const struct rtw89_reg5_def rtw8852c_dpk_kip_pwr_clk_off_defs[] = {
157 RTW89_DECL_RFK_WM(0x8008, MASKDWORD, 0x00000000),
158 RTW89_DECL_RFK_WM(0x8088, MASKDWORD, 0x80000000),
159 RTW89_DECL_RFK_WM(0x80f4, BIT(18), 0x1),
160};
161
162RTW89_DECLARE_RFK_TBL(rtw8852c_dpk_kip_pwr_clk_off_defs);
163
164static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs[] = {
165 RTW89_DECL_RFK_WM(0x12bc, 0x000ffff0, 0xb5b5),
166 RTW89_DECL_RFK_WM(0x32bc, 0x000ffff0, 0xb5b5),
167 RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x16),
168 RTW89_DECL_RFK_WM(0x0304, 0x0000ffff, 0x1313),
169 RTW89_DECL_RFK_WM(0x0308, 0xff000000, 0x13),
170 RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x2041),
171 RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x00410041),
172 RTW89_DECL_RFK_WM(0x0324, 0xffff0000, 0x0041),
173 RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x3),
174 RTW89_DECL_RFK_WM(0x0024, 0x00006000, 0x3),
175 RTW89_DECL_RFK_WM(0x0704, 0xffff0000, 0x601e),
176 RTW89_DECL_RFK_WM(0x2704, 0xffff0000, 0x601e),
177 RTW89_DECL_RFK_WM(0x0700, 0xf0000000, 0x4),
178 RTW89_DECL_RFK_WM(0x2700, 0xf0000000, 0x4),
179 RTW89_DECL_RFK_WM(0x0650, 0x3c000000, 0x0),
180 RTW89_DECL_RFK_WM(0x2650, 0x3c000000, 0x0),
181};
182
183RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_sys_defs);
184
185static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_2g_a[] = {
186 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x33),
187 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x33),
188 RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x1),
189};
190
191RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_sys_defs_2g_a);
192
193static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_2g_b[] = {
194 RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x33),
195 RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x33),
196 RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x1),
197};
198
199RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_sys_defs_2g_b);
200
201static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_5g_a[] = {
202 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x44),
203 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x44),
204 RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x0),
205};
206
207RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_sys_defs_5g_a);
208
209static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_5g_b[] = {
210 RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x44),
211 RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x44),
212 RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x0),
213};
214
215RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_sys_defs_5g_b);
216
217static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_defs_a[] = {
218 RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0),
219 RTW89_DECL_RFK_WM(0x5800, 0xffffffff, 0x003f807f),
220 RTW89_DECL_RFK_WM(0x580c, 0x0000007f, 0x40),
221 RTW89_DECL_RFK_WM(0x580c, 0x0fffff00, 0x00040),
222 RTW89_DECL_RFK_WM(0x5810, 0xffffffff, 0x59010000),
223 RTW89_DECL_RFK_WM(0x5814, 0x01ffffff, 0x026d000),
224 RTW89_DECL_RFK_WM(0x5814, 0xf8000000, 0x00),
225 RTW89_DECL_RFK_WM(0x5818, 0xffffffff, 0x002c18e8),
226 RTW89_DECL_RFK_WM(0x581c, 0x3fffffff, 0x3dc80280),
227 RTW89_DECL_RFK_WM(0x5820, 0xffffffff, 0x00000080),
228 RTW89_DECL_RFK_WM(0x58e8, 0x0000003f, 0x03),
229 RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1),
230 RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1),
231 RTW89_DECL_RFK_WM(0x5834, 0x3fffffff, 0x000115f2),
232 RTW89_DECL_RFK_WM(0x5838, 0x7fffffff, 0x0000121),
233 RTW89_DECL_RFK_WM(0x5854, 0x3fffffff, 0x000115f2),
234 RTW89_DECL_RFK_WM(0x5858, 0x7fffffff, 0x0000121),
235 RTW89_DECL_RFK_WM(0x5860, 0x80000000, 0x0),
236 RTW89_DECL_RFK_WM(0x5864, 0x07ffffff, 0x00801ff),
237 RTW89_DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000),
238 RTW89_DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000),
239 RTW89_DECL_RFK_WM(0x58a4, 0x000000ff, 0x16),
240 RTW89_DECL_RFK_WM(0x58b4, 0x7fffffff, 0x0a002000),
241 RTW89_DECL_RFK_WM(0x58b8, 0x7fffffff, 0x00007628),
242 RTW89_DECL_RFK_WM(0x58bc, 0x07ffffff, 0x7a7807f),
243 RTW89_DECL_RFK_WM(0x58c0, 0xfffe0000, 0x003f),
244 RTW89_DECL_RFK_WM(0x58c4, 0xffffffff, 0x0003ffff),
245 RTW89_DECL_RFK_WM(0x58c8, 0x00ffffff, 0x000000),
246 RTW89_DECL_RFK_WM(0x58c8, 0xf0000000, 0x0),
247 RTW89_DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000),
248 RTW89_DECL_RFK_WM(0x58d0, 0x07ffffff, 0x2008101),
249 RTW89_DECL_RFK_WM(0x58d4, 0x000000ff, 0x00),
250 RTW89_DECL_RFK_WM(0x58d4, 0x0003fe00, 0x0ff),
251 RTW89_DECL_RFK_WM(0x58d4, 0x07fc0000, 0x100),
252 RTW89_DECL_RFK_WM(0x58d8, 0xffffffff, 0x8008016c),
253 RTW89_DECL_RFK_WM(0x58dc, 0x0001ffff, 0x0807f),
254 RTW89_DECL_RFK_WM(0x58dc, 0xfff00000, 0xc00),
255 RTW89_DECL_RFK_WM(0x58f0, 0x0003ffff, 0x001ff),
256 RTW89_DECL_RFK_WM(0x58f4, 0x000fffff, 0x000),
257 RTW89_DECL_RFK_WM(0x58f8, 0x000fffff, 0x000),
258};
259
260RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_txpwr_ctrl_bb_defs_a);
261
262static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_defs_b[] = {
263 RTW89_DECL_RFK_WM(0x766c, 0x00001000, 0x0),
264 RTW89_DECL_RFK_WM(0x7800, 0xffffffff, 0x003f807f),
265 RTW89_DECL_RFK_WM(0x780c, 0x0000007f, 0x40),
266 RTW89_DECL_RFK_WM(0x780c, 0x0fffff00, 0x00040),
267 RTW89_DECL_RFK_WM(0x7810, 0xffffffff, 0x59010000),
268 RTW89_DECL_RFK_WM(0x7814, 0x01ffffff, 0x026d000),
269 RTW89_DECL_RFK_WM(0x7814, 0xf8000000, 0x00),
270 RTW89_DECL_RFK_WM(0x7818, 0xffffffff, 0x002c18e8),
271 RTW89_DECL_RFK_WM(0x781c, 0x3fffffff, 0x3dc80280),
272 RTW89_DECL_RFK_WM(0x7820, 0xffffffff, 0x00000080),
273 RTW89_DECL_RFK_WM(0x78e8, 0x0000003f, 0x03),
274 RTW89_DECL_RFK_WM(0x780c, 0x10000000, 0x1),
275 RTW89_DECL_RFK_WM(0x780c, 0x40000000, 0x1),
276 RTW89_DECL_RFK_WM(0x7834, 0x3fffffff, 0x000115f2),
277 RTW89_DECL_RFK_WM(0x7838, 0x7fffffff, 0x0000121),
278 RTW89_DECL_RFK_WM(0x7854, 0x3fffffff, 0x000115f2),
279 RTW89_DECL_RFK_WM(0x7858, 0x7fffffff, 0x0000121),
280 RTW89_DECL_RFK_WM(0x7860, 0x80000000, 0x0),
281 RTW89_DECL_RFK_WM(0x7864, 0x07ffffff, 0x00801ff),
282 RTW89_DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000),
283 RTW89_DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000),
284 RTW89_DECL_RFK_WM(0x78a4, 0x000000ff, 0x16),
285 RTW89_DECL_RFK_WM(0x78b4, 0x7fffffff, 0x0a002000),
286 RTW89_DECL_RFK_WM(0x78b8, 0x7fffffff, 0x00007628),
287 RTW89_DECL_RFK_WM(0x78bc, 0x07ffffff, 0x7a7807f),
288 RTW89_DECL_RFK_WM(0x78c0, 0xfffe0000, 0x003f),
289 RTW89_DECL_RFK_WM(0x78c4, 0xffffffff, 0x0003ffff),
290 RTW89_DECL_RFK_WM(0x78c8, 0x00ffffff, 0x000000),
291 RTW89_DECL_RFK_WM(0x78c8, 0xf0000000, 0x0),
292 RTW89_DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000),
293 RTW89_DECL_RFK_WM(0x78d0, 0x07ffffff, 0x2008101),
294 RTW89_DECL_RFK_WM(0x78d4, 0x000000ff, 0x00),
295 RTW89_DECL_RFK_WM(0x78d4, 0x0003fe00, 0x0ff),
296 RTW89_DECL_RFK_WM(0x78d4, 0x07fc0000, 0x100),
297 RTW89_DECL_RFK_WM(0x78d8, 0xffffffff, 0x8008016c),
298 RTW89_DECL_RFK_WM(0x78dc, 0x0001ffff, 0x0807f),
299 RTW89_DECL_RFK_WM(0x78dc, 0xfff00000, 0xc00),
300 RTW89_DECL_RFK_WM(0x78f0, 0x0003ffff, 0x001ff),
301 RTW89_DECL_RFK_WM(0x78f4, 0x000fffff, 0x000),
302 RTW89_DECL_RFK_WM(0x78f8, 0x000fffff, 0x000),
303};
304
305RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_txpwr_ctrl_bb_defs_b);
306
307static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_he_tb_defs_a[] = {
308 RTW89_DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fe),
309 RTW89_DECL_RFK_WM(0x58e4, 0x0000007f, 0x1f),
310};
311
312RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_txpwr_ctrl_bb_he_tb_defs_a);
313
314static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_he_tb_defs_b[] = {
315 RTW89_DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fe),
316 RTW89_DECL_RFK_WM(0x78e4, 0x0000007f, 0x1f),
317};
318
319RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_txpwr_ctrl_bb_he_tb_defs_b);
320
321static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_a[] = {
322 RTW89_DECL_RFK_WM(0x58c4, 0x3ffc0000, 0x0),
323 RTW89_DECL_RFK_WM(0x58c8, 0x00000fff, 0x0),
324 RTW89_DECL_RFK_WM(0x58c8, 0x00fff000, 0x0),
325};
326
327RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_dck_defs_a);
328
329static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_b[] = {
330 RTW89_DECL_RFK_WM(0x78c4, 0x3ffc0000, 0x0),
331 RTW89_DECL_RFK_WM(0x78c8, 0x00000fff, 0x0),
332 RTW89_DECL_RFK_WM(0x78c8, 0x00fff000, 0x0),
333};
334
335RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_dck_defs_b);
336
337static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_2g_a[] = {
338 RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x000),
339 RTW89_DECL_RFK_WM(0x5814, 0x003ff000, 0x1af),
340 RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x0),
341};
342
343RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_dck_defs_2g_a);
344
345static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_2g_b[] = {
346 RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x000),
347 RTW89_DECL_RFK_WM(0x7814, 0x003ff000, 0x1af),
348 RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x0),
349};
350
351RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_dck_defs_2g_b);
352
353static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_5g_a[] = {
354 RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x000),
355 RTW89_DECL_RFK_WM(0x5814, 0x00001000, 0x1),
356 RTW89_DECL_RFK_WM(0x5814, 0x0003c000, 0xb),
357 RTW89_DECL_RFK_WM(0x5814, 0x00002000, 0x1),
358 RTW89_DECL_RFK_WM(0x5814, 0x003c0000, 0x6),
359 RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x0),
360};
361
362RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_dck_defs_5g_a);
363
364static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_5g_b[] = {
365 RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x000),
366 RTW89_DECL_RFK_WM(0x7814, 0x00001000, 0x1),
367 RTW89_DECL_RFK_WM(0x7814, 0x0003c000, 0xb),
368 RTW89_DECL_RFK_WM(0x7814, 0x00002000, 0x1),
369 RTW89_DECL_RFK_WM(0x7814, 0x003c0000, 0x6),
370 RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x0),
371};
372
373RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_dck_defs_5g_b);
374
375static const struct rtw89_reg5_def rtw8852c_tssi_set_bbgain_split_a[] = {
376 RTW89_DECL_RFK_WM(0x5818, 0x08000000, 0x1),
377 RTW89_DECL_RFK_WM(0x58d4, 0xf0000000, 0x7),
378 RTW89_DECL_RFK_WM(0x58f0, 0x000c0000, 0x1),
379 RTW89_DECL_RFK_WM(0x58f0, 0xfff00000, 0x400),
380};
381
382RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_bbgain_split_a);
383
384static const struct rtw89_reg5_def rtw8852c_tssi_set_bbgain_split_b[] = {
385 RTW89_DECL_RFK_WM(0x7818, 0x08000000, 0x1),
386 RTW89_DECL_RFK_WM(0x78d4, 0xf0000000, 0x7),
387 RTW89_DECL_RFK_WM(0x78f0, 0x000c0000, 0x1),
388 RTW89_DECL_RFK_WM(0x78f0, 0xfff00000, 0x400),
389};
390
391RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_bbgain_split_b);
392
393static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_2g_a[] = {
394 RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008),
395 RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201008),
396 RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201020),
397 RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008),
398 RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0801008),
399 RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008),
400 RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808),
401 RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08080808),
402 RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x0808081e),
403 RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808),
404 RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x081d),
405 RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1),
406};
407
408RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_slope_cal_org_defs_2g_a);
409
410static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_2g_b[] = {
411 RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0201008),
412 RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201008),
413 RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0204020),
414 RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0201008),
415 RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0801008),
416 RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x020),
417 RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808),
418 RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08080808),
419 RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08081e21),
420 RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08080808),
421 RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x1d23),
422 RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1),
423};
424
425RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_slope_cal_org_defs_2g_b);
426
427static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_5g_a[] = {
428 RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008),
429 RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201008),
430 RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008),
431 RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008),
432 RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008),
433 RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008),
434 RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808),
435 RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08080808),
436 RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808),
437 RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808),
438 RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808),
439 RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x0),
440};
441
442RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_slope_cal_org_defs_5g_a);
443
444static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_5g_b[] = {
445 RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0201008),
446 RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201008),
447 RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008),
448 RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0201008),
449 RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008),
450 RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008),
451 RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808),
452 RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08080808),
453 RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808),
454 RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08080808),
455 RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808),
456 RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x0),
457};
458
459RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_slope_cal_org_defs_5g_b);
460
461static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_2g_a[] = {
462 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1),
463 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x000000),
464 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x2d2721),
465 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x00000000),
466 RTW89_DECL_RFK_WM(0x5634, 0x000003ff, 0x000),
467 RTW89_DECL_RFK_WM(0x5634, 0x000ffc00, 0x3b8),
468 RTW89_DECL_RFK_WM(0x5634, 0x3ff00000, 0x3d2),
469 RTW89_DECL_RFK_WM(0x5638, 0x000003ff, 0x042),
470 RTW89_DECL_RFK_WM(0x5638, 0x000ffc00, 0x06b),
471 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
472 RTW89_DECL_RFK_WM(0x5640, 0x000003ff, 0x000),
473 RTW89_DECL_RFK_WM(0x5640, 0x000ffc00, 0x3bc),
474 RTW89_DECL_RFK_WM(0x5640, 0x3ff00000, 0x3d6),
475 RTW89_DECL_RFK_WM(0x5644, 0x000003ff, 0x03e),
476 RTW89_DECL_RFK_WM(0x5644, 0x000ffc00, 0x06b),
477};
478
479RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_aligk_default_defs_2g_a);
480
481static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_2g_b[] = {
482 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1),
483 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x000000),
484 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x2d2721),
485 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x00000000),
486 RTW89_DECL_RFK_WM(0x7634, 0x000003ff, 0x000),
487 RTW89_DECL_RFK_WM(0x7634, 0x000ffc00, 0x3c0),
488 RTW89_DECL_RFK_WM(0x7634, 0x3ff00000, 0x3da),
489 RTW89_DECL_RFK_WM(0x7638, 0x000003ff, 0x002),
490 RTW89_DECL_RFK_WM(0x7638, 0x000ffc00, 0x071),
491 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
492 RTW89_DECL_RFK_WM(0x7640, 0x000003ff, 0x000),
493 RTW89_DECL_RFK_WM(0x7640, 0x000ffc00, 0x3c8),
494 RTW89_DECL_RFK_WM(0x7640, 0x3ff00000, 0x3e2),
495 RTW89_DECL_RFK_WM(0x7644, 0x000003ff, 0x00c),
496 RTW89_DECL_RFK_WM(0x7644, 0x000ffc00, 0x071),
497};
498
499RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_aligk_default_defs_2g_b);
500
501static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_5g_a[] = {
502 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1),
503 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x000000),
504 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x312600),
505 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x00000000),
506 RTW89_DECL_RFK_WM(0x5634, 0x000003ff, 0x000),
507 RTW89_DECL_RFK_WM(0x5634, 0x000ffc00, 0x000),
508 RTW89_DECL_RFK_WM(0x5634, 0x3ff00000, 0x3e9),
509 RTW89_DECL_RFK_WM(0x5638, 0x000003ff, 0x039),
510 RTW89_DECL_RFK_WM(0x5638, 0x000ffc00, 0x07d),
511 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
512 RTW89_DECL_RFK_WM(0x5640, 0x000003ff, 0x000),
513 RTW89_DECL_RFK_WM(0x5640, 0x000ffc00, 0x000),
514 RTW89_DECL_RFK_WM(0x5640, 0x3ff00000, 0x3e9),
515 RTW89_DECL_RFK_WM(0x5644, 0x000003ff, 0x039),
516 RTW89_DECL_RFK_WM(0x5644, 0x000ffc00, 0x07d),
517};
518
519RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_aligk_default_defs_5g_a);
520
521static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_5g_b[] = {
522 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1),
523 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x000000),
524 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x312600),
525 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x00000000),
526 RTW89_DECL_RFK_WM(0x7634, 0x000003ff, 0x000),
527 RTW89_DECL_RFK_WM(0x7634, 0x000ffc00, 0x000),
528 RTW89_DECL_RFK_WM(0x7634, 0x3ff00000, 0x3e9),
529 RTW89_DECL_RFK_WM(0x7638, 0x000003ff, 0x039),
530 RTW89_DECL_RFK_WM(0x7638, 0x000ffc00, 0x07d),
531 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
532 RTW89_DECL_RFK_WM(0x7640, 0x000003ff, 0x000),
533 RTW89_DECL_RFK_WM(0x7640, 0x000ffc00, 0x000),
534 RTW89_DECL_RFK_WM(0x7640, 0x3ff00000, 0x3e9),
535 RTW89_DECL_RFK_WM(0x7644, 0x000003ff, 0x039),
536 RTW89_DECL_RFK_WM(0x7644, 0x000ffc00, 0x07d),
537};
538
539RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_aligk_default_defs_5g_b);
540
541static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_6g_a[] = {
542 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1),
543 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x000000),
544 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x312600),
545 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x00000000),
546 RTW89_DECL_RFK_WM(0x5634, 0x000003ff, 0x000),
547 RTW89_DECL_RFK_WM(0x5634, 0x000ffc00, 0x000),
548 RTW89_DECL_RFK_WM(0x5634, 0x3ff00000, 0x3e9),
549 RTW89_DECL_RFK_WM(0x5638, 0x000003ff, 0x039),
550 RTW89_DECL_RFK_WM(0x5638, 0x000ffc00, 0x080),
551 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000),
552 RTW89_DECL_RFK_WM(0x5640, 0x000003ff, 0x000),
553 RTW89_DECL_RFK_WM(0x5640, 0x000ffc00, 0x000),
554 RTW89_DECL_RFK_WM(0x5640, 0x3ff00000, 0x3e9),
555 RTW89_DECL_RFK_WM(0x5644, 0x000003ff, 0x039),
556 RTW89_DECL_RFK_WM(0x5644, 0x000ffc00, 0x080),
557};
558
559RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_aligk_default_defs_6g_a);
560
561static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_6g_b[] = {
562 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1),
563 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x000000),
564 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x312600),
565 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x00000000),
566 RTW89_DECL_RFK_WM(0x7634, 0x000003ff, 0x000),
567 RTW89_DECL_RFK_WM(0x7634, 0x000ffc00, 0x000),
568 RTW89_DECL_RFK_WM(0x7634, 0x3ff00000, 0x3e9),
569 RTW89_DECL_RFK_WM(0x7638, 0x000003ff, 0x039),
570 RTW89_DECL_RFK_WM(0x7638, 0x000ffc00, 0x080),
571 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000),
572 RTW89_DECL_RFK_WM(0x7640, 0x000003ff, 0x000),
573 RTW89_DECL_RFK_WM(0x7640, 0x000ffc00, 0x000),
574 RTW89_DECL_RFK_WM(0x7640, 0x3ff00000, 0x3e9),
575 RTW89_DECL_RFK_WM(0x7644, 0x000003ff, 0x039),
576 RTW89_DECL_RFK_WM(0x7644, 0x000ffc00, 0x080),
577};
578
579RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_set_aligk_default_defs_6g_b);
580
581static const struct rtw89_reg5_def rtw8852c_tssi_slope_defs_a[] = {
582 RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x0),
583 RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x0),
584 RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x1),
585 RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1),
586 RTW89_DECL_RFK_WM(0x58e8, 0x0000003f, 0x0f),
587 RTW89_DECL_RFK_WM(0x581c, 0x000003ff, 0x280),
588 RTW89_DECL_RFK_WM(0x581c, 0x000ffc00, 0x200),
589 RTW89_DECL_RFK_WM(0x58b8, 0x007f0000, 0x00),
590 RTW89_DECL_RFK_WM(0x58b8, 0x7f000000, 0x00),
591 RTW89_DECL_RFK_WM(0x58b4, 0x7f000000, 0x0a),
592 RTW89_DECL_RFK_WM(0x58b8, 0x0000007f, 0x28),
593 RTW89_DECL_RFK_WM(0x58b8, 0x00007f00, 0x76),
594 RTW89_DECL_RFK_WM(0x5810, 0x20000000, 0x0),
595 RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x1),
596 RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1),
597 RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1),
598 RTW89_DECL_RFK_WM(0x5834, 0x0003ffff, 0x115f2),
599 RTW89_DECL_RFK_WM(0x5834, 0x3ffc0000, 0x000),
600 RTW89_DECL_RFK_WM(0x5838, 0x00000fff, 0x121),
601 RTW89_DECL_RFK_WM(0x5838, 0x003ff000, 0x000),
602 RTW89_DECL_RFK_WM(0x5854, 0x0003ffff, 0x115f2),
603 RTW89_DECL_RFK_WM(0x5854, 0x3ffc0000, 0x000),
604 RTW89_DECL_RFK_WM(0x5858, 0x00000fff, 0x121),
605 RTW89_DECL_RFK_WM(0x5858, 0x003ff000, 0x000),
606 RTW89_DECL_RFK_WM(0x5824, 0x0003ffff, 0x115f2),
607 RTW89_DECL_RFK_WM(0x5824, 0x3ffc0000, 0x000),
608 RTW89_DECL_RFK_WM(0x5828, 0x00000fff, 0x121),
609 RTW89_DECL_RFK_WM(0x5828, 0x003ff000, 0x000),
610 RTW89_DECL_RFK_WM(0x582c, 0x0003ffff, 0x115f2),
611 RTW89_DECL_RFK_WM(0x582c, 0x3ffc0000, 0x000),
612 RTW89_DECL_RFK_WM(0x5830, 0x00000fff, 0x121),
613 RTW89_DECL_RFK_WM(0x5830, 0x003ff000, 0x000),
614 RTW89_DECL_RFK_WM(0x583c, 0x0003ffff, 0x115f2),
615 RTW89_DECL_RFK_WM(0x583c, 0x3ffc0000, 0x000),
616 RTW89_DECL_RFK_WM(0x5840, 0x00000fff, 0x121),
617 RTW89_DECL_RFK_WM(0x5840, 0x003ff000, 0x000),
618 RTW89_DECL_RFK_WM(0x5844, 0x0003ffff, 0x115f2),
619 RTW89_DECL_RFK_WM(0x5844, 0x3ffc0000, 0x000),
620 RTW89_DECL_RFK_WM(0x5848, 0x00000fff, 0x121),
621 RTW89_DECL_RFK_WM(0x5848, 0x003ff000, 0x000),
622 RTW89_DECL_RFK_WM(0x584c, 0x0003ffff, 0x115f2),
623 RTW89_DECL_RFK_WM(0x584c, 0x3ffc0000, 0x000),
624 RTW89_DECL_RFK_WM(0x5850, 0x00000fff, 0x121),
625 RTW89_DECL_RFK_WM(0x5850, 0x003ff000, 0x000),
626 RTW89_DECL_RFK_WM(0x585c, 0x0003ffff, 0x115f2),
627 RTW89_DECL_RFK_WM(0x585c, 0x3ffc0000, 0x000),
628 RTW89_DECL_RFK_WM(0x5860, 0x00000fff, 0x121),
629 RTW89_DECL_RFK_WM(0x5860, 0x003ff000, 0x000),
630};
631
632RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_slope_defs_a);
633
634static const struct rtw89_reg5_def rtw8852c_tssi_slope_defs_b[] = {
635 RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x0),
636 RTW89_DECL_RFK_WM(0x7818, 0x10000000, 0x0),
637 RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x1),
638 RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x1),
639 RTW89_DECL_RFK_WM(0x78e8, 0x0000003f, 0x0f),
640 RTW89_DECL_RFK_WM(0x781c, 0x000003ff, 0x280),
641 RTW89_DECL_RFK_WM(0x781c, 0x000ffc00, 0x200),
642 RTW89_DECL_RFK_WM(0x78b8, 0x007f0000, 0x00),
643 RTW89_DECL_RFK_WM(0x78b8, 0x7f000000, 0x00),
644 RTW89_DECL_RFK_WM(0x78b4, 0x7f000000, 0x0a),
645 RTW89_DECL_RFK_WM(0x78b8, 0x0000007f, 0x28),
646 RTW89_DECL_RFK_WM(0x78b8, 0x00007f00, 0x76),
647 RTW89_DECL_RFK_WM(0x7810, 0x20000000, 0x0),
648 RTW89_DECL_RFK_WM(0x7814, 0x20000000, 0x1),
649 RTW89_DECL_RFK_WM(0x780c, 0x10000000, 0x1),
650 RTW89_DECL_RFK_WM(0x780c, 0x40000000, 0x1),
651 RTW89_DECL_RFK_WM(0x7834, 0x0003ffff, 0x115f2),
652 RTW89_DECL_RFK_WM(0x7834, 0x3ffc0000, 0x000),
653 RTW89_DECL_RFK_WM(0x7838, 0x00000fff, 0x121),
654 RTW89_DECL_RFK_WM(0x7838, 0x003ff000, 0x000),
655 RTW89_DECL_RFK_WM(0x7854, 0x0003ffff, 0x115f2),
656 RTW89_DECL_RFK_WM(0x7854, 0x3ffc0000, 0x000),
657 RTW89_DECL_RFK_WM(0x7858, 0x00000fff, 0x121),
658 RTW89_DECL_RFK_WM(0x7858, 0x003ff000, 0x000),
659 RTW89_DECL_RFK_WM(0x7824, 0x0003ffff, 0x115f2),
660 RTW89_DECL_RFK_WM(0x7824, 0x3ffc0000, 0x000),
661 RTW89_DECL_RFK_WM(0x7828, 0x00000fff, 0x121),
662 RTW89_DECL_RFK_WM(0x7828, 0x003ff000, 0x000),
663 RTW89_DECL_RFK_WM(0x782c, 0x0003ffff, 0x115f2),
664 RTW89_DECL_RFK_WM(0x782c, 0x3ffc0000, 0x000),
665 RTW89_DECL_RFK_WM(0x7830, 0x00000fff, 0x121),
666 RTW89_DECL_RFK_WM(0x7830, 0x003ff000, 0x000),
667 RTW89_DECL_RFK_WM(0x783c, 0x0003ffff, 0x115f2),
668 RTW89_DECL_RFK_WM(0x783c, 0x3ffc0000, 0x000),
669 RTW89_DECL_RFK_WM(0x7840, 0x00000fff, 0x121),
670 RTW89_DECL_RFK_WM(0x7840, 0x003ff000, 0x000),
671 RTW89_DECL_RFK_WM(0x7844, 0x0003ffff, 0x115f2),
672 RTW89_DECL_RFK_WM(0x7844, 0x3ffc0000, 0x000),
673 RTW89_DECL_RFK_WM(0x7848, 0x00000fff, 0x121),
674 RTW89_DECL_RFK_WM(0x7848, 0x003ff000, 0x000),
675 RTW89_DECL_RFK_WM(0x784c, 0x0003ffff, 0x115f2),
676 RTW89_DECL_RFK_WM(0x784c, 0x3ffc0000, 0x000),
677 RTW89_DECL_RFK_WM(0x7850, 0x00000fff, 0x121),
678 RTW89_DECL_RFK_WM(0x7850, 0x003ff000, 0x000),
679 RTW89_DECL_RFK_WM(0x785c, 0x0003ffff, 0x115f2),
680 RTW89_DECL_RFK_WM(0x785c, 0x3ffc0000, 0x000),
681 RTW89_DECL_RFK_WM(0x7860, 0x00000fff, 0x121),
682 RTW89_DECL_RFK_WM(0x7860, 0x003ff000, 0x000),
683};
684
685RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_slope_defs_b);
686
687static const struct rtw89_reg5_def rtw8852c_tssi_run_slope_defs_a[] = {
688 RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x0),
689 RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x1),
690};
691
692RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_run_slope_defs_a);
693
694static const struct rtw89_reg5_def rtw8852c_tssi_run_slope_defs_b[] = {
695 RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x0),
696 RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x1),
697};
698
699RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_run_slope_defs_b);
700
701static const struct rtw89_reg5_def rtw8852c_tssi_track_defs_a[] = {
702 RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x0),
703 RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x0),
704 RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x0),
705 RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1),
706 RTW89_DECL_RFK_WM(0x5864, 0x000003ff, 0x1ff),
707 RTW89_DECL_RFK_WM(0x5864, 0x000ffc00, 0x200),
708 RTW89_DECL_RFK_WM(0x5820, 0x00000fff, 0x080),
709 RTW89_DECL_RFK_WM(0x5814, 0x01000000, 0x0),
710};
711
712RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_track_defs_a);
713
714static const struct rtw89_reg5_def rtw8852c_tssi_track_defs_b[] = {
715 RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x0),
716 RTW89_DECL_RFK_WM(0x7818, 0x10000000, 0x0),
717 RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x0),
718 RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x1),
719 RTW89_DECL_RFK_WM(0x7864, 0x000003ff, 0x1ff),
720 RTW89_DECL_RFK_WM(0x7864, 0x000ffc00, 0x200),
721 RTW89_DECL_RFK_WM(0x7820, 0x00000fff, 0x080),
722 RTW89_DECL_RFK_WM(0x7814, 0x01000000, 0x0),
723};
724
725RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_track_defs_b);
726
727static const struct rtw89_reg5_def rtw8852c_tssi_txagc_ofst_mv_avg_defs_a[] = {
728 RTW89_DECL_RFK_WM(0x58e4, 0x00003800, 0x1),
729 RTW89_DECL_RFK_WM(0x58e4, 0x00004000, 0x0),
730 RTW89_DECL_RFK_WM(0x58e4, 0x00008000, 0x1),
731 RTW89_DECL_RFK_WM(0x58e4, 0x000f0000, 0x0),
732 RTW89_DECL_RFK_WM(0x58e8, 0x0000003f, 0x03),
733};
734
735RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_txagc_ofst_mv_avg_defs_a);
736
737static const struct rtw89_reg5_def rtw8852c_tssi_txagc_ofst_mv_avg_defs_b[] = {
738 RTW89_DECL_RFK_WM(0x78e4, 0x00003800, 0x1),
739 RTW89_DECL_RFK_WM(0x78e4, 0x00004000, 0x0),
740 RTW89_DECL_RFK_WM(0x78e4, 0x00008000, 0x1),
741 RTW89_DECL_RFK_WM(0x78e4, 0x000f0000, 0x0),
742 RTW89_DECL_RFK_WM(0x78e8, 0x0000003f, 0x03),
743};
744
745RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_txagc_ofst_mv_avg_defs_b);
746
747static const struct rtw89_reg5_def rtw8852c_tssi_enable_defs_a[] = {
748 RTW89_DECL_RFK_WM(0x58e4, 0x00004000, 0x0),
749 RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x0),
750 RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x1),
751 RTW89_DECL_RFK_WRF(0x0, 0x10055, 0x00080, 0x1),
752 RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x1),
753};
754
755RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_enable_defs_a);
756
757static const struct rtw89_reg5_def rtw8852c_tssi_enable_defs_b[] = {
758 RTW89_DECL_RFK_WM(0x78e4, 0x00004000, 0x0),
759 RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x0),
760 RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x1),
761 RTW89_DECL_RFK_WRF(0x1, 0x10055, 0x00080, 0x1),
762 RTW89_DECL_RFK_WM(0x7818, 0x10000000, 0x1),
763};
764
765RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_enable_defs_b);
766
767static const struct rtw89_reg5_def rtw8852c_tssi_disable_defs_a[] = {
768 RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x00000000),
769 RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x00000000),
770 RTW89_DECL_RFK_WM(0x58e4, 0x00004000, 0x00000001),
771};
772
773RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_disable_defs_a);
774
775static const struct rtw89_reg5_def rtw8852c_tssi_disable_defs_b[] = {
776 RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x00000000),
777 RTW89_DECL_RFK_WM(0x7818, 0x10000000, 0x00000000),
778 RTW89_DECL_RFK_WM(0x78e4, 0x00004000, 0x00000001),
779};
780
781RTW89_DECLARE_RFK_TBL(rtw8852c_tssi_disable_defs_b);
782

source code of linux/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk_table.c