1 | /* |
2 | * Copyright (c) 2014 Redpine Signals Inc. |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any |
5 | * purpose with or without fee is hereby granted, provided that the above |
6 | * copyright notice and this permission notice appear in all copies. |
7 | * |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
15 | * |
16 | */ |
17 | |
18 | #include <linux/firmware.h> |
19 | #include <net/rsi_91x.h> |
20 | #include "rsi_sdio.h" |
21 | #include "rsi_common.h" |
22 | |
23 | /** |
24 | * rsi_sdio_master_access_msword() - This function sets the AHB master access |
25 | * MS word in the SDIO slave registers. |
26 | * @adapter: Pointer to the adapter structure. |
27 | * @ms_word: ms word need to be initialized. |
28 | * |
29 | * Return: status: 0 on success, -1 on failure. |
30 | */ |
31 | int rsi_sdio_master_access_msword(struct rsi_hw *adapter, u16 ms_word) |
32 | { |
33 | u8 byte; |
34 | u8 function = 0; |
35 | int status = 0; |
36 | |
37 | byte = (u8)(ms_word & 0x00FF); |
38 | |
39 | rsi_dbg(INIT_ZONE, |
40 | fmt: "%s: MASTER_ACCESS_MSBYTE:0x%x\n" , __func__, byte); |
41 | |
42 | status = rsi_sdio_write_register(adapter, |
43 | function, |
44 | SDIO_MASTER_ACCESS_MSBYTE, |
45 | data: &byte); |
46 | if (status) { |
47 | rsi_dbg(ERR_ZONE, |
48 | fmt: "%s: fail to access MASTER_ACCESS_MSBYTE\n" , |
49 | __func__); |
50 | return -1; |
51 | } |
52 | |
53 | byte = (u8)(ms_word >> 8); |
54 | |
55 | rsi_dbg(INIT_ZONE, fmt: "%s:MASTER_ACCESS_LSBYTE:0x%x\n" , __func__, byte); |
56 | status = rsi_sdio_write_register(adapter, |
57 | function, |
58 | SDIO_MASTER_ACCESS_LSBYTE, |
59 | data: &byte); |
60 | return status; |
61 | } |
62 | |
63 | static void rsi_rx_handler(struct rsi_hw *adapter); |
64 | |
65 | void rsi_sdio_rx_thread(struct rsi_common *common) |
66 | { |
67 | struct rsi_hw *adapter = common->priv; |
68 | struct rsi_91x_sdiodev *sdev = adapter->rsi_dev; |
69 | |
70 | do { |
71 | rsi_wait_event(event: &sdev->rx_thread.event, EVENT_WAIT_FOREVER); |
72 | rsi_reset_event(event: &sdev->rx_thread.event); |
73 | rsi_rx_handler(adapter); |
74 | } while (!atomic_read(v: &sdev->rx_thread.thread_done)); |
75 | |
76 | rsi_dbg(INFO_ZONE, fmt: "%s: Terminated SDIO RX thread\n" , __func__); |
77 | atomic_inc(v: &sdev->rx_thread.thread_done); |
78 | kthread_complete_and_exit(&sdev->rx_thread.completion, 0); |
79 | } |
80 | |
81 | /** |
82 | * rsi_process_pkt() - This Function reads rx_blocks register and figures out |
83 | * the size of the rx pkt. |
84 | * @common: Pointer to the driver private structure. |
85 | * |
86 | * Return: 0 on success, -1 on failure. |
87 | */ |
88 | static int rsi_process_pkt(struct rsi_common *common) |
89 | { |
90 | struct rsi_hw *adapter = common->priv; |
91 | struct rsi_91x_sdiodev *dev = adapter->rsi_dev; |
92 | u8 num_blks = 0; |
93 | u32 rcv_pkt_len = 0; |
94 | int status = 0; |
95 | u8 value = 0; |
96 | |
97 | num_blks = ((adapter->interrupt_status & 1) | |
98 | ((adapter->interrupt_status >> RECV_NUM_BLOCKS) << 1)); |
99 | |
100 | if (!num_blks) { |
101 | status = rsi_sdio_read_register(adapter, |
102 | SDIO_RX_NUM_BLOCKS_REG, |
103 | data: &value); |
104 | if (status) { |
105 | rsi_dbg(ERR_ZONE, |
106 | fmt: "%s: Failed to read pkt length from the card:\n" , |
107 | __func__); |
108 | return status; |
109 | } |
110 | num_blks = value & 0x1f; |
111 | } |
112 | |
113 | if (dev->write_fail == 2) |
114 | rsi_sdio_ack_intr(adapter: common->priv, int_bit: (1 << MSDU_PKT_PENDING)); |
115 | |
116 | if (unlikely(!num_blks)) { |
117 | dev->write_fail = 2; |
118 | return -1; |
119 | } |
120 | |
121 | rcv_pkt_len = (num_blks * 256); |
122 | |
123 | status = rsi_sdio_host_intf_read_pkt(adapter, pkt: dev->pktbuffer, |
124 | length: rcv_pkt_len); |
125 | if (status) { |
126 | rsi_dbg(ERR_ZONE, fmt: "%s: Failed to read packet from card\n" , |
127 | __func__); |
128 | return status; |
129 | } |
130 | |
131 | status = rsi_read_pkt(common, rx_pkt: dev->pktbuffer, rcv_pkt_len); |
132 | if (status) { |
133 | rsi_dbg(ERR_ZONE, fmt: "Failed to read the packet\n" ); |
134 | return status; |
135 | } |
136 | |
137 | return 0; |
138 | } |
139 | |
140 | /** |
141 | * rsi_init_sdio_slave_regs() - This function does the actual initialization |
142 | * of SDBUS slave registers. |
143 | * @adapter: Pointer to the adapter structure. |
144 | * |
145 | * Return: status: 0 on success, -1 on failure. |
146 | */ |
147 | int rsi_init_sdio_slave_regs(struct rsi_hw *adapter) |
148 | { |
149 | struct rsi_91x_sdiodev *dev = adapter->rsi_dev; |
150 | u8 function = 0; |
151 | u8 byte; |
152 | int status = 0; |
153 | |
154 | if (dev->next_read_delay) { |
155 | byte = dev->next_read_delay; |
156 | status = rsi_sdio_write_register(adapter, |
157 | function, |
158 | SDIO_NXT_RD_DELAY2, |
159 | data: &byte); |
160 | if (status) { |
161 | rsi_dbg(ERR_ZONE, |
162 | fmt: "%s: Failed to write SDIO_NXT_RD_DELAY2\n" , |
163 | __func__); |
164 | return -1; |
165 | } |
166 | } |
167 | |
168 | if (dev->sdio_high_speed_enable) { |
169 | rsi_dbg(INIT_ZONE, fmt: "%s: Enabling SDIO High speed\n" , __func__); |
170 | byte = 0x3; |
171 | |
172 | status = rsi_sdio_write_register(adapter, |
173 | function, |
174 | SDIO_REG_HIGH_SPEED, |
175 | data: &byte); |
176 | if (status) { |
177 | rsi_dbg(ERR_ZONE, |
178 | fmt: "%s: Failed to enable SDIO high speed\n" , |
179 | __func__); |
180 | return -1; |
181 | } |
182 | } |
183 | |
184 | /* This tells SDIO FIFO when to start read to host */ |
185 | rsi_dbg(INIT_ZONE, fmt: "%s: Initializing SDIO read start level\n" , __func__); |
186 | byte = 0x24; |
187 | |
188 | status = rsi_sdio_write_register(adapter, |
189 | function, |
190 | SDIO_READ_START_LVL, |
191 | data: &byte); |
192 | if (status) { |
193 | rsi_dbg(ERR_ZONE, |
194 | fmt: "%s: Failed to write SDIO_READ_START_LVL\n" , __func__); |
195 | return -1; |
196 | } |
197 | |
198 | rsi_dbg(INIT_ZONE, fmt: "%s: Initializing FIFO ctrl registers\n" , __func__); |
199 | byte = (128 - 32); |
200 | |
201 | status = rsi_sdio_write_register(adapter, |
202 | function, |
203 | SDIO_READ_FIFO_CTL, |
204 | data: &byte); |
205 | if (status) { |
206 | rsi_dbg(ERR_ZONE, |
207 | fmt: "%s: Failed to write SDIO_READ_FIFO_CTL\n" , __func__); |
208 | return -1; |
209 | } |
210 | |
211 | byte = 32; |
212 | status = rsi_sdio_write_register(adapter, |
213 | function, |
214 | SDIO_WRITE_FIFO_CTL, |
215 | data: &byte); |
216 | if (status) { |
217 | rsi_dbg(ERR_ZONE, |
218 | fmt: "%s: Failed to write SDIO_WRITE_FIFO_CTL\n" , __func__); |
219 | return -1; |
220 | } |
221 | |
222 | return 0; |
223 | } |
224 | |
225 | /** |
226 | * rsi_rx_handler() - Read and process SDIO interrupts. |
227 | * @adapter: Pointer to the adapter structure. |
228 | * |
229 | * Return: None. |
230 | */ |
231 | static void rsi_rx_handler(struct rsi_hw *adapter) |
232 | { |
233 | struct rsi_common *common = adapter->priv; |
234 | struct rsi_91x_sdiodev *dev = adapter->rsi_dev; |
235 | int status; |
236 | u8 isr_status = 0; |
237 | u8 fw_status = 0; |
238 | |
239 | dev->rx_info.sdio_int_counter++; |
240 | |
241 | do { |
242 | mutex_lock(&common->rx_lock); |
243 | status = rsi_sdio_read_register(adapter: common->priv, |
244 | RSI_FN1_INT_REGISTER, |
245 | data: &isr_status); |
246 | if (status) { |
247 | rsi_dbg(ERR_ZONE, |
248 | fmt: "%s: Failed to Read Intr Status Register\n" , |
249 | __func__); |
250 | mutex_unlock(lock: &common->rx_lock); |
251 | return; |
252 | } |
253 | adapter->interrupt_status = isr_status; |
254 | |
255 | if (isr_status == 0) { |
256 | rsi_set_event(event: &common->tx_thread.event); |
257 | dev->rx_info.sdio_intr_status_zero++; |
258 | mutex_unlock(lock: &common->rx_lock); |
259 | return; |
260 | } |
261 | |
262 | rsi_dbg(ISR_ZONE, fmt: "%s: Intr_status = %x %d %d\n" , |
263 | __func__, isr_status, (1 << MSDU_PKT_PENDING), |
264 | (1 << FW_ASSERT_IND)); |
265 | |
266 | if (isr_status & BIT(PKT_BUFF_AVAILABLE)) { |
267 | status = rsi_sdio_check_buffer_status(adapter, q_num: 0); |
268 | if (status < 0) |
269 | rsi_dbg(ERR_ZONE, |
270 | fmt: "%s: Failed to check buffer status\n" , |
271 | __func__); |
272 | rsi_sdio_ack_intr(adapter: common->priv, |
273 | BIT(PKT_BUFF_AVAILABLE)); |
274 | rsi_set_event(event: &common->tx_thread.event); |
275 | |
276 | rsi_dbg(ISR_ZONE, fmt: "%s: ==> BUFFER_AVAILABLE <==\n" , |
277 | __func__); |
278 | dev->buff_status_updated = true; |
279 | |
280 | isr_status &= ~BIT(PKT_BUFF_AVAILABLE); |
281 | } |
282 | |
283 | if (isr_status & BIT(FW_ASSERT_IND)) { |
284 | rsi_dbg(ERR_ZONE, fmt: "%s: ==> FIRMWARE Assert <==\n" , |
285 | __func__); |
286 | status = rsi_sdio_read_register(adapter: common->priv, |
287 | SDIO_FW_STATUS_REG, |
288 | data: &fw_status); |
289 | if (status) { |
290 | rsi_dbg(ERR_ZONE, |
291 | fmt: "%s: Failed to read f/w reg\n" , |
292 | __func__); |
293 | } else { |
294 | rsi_dbg(ERR_ZONE, |
295 | fmt: "%s: Firmware Status is 0x%x\n" , |
296 | __func__, fw_status); |
297 | rsi_sdio_ack_intr(adapter: common->priv, |
298 | BIT(FW_ASSERT_IND)); |
299 | } |
300 | |
301 | common->fsm_state = FSM_CARD_NOT_READY; |
302 | |
303 | isr_status &= ~BIT(FW_ASSERT_IND); |
304 | } |
305 | |
306 | if (isr_status & BIT(MSDU_PKT_PENDING)) { |
307 | rsi_dbg(ISR_ZONE, fmt: "Pkt pending interrupt\n" ); |
308 | dev->rx_info.total_sdio_msdu_pending_intr++; |
309 | |
310 | status = rsi_process_pkt(common); |
311 | if (status) { |
312 | rsi_dbg(ERR_ZONE, fmt: "%s: Failed to read pkt\n" , |
313 | __func__); |
314 | mutex_unlock(lock: &common->rx_lock); |
315 | return; |
316 | } |
317 | |
318 | isr_status &= ~BIT(MSDU_PKT_PENDING); |
319 | } |
320 | |
321 | if (isr_status) { |
322 | rsi_sdio_ack_intr(adapter: common->priv, int_bit: isr_status); |
323 | dev->rx_info.total_sdio_unknown_intr++; |
324 | isr_status = 0; |
325 | rsi_dbg(ISR_ZONE, fmt: "Unknown Interrupt %x\n" , |
326 | isr_status); |
327 | } |
328 | |
329 | mutex_unlock(lock: &common->rx_lock); |
330 | } while (1); |
331 | } |
332 | |
333 | /* This function is used to read buffer status register and |
334 | * set relevant fields in rsi_91x_sdiodev struct. |
335 | */ |
336 | int rsi_sdio_check_buffer_status(struct rsi_hw *adapter, u8 q_num) |
337 | { |
338 | struct rsi_common *common = adapter->priv; |
339 | struct rsi_91x_sdiodev *dev = adapter->rsi_dev; |
340 | u8 buf_status = 0; |
341 | int status = 0; |
342 | static int counter = 4; |
343 | |
344 | if (!dev->buff_status_updated && counter) { |
345 | counter--; |
346 | goto out; |
347 | } |
348 | |
349 | dev->buff_status_updated = false; |
350 | status = rsi_sdio_read_register(adapter: common->priv, |
351 | RSI_DEVICE_BUFFER_STATUS_REGISTER, |
352 | data: &buf_status); |
353 | |
354 | if (status) { |
355 | rsi_dbg(ERR_ZONE, |
356 | fmt: "%s: Failed to read status register\n" , __func__); |
357 | return -1; |
358 | } |
359 | |
360 | if (buf_status & (BIT(PKT_MGMT_BUFF_FULL))) { |
361 | if (!dev->rx_info.mgmt_buffer_full) |
362 | dev->rx_info.mgmt_buf_full_counter++; |
363 | dev->rx_info.mgmt_buffer_full = true; |
364 | } else { |
365 | dev->rx_info.mgmt_buffer_full = false; |
366 | } |
367 | |
368 | if (buf_status & (BIT(PKT_BUFF_FULL))) { |
369 | if (!dev->rx_info.buffer_full) |
370 | dev->rx_info.buf_full_counter++; |
371 | dev->rx_info.buffer_full = true; |
372 | } else { |
373 | dev->rx_info.buffer_full = false; |
374 | } |
375 | |
376 | if (buf_status & (BIT(PKT_BUFF_SEMI_FULL))) { |
377 | if (!dev->rx_info.semi_buffer_full) |
378 | dev->rx_info.buf_semi_full_counter++; |
379 | dev->rx_info.semi_buffer_full = true; |
380 | } else { |
381 | dev->rx_info.semi_buffer_full = false; |
382 | } |
383 | |
384 | if (dev->rx_info.mgmt_buffer_full || dev->rx_info.buf_full_counter) |
385 | counter = 1; |
386 | else |
387 | counter = 4; |
388 | |
389 | out: |
390 | if ((q_num == MGMT_SOFT_Q) && (dev->rx_info.mgmt_buffer_full)) |
391 | return QUEUE_FULL; |
392 | |
393 | if ((q_num < MGMT_SOFT_Q) && (dev->rx_info.buffer_full)) |
394 | return QUEUE_FULL; |
395 | |
396 | return QUEUE_NOT_FULL; |
397 | } |
398 | |
399 | /** |
400 | * rsi_sdio_determine_event_timeout() - This Function determines the event |
401 | * timeout duration. |
402 | * @adapter: Pointer to the adapter structure. |
403 | * |
404 | * Return: timeout duration is returned. |
405 | */ |
406 | int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter) |
407 | { |
408 | struct rsi_91x_sdiodev *dev = adapter->rsi_dev; |
409 | |
410 | /* Once buffer full is seen, event timeout to occur every 2 msecs */ |
411 | if (dev->rx_info.buffer_full) |
412 | return 2; |
413 | |
414 | return EVENT_WAIT_FOREVER; |
415 | } |
416 | |