| 1 | // SPDX-License-Identifier: GPL-2.0-only |
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| 2 | // Copyright (C) 2016 Broadcom |
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| 3 | |
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| 4 | #include <linux/device.h> |
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| 5 | #include <linux/module.h> |
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| 6 | #include <linux/of_mdio.h> |
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| 7 | #include <linux/mdio.h> |
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| 8 | #include <linux/phy.h> |
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| 9 | #include <linux/phy/phy.h> |
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| 10 | |
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| 11 | #define BLK_ADDR_REG_OFFSET 0x1f |
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| 12 | #define PLL_AFE1_100MHZ_BLK 0x2100 |
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| 13 | #define PLL_CLK_AMP_OFFSET 0x03 |
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| 14 | #define PLL_CLK_AMP_2P05V 0x2b18 |
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| 15 | |
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| 16 | static int ns2_pci_phy_init(struct phy *p) |
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| 17 | { |
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| 18 | struct mdio_device *mdiodev = phy_get_drvdata(phy: p); |
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| 19 | int rc; |
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| 20 | |
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| 21 | /* select the AFE 100MHz block page */ |
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| 22 | rc = mdiodev_write(mdiodev, BLK_ADDR_REG_OFFSET, PLL_AFE1_100MHZ_BLK); |
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| 23 | if (rc) |
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| 24 | goto err; |
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| 25 | |
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| 26 | /* set the 100 MHz reference clock amplitude to 2.05 v */ |
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| 27 | rc = mdiodev_write(mdiodev, PLL_CLK_AMP_OFFSET, PLL_CLK_AMP_2P05V); |
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| 28 | if (rc) |
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| 29 | goto err; |
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| 30 | |
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| 31 | return 0; |
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| 32 | |
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| 33 | err: |
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| 34 | dev_err(&mdiodev->dev, "Error %d writing to phy\n" , rc); |
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| 35 | return rc; |
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| 36 | } |
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| 37 | |
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| 38 | static const struct phy_ops ns2_pci_phy_ops = { |
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| 39 | .init = ns2_pci_phy_init, |
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| 40 | .owner = THIS_MODULE, |
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| 41 | }; |
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| 42 | |
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| 43 | static int ns2_pci_phy_probe(struct mdio_device *mdiodev) |
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| 44 | { |
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| 45 | struct device *dev = &mdiodev->dev; |
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| 46 | struct phy_provider *provider; |
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| 47 | struct phy *phy; |
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| 48 | |
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| 49 | phy = devm_phy_create(dev, node: dev->of_node, ops: &ns2_pci_phy_ops); |
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| 50 | if (IS_ERR(ptr: phy)) { |
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| 51 | dev_err(dev, "failed to create Phy\n" ); |
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| 52 | return PTR_ERR(ptr: phy); |
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| 53 | } |
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| 54 | |
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| 55 | phy_set_drvdata(phy, data: mdiodev); |
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| 56 | |
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| 57 | provider = devm_of_phy_provider_register(&phy->dev, |
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| 58 | of_phy_simple_xlate); |
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| 59 | if (IS_ERR(ptr: provider)) { |
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| 60 | dev_err(dev, "failed to register Phy provider\n" ); |
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| 61 | return PTR_ERR(ptr: provider); |
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| 62 | } |
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| 63 | |
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| 64 | dev_info(dev, "%s PHY registered\n" , dev_name(dev)); |
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| 65 | |
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| 66 | return 0; |
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| 67 | } |
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| 68 | |
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| 69 | static const struct of_device_id ns2_pci_phy_of_match[] = { |
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| 70 | { .compatible = "brcm,ns2-pcie-phy" , }, |
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| 71 | { /* sentinel */ }, |
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| 72 | }; |
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| 73 | MODULE_DEVICE_TABLE(of, ns2_pci_phy_of_match); |
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| 74 | |
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| 75 | static struct mdio_driver ns2_pci_phy_driver = { |
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| 76 | .mdiodrv = { |
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| 77 | .driver = { |
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| 78 | .name = "phy-bcm-ns2-pci" , |
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| 79 | .of_match_table = ns2_pci_phy_of_match, |
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| 80 | }, |
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| 81 | }, |
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| 82 | .probe = ns2_pci_phy_probe, |
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| 83 | }; |
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| 84 | mdio_module_driver(ns2_pci_phy_driver); |
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| 85 | |
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| 86 | MODULE_AUTHOR("Broadcom" ); |
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| 87 | MODULE_DESCRIPTION("Broadcom Northstar2 PCI Phy driver" ); |
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| 88 | MODULE_LICENSE("GPL v2" ); |
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| 89 | MODULE_ALIAS("platform:phy-bcm-ns2-pci" ); |
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| 90 | |
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