1 | // SPDX-License-Identifier: GPL-2.0 |
2 | #include <linux/kernel.h> |
3 | #include <linux/types.h> |
4 | |
5 | #include <linux/pinctrl/pinctrl.h> |
6 | #include <linux/gpio/driver.h> |
7 | |
8 | #include <linux/gpio/gpio-nomadik.h> |
9 | |
10 | /* All the pins that can be used for GPIO and some other functions */ |
11 | #define _GPIO(offset) (offset) |
12 | |
13 | #define DB8500_PIN_AJ5 _GPIO(0) |
14 | #define DB8500_PIN_AJ3 _GPIO(1) |
15 | #define DB8500_PIN_AH4 _GPIO(2) |
16 | #define DB8500_PIN_AH3 _GPIO(3) |
17 | #define DB8500_PIN_AH6 _GPIO(4) |
18 | #define DB8500_PIN_AG6 _GPIO(5) |
19 | #define DB8500_PIN_AF6 _GPIO(6) |
20 | #define DB8500_PIN_AG5 _GPIO(7) |
21 | #define DB8500_PIN_AD5 _GPIO(8) |
22 | #define DB8500_PIN_AE4 _GPIO(9) |
23 | #define DB8500_PIN_AF5 _GPIO(10) |
24 | #define DB8500_PIN_AG4 _GPIO(11) |
25 | #define DB8500_PIN_AC4 _GPIO(12) |
26 | #define DB8500_PIN_AF3 _GPIO(13) |
27 | #define DB8500_PIN_AE3 _GPIO(14) |
28 | #define DB8500_PIN_AC3 _GPIO(15) |
29 | #define DB8500_PIN_AD3 _GPIO(16) |
30 | #define DB8500_PIN_AD4 _GPIO(17) |
31 | #define DB8500_PIN_AC2 _GPIO(18) |
32 | #define DB8500_PIN_AC1 _GPIO(19) |
33 | #define DB8500_PIN_AB4 _GPIO(20) |
34 | #define DB8500_PIN_AB3 _GPIO(21) |
35 | #define DB8500_PIN_AA3 _GPIO(22) |
36 | #define DB8500_PIN_AA4 _GPIO(23) |
37 | #define DB8500_PIN_AB2 _GPIO(24) |
38 | #define DB8500_PIN_Y4 _GPIO(25) |
39 | #define DB8500_PIN_Y2 _GPIO(26) |
40 | #define DB8500_PIN_AA2 _GPIO(27) |
41 | #define DB8500_PIN_AA1 _GPIO(28) |
42 | #define DB8500_PIN_W2 _GPIO(29) |
43 | #define DB8500_PIN_W3 _GPIO(30) |
44 | #define DB8500_PIN_V3 _GPIO(31) |
45 | #define DB8500_PIN_V2 _GPIO(32) |
46 | #define DB8500_PIN_AF2 _GPIO(33) |
47 | #define DB8500_PIN_AE1 _GPIO(34) |
48 | #define DB8500_PIN_AE2 _GPIO(35) |
49 | #define DB8500_PIN_AG2 _GPIO(36) |
50 | /* Hole */ |
51 | #define DB8500_PIN_F3 _GPIO(64) |
52 | #define DB8500_PIN_F1 _GPIO(65) |
53 | #define DB8500_PIN_G3 _GPIO(66) |
54 | #define DB8500_PIN_G2 _GPIO(67) |
55 | #define DB8500_PIN_E1 _GPIO(68) |
56 | #define DB8500_PIN_E2 _GPIO(69) |
57 | #define DB8500_PIN_G5 _GPIO(70) |
58 | #define DB8500_PIN_G4 _GPIO(71) |
59 | #define DB8500_PIN_H4 _GPIO(72) |
60 | #define DB8500_PIN_H3 _GPIO(73) |
61 | #define DB8500_PIN_J3 _GPIO(74) |
62 | #define DB8500_PIN_H2 _GPIO(75) |
63 | #define DB8500_PIN_J2 _GPIO(76) |
64 | #define DB8500_PIN_H1 _GPIO(77) |
65 | #define DB8500_PIN_F4 _GPIO(78) |
66 | #define DB8500_PIN_E3 _GPIO(79) |
67 | #define DB8500_PIN_E4 _GPIO(80) |
68 | #define DB8500_PIN_D2 _GPIO(81) |
69 | #define DB8500_PIN_C1 _GPIO(82) |
70 | #define DB8500_PIN_D3 _GPIO(83) |
71 | #define DB8500_PIN_C2 _GPIO(84) |
72 | #define DB8500_PIN_D5 _GPIO(85) |
73 | #define DB8500_PIN_C6 _GPIO(86) |
74 | #define DB8500_PIN_B3 _GPIO(87) |
75 | #define DB8500_PIN_C4 _GPIO(88) |
76 | #define DB8500_PIN_E6 _GPIO(89) |
77 | #define DB8500_PIN_A3 _GPIO(90) |
78 | #define DB8500_PIN_B6 _GPIO(91) |
79 | #define DB8500_PIN_D6 _GPIO(92) |
80 | #define DB8500_PIN_B7 _GPIO(93) |
81 | #define DB8500_PIN_D7 _GPIO(94) |
82 | #define DB8500_PIN_E8 _GPIO(95) |
83 | #define DB8500_PIN_D8 _GPIO(96) |
84 | #define DB8500_PIN_D9 _GPIO(97) |
85 | /* Hole */ |
86 | #define DB8500_PIN_A5 _GPIO(128) |
87 | #define DB8500_PIN_B4 _GPIO(129) |
88 | #define DB8500_PIN_C8 _GPIO(130) |
89 | #define DB8500_PIN_A12 _GPIO(131) |
90 | #define DB8500_PIN_C10 _GPIO(132) |
91 | #define DB8500_PIN_B10 _GPIO(133) |
92 | #define DB8500_PIN_B9 _GPIO(134) |
93 | #define DB8500_PIN_A9 _GPIO(135) |
94 | #define DB8500_PIN_C7 _GPIO(136) |
95 | #define DB8500_PIN_A7 _GPIO(137) |
96 | #define DB8500_PIN_C5 _GPIO(138) |
97 | #define DB8500_PIN_C9 _GPIO(139) |
98 | #define DB8500_PIN_B11 _GPIO(140) |
99 | #define DB8500_PIN_C12 _GPIO(141) |
100 | #define DB8500_PIN_C11 _GPIO(142) |
101 | #define DB8500_PIN_D12 _GPIO(143) |
102 | #define DB8500_PIN_B13 _GPIO(144) |
103 | #define DB8500_PIN_C13 _GPIO(145) |
104 | #define DB8500_PIN_D13 _GPIO(146) |
105 | #define DB8500_PIN_C15 _GPIO(147) |
106 | #define DB8500_PIN_B16 _GPIO(148) |
107 | #define DB8500_PIN_B14 _GPIO(149) |
108 | #define DB8500_PIN_C14 _GPIO(150) |
109 | #define DB8500_PIN_D17 _GPIO(151) |
110 | #define DB8500_PIN_D16 _GPIO(152) |
111 | #define DB8500_PIN_B17 _GPIO(153) |
112 | #define DB8500_PIN_C16 _GPIO(154) |
113 | #define DB8500_PIN_C19 _GPIO(155) |
114 | #define DB8500_PIN_C17 _GPIO(156) |
115 | #define DB8500_PIN_A18 _GPIO(157) |
116 | #define DB8500_PIN_C18 _GPIO(158) |
117 | #define DB8500_PIN_B19 _GPIO(159) |
118 | #define DB8500_PIN_B20 _GPIO(160) |
119 | #define DB8500_PIN_D21 _GPIO(161) |
120 | #define DB8500_PIN_D20 _GPIO(162) |
121 | #define DB8500_PIN_C20 _GPIO(163) |
122 | #define DB8500_PIN_B21 _GPIO(164) |
123 | #define DB8500_PIN_C21 _GPIO(165) |
124 | #define DB8500_PIN_A22 _GPIO(166) |
125 | #define DB8500_PIN_B24 _GPIO(167) |
126 | #define DB8500_PIN_C22 _GPIO(168) |
127 | #define DB8500_PIN_D22 _GPIO(169) |
128 | #define DB8500_PIN_C23 _GPIO(170) |
129 | #define DB8500_PIN_D23 _GPIO(171) |
130 | /* Hole */ |
131 | #define DB8500_PIN_AJ27 _GPIO(192) |
132 | #define DB8500_PIN_AH27 _GPIO(193) |
133 | #define DB8500_PIN_AF27 _GPIO(194) |
134 | #define DB8500_PIN_AG28 _GPIO(195) |
135 | #define DB8500_PIN_AG26 _GPIO(196) |
136 | #define DB8500_PIN_AH24 _GPIO(197) |
137 | #define DB8500_PIN_AG25 _GPIO(198) |
138 | #define DB8500_PIN_AH23 _GPIO(199) |
139 | #define DB8500_PIN_AH26 _GPIO(200) |
140 | #define DB8500_PIN_AF24 _GPIO(201) |
141 | #define DB8500_PIN_AF25 _GPIO(202) |
142 | #define DB8500_PIN_AE23 _GPIO(203) |
143 | #define DB8500_PIN_AF23 _GPIO(204) |
144 | #define DB8500_PIN_AG23 _GPIO(205) |
145 | #define DB8500_PIN_AG24 _GPIO(206) |
146 | #define DB8500_PIN_AJ23 _GPIO(207) |
147 | #define DB8500_PIN_AH16 _GPIO(208) |
148 | #define DB8500_PIN_AG15 _GPIO(209) |
149 | #define DB8500_PIN_AJ15 _GPIO(210) |
150 | #define DB8500_PIN_AG14 _GPIO(211) |
151 | #define DB8500_PIN_AF13 _GPIO(212) |
152 | #define DB8500_PIN_AG13 _GPIO(213) |
153 | #define DB8500_PIN_AH15 _GPIO(214) |
154 | #define DB8500_PIN_AH13 _GPIO(215) |
155 | #define DB8500_PIN_AG12 _GPIO(216) |
156 | #define DB8500_PIN_AH12 _GPIO(217) |
157 | #define DB8500_PIN_AH11 _GPIO(218) |
158 | #define DB8500_PIN_AG10 _GPIO(219) |
159 | #define DB8500_PIN_AH10 _GPIO(220) |
160 | #define DB8500_PIN_AJ11 _GPIO(221) |
161 | #define DB8500_PIN_AJ9 _GPIO(222) |
162 | #define DB8500_PIN_AH9 _GPIO(223) |
163 | #define DB8500_PIN_AG9 _GPIO(224) |
164 | #define DB8500_PIN_AG8 _GPIO(225) |
165 | #define DB8500_PIN_AF8 _GPIO(226) |
166 | #define DB8500_PIN_AH7 _GPIO(227) |
167 | #define DB8500_PIN_AJ6 _GPIO(228) |
168 | #define DB8500_PIN_AG7 _GPIO(229) |
169 | #define DB8500_PIN_AF7 _GPIO(230) |
170 | /* Hole */ |
171 | #define DB8500_PIN_AF28 _GPIO(256) |
172 | #define DB8500_PIN_AE29 _GPIO(257) |
173 | #define DB8500_PIN_AD29 _GPIO(258) |
174 | #define DB8500_PIN_AC29 _GPIO(259) |
175 | #define DB8500_PIN_AD28 _GPIO(260) |
176 | #define DB8500_PIN_AD26 _GPIO(261) |
177 | #define DB8500_PIN_AE26 _GPIO(262) |
178 | #define DB8500_PIN_AG29 _GPIO(263) |
179 | #define DB8500_PIN_AE27 _GPIO(264) |
180 | #define DB8500_PIN_AD27 _GPIO(265) |
181 | #define DB8500_PIN_AC28 _GPIO(266) |
182 | #define DB8500_PIN_AC27 _GPIO(267) |
183 | |
184 | /* |
185 | * The names of the pins are denoted by GPIO number and ball name, even |
186 | * though they can be used for other things than GPIO, this is the first |
187 | * column in the table of the data sheet and often used on schematics and |
188 | * such. |
189 | */ |
190 | static const struct pinctrl_pin_desc nmk_db8500_pins[] = { |
191 | PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5" ), |
192 | PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3" ), |
193 | PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4" ), |
194 | PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3" ), |
195 | PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6" ), |
196 | PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6" ), |
197 | PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6" ), |
198 | PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5" ), |
199 | PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5" ), |
200 | PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4" ), |
201 | PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5" ), |
202 | PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4" ), |
203 | PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4" ), |
204 | PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3" ), |
205 | PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3" ), |
206 | PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3" ), |
207 | PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3" ), |
208 | PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4" ), |
209 | PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2" ), |
210 | PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1" ), |
211 | PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4" ), |
212 | PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3" ), |
213 | PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3" ), |
214 | PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4" ), |
215 | PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2" ), |
216 | PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4" ), |
217 | PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2" ), |
218 | PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2" ), |
219 | PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1" ), |
220 | PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2" ), |
221 | PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3" ), |
222 | PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3" ), |
223 | PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2" ), |
224 | PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2" ), |
225 | PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1" ), |
226 | PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2" ), |
227 | PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2" ), |
228 | /* Hole */ |
229 | PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3" ), |
230 | PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1" ), |
231 | PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3" ), |
232 | PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2" ), |
233 | PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1" ), |
234 | PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2" ), |
235 | PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5" ), |
236 | PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4" ), |
237 | PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4" ), |
238 | PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3" ), |
239 | PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3" ), |
240 | PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2" ), |
241 | PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2" ), |
242 | PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1" ), |
243 | PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4" ), |
244 | PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3" ), |
245 | PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4" ), |
246 | PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2" ), |
247 | PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1" ), |
248 | PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3" ), |
249 | PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2" ), |
250 | PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5" ), |
251 | PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6" ), |
252 | PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3" ), |
253 | PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4" ), |
254 | PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6" ), |
255 | PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3" ), |
256 | PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6" ), |
257 | PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6" ), |
258 | PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7" ), |
259 | PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7" ), |
260 | PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8" ), |
261 | PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8" ), |
262 | PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9" ), |
263 | /* Hole */ |
264 | PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5" ), |
265 | PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4" ), |
266 | PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8" ), |
267 | PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12" ), |
268 | PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10" ), |
269 | PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10" ), |
270 | PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9" ), |
271 | PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9" ), |
272 | PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7" ), |
273 | PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7" ), |
274 | PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5" ), |
275 | PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9" ), |
276 | PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11" ), |
277 | PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12" ), |
278 | PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11" ), |
279 | PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12" ), |
280 | PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13" ), |
281 | PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13" ), |
282 | PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13" ), |
283 | PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15" ), |
284 | PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16" ), |
285 | PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14" ), |
286 | PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14" ), |
287 | PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17" ), |
288 | PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16" ), |
289 | PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17" ), |
290 | PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16" ), |
291 | PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19" ), |
292 | PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17" ), |
293 | PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18" ), |
294 | PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18" ), |
295 | PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19" ), |
296 | PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20" ), |
297 | PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21" ), |
298 | PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20" ), |
299 | PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20" ), |
300 | PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21" ), |
301 | PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21" ), |
302 | PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22" ), |
303 | PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24" ), |
304 | PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22" ), |
305 | PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22" ), |
306 | PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23" ), |
307 | PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23" ), |
308 | /* Hole */ |
309 | PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27" ), |
310 | PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27" ), |
311 | PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27" ), |
312 | PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28" ), |
313 | PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26" ), |
314 | PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24" ), |
315 | PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25" ), |
316 | PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23" ), |
317 | PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26" ), |
318 | PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24" ), |
319 | PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25" ), |
320 | PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23" ), |
321 | PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23" ), |
322 | PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23" ), |
323 | PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24" ), |
324 | PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23" ), |
325 | PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16" ), |
326 | PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15" ), |
327 | PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15" ), |
328 | PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14" ), |
329 | PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13" ), |
330 | PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13" ), |
331 | PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15" ), |
332 | PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13" ), |
333 | PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12" ), |
334 | PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12" ), |
335 | PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11" ), |
336 | PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10" ), |
337 | PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10" ), |
338 | PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11" ), |
339 | PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9" ), |
340 | PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9" ), |
341 | PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9" ), |
342 | PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8" ), |
343 | PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8" ), |
344 | PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7" ), |
345 | PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6" ), |
346 | PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7" ), |
347 | PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7" ), |
348 | /* Hole */ |
349 | PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28" ), |
350 | PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29" ), |
351 | PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29" ), |
352 | PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29" ), |
353 | PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28" ), |
354 | PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26" ), |
355 | PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26" ), |
356 | PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29" ), |
357 | PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27" ), |
358 | PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27" ), |
359 | PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28" ), |
360 | PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27" ), |
361 | }; |
362 | |
363 | /* |
364 | * Read the pin group names like this: |
365 | * u0_a_1 = first groups of pins for uart0 on alt function a |
366 | * i2c2_b_2 = second group of pins for i2c2 on alt function b |
367 | * |
368 | * The groups are arranged as sets per altfunction column, so we can |
369 | * mux in one group at a time by selecting the same altfunction for them |
370 | * all. When functions require pins on different altfunctions, you need |
371 | * to combine several groups. |
372 | */ |
373 | |
374 | /* Altfunction A column */ |
375 | static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3, |
376 | DB8500_PIN_AH4, DB8500_PIN_AH3 }; |
377 | static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 }; |
378 | static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 }; |
379 | /* Image processor I2C line, this is driven by image processor firmware */ |
380 | static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 }; |
381 | static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 }; |
382 | /* MSP0 can only be on these pins, but TXD and RXD can be flipped */ |
383 | static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 }; |
384 | static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 }; |
385 | static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 }; |
386 | /* Basic pins of the MMC/SD card 0 interface */ |
387 | static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, /* MC0_CMDDIR */ |
388 | DB8500_PIN_AC1, /* MC0_DAT0DIR */ |
389 | DB8500_PIN_AB4, /* MC0_DAT2DIR */ |
390 | DB8500_PIN_AA3, /* MC0_FBCLK */ |
391 | DB8500_PIN_AA4, /* MC0_CLK */ |
392 | DB8500_PIN_AB2, /* MC0_CMD */ |
393 | DB8500_PIN_Y4, /* MC0_DAT0 */ |
394 | DB8500_PIN_Y2, /* MC0_DAT1 */ |
395 | DB8500_PIN_AA2, /* MC0_DAT2 */ |
396 | DB8500_PIN_AA1 /* MC0_DAT3 */ |
397 | }; |
398 | /* MMC/SD card 0 interface without CMD/DAT0/DAT2 direction control */ |
399 | static const unsigned mc0_a_2_pins[] = { DB8500_PIN_AA3, /* MC0_FBCLK */ |
400 | DB8500_PIN_AA4, /* MC0_CLK */ |
401 | DB8500_PIN_AB2, /* MC0_CMD */ |
402 | DB8500_PIN_Y4, /* MC0_DAT0 */ |
403 | DB8500_PIN_Y2, /* MC0_DAT1 */ |
404 | DB8500_PIN_AA2, /* MC0_DAT2 */ |
405 | DB8500_PIN_AA1 /* MC0_DAT3 */ |
406 | }; |
407 | /* Often only 4 bits are used, then these are not needed (only used for MMC) */ |
408 | static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, /* MC0_DAT4 */ |
409 | DB8500_PIN_W3, /* MC0_DAT5 */ |
410 | DB8500_PIN_V3, /* MC0_DAT6 */ |
411 | DB8500_PIN_V2 /* MC0_DAT7 */ |
412 | }; |
413 | static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 }; /* MC0_DAT31DIR */ |
414 | /* MSP1 can only be on these pins, but TXD and RXD can be flipped */ |
415 | static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 }; |
416 | static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 }; |
417 | /* LCD interface */ |
418 | static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1, |
419 | DB8500_PIN_G3, DB8500_PIN_G2 }; |
420 | static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 }; |
421 | static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 }; |
422 | static const unsigned lcd_d0_d7_a_1_pins[] = { |
423 | DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3, |
424 | DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 }; |
425 | /* D8 thru D11 often used as TVOUT lines */ |
426 | static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4, |
427 | DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 }; |
428 | static const unsigned lcd_d12_d15_a_1_pins[] = { |
429 | DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 }; |
430 | static const unsigned lcd_d12_d23_a_1_pins[] = { |
431 | DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5, |
432 | DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6, |
433 | DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 }; |
434 | static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8, |
435 | DB8500_PIN_D8, DB8500_PIN_D9 }; |
436 | static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 }; |
437 | static const unsigned kp_a_2_pins[] = { |
438 | DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17, |
439 | DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20, |
440 | DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21, |
441 | DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 }; |
442 | /* MC2 has 8 data lines and no direction control, so only for (e)MMC */ |
443 | static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4, |
444 | DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, |
445 | DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, |
446 | DB8500_PIN_C5 }; |
447 | /* MC2 without the feedback clock */ |
448 | static const unsigned mc2_a_2_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4, |
449 | DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9, |
450 | DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5 }; |
451 | static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11, |
452 | DB8500_PIN_C12, DB8500_PIN_C11 }; |
453 | static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13, |
454 | DB8500_PIN_C13, DB8500_PIN_D13 }; |
455 | static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 }; |
456 | /* |
457 | * Image processor GPIO pins are named "ipgpio" and have their own |
458 | * numberspace |
459 | */ |
460 | static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 }; |
461 | static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 }; |
462 | /* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */ |
463 | static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23, |
464 | DB8500_PIN_D23 }; |
465 | /* |
466 | * This MSP cannot switch RX and TX, SCK in a separate group since this |
467 | * seems to be optional. |
468 | */ |
469 | static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 }; |
470 | static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27, |
471 | DB8500_PIN_AG28, DB8500_PIN_AG26 }; |
472 | static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25, |
473 | DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25, |
474 | DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24, |
475 | DB8500_PIN_AJ23 }; |
476 | /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */ |
477 | static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15, |
478 | DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, |
479 | DB8500_PIN_AH15 }; |
480 | static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15, |
481 | DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, DB8500_PIN_AH15 }; |
482 | static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12, |
483 | DB8500_PIN_AH12, DB8500_PIN_AH11 }; |
484 | static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10, |
485 | DB8500_PIN_AJ11 }; |
486 | static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9, |
487 | DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 }; |
488 | static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9, |
489 | DB8500_PIN_AG9, DB8500_PIN_AG8 }; |
490 | static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 }; |
491 | static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 }; |
492 | static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 }; |
493 | static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 }; |
494 | static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29, |
495 | DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26, |
496 | DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27, |
497 | DB8500_PIN_AC28, DB8500_PIN_AC27 }; |
498 | |
499 | /* Altfunction B column */ |
500 | static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 }; |
501 | static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 }; |
502 | static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 }; |
503 | static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 }; |
504 | static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 }; |
505 | static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 }; |
506 | static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 }; |
507 | /* Just RX and TX for UART2 */ |
508 | static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 }; |
509 | static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 }; |
510 | static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 }; |
511 | static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 }; |
512 | static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4, |
513 | DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 }; |
514 | static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 }; |
515 | static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3, |
516 | DB8500_PIN_V3, DB8500_PIN_V2 }; |
517 | static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 }; |
518 | static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1, |
519 | DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2, |
520 | DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3, |
521 | DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1, |
522 | DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2, |
523 | DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 }; |
524 | static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1, |
525 | DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3}; |
526 | static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3, |
527 | DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6, |
528 | DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8, |
529 | DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8, |
530 | DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9, |
531 | DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5, |
532 | DB8500_PIN_C9 }; |
533 | /* This chip select pin can be "ps0" in alt C so have it separately */ |
534 | static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 }; |
535 | /* This chip select pin can be "ps1" in alt C so have it separately */ |
536 | static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 }; |
537 | static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 }; |
538 | static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 }; |
539 | static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 }; |
540 | static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 }; |
541 | static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22, |
542 | DB8500_PIN_C23, DB8500_PIN_D23 }; |
543 | static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16, |
544 | DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17, |
545 | DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20, |
546 | DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21, |
547 | DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 }; |
548 | static const unsigned lcd_d16_d23_b_1_pins[] = { |
549 | DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21, |
550 | DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 }; |
551 | static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 }; |
552 | static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 }; |
553 | static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13, |
554 | DB8500_PIN_AG13, DB8500_PIN_AH15 }; |
555 | static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12, |
556 | DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10, |
557 | DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9, |
558 | DB8500_PIN_AG8 }; |
559 | static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 }; |
560 | static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 }; |
561 | static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 }; |
562 | |
563 | /* Altfunction C column */ |
564 | static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3, |
565 | DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 }; |
566 | static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 }; |
567 | static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 }; |
568 | static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 }; |
569 | static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 }; |
570 | static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 }; |
571 | static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 }; |
572 | /* Optional 4-bit Memory Stick interface */ |
573 | static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1, |
574 | DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2, |
575 | DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 }; |
576 | static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 }; |
577 | static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 }; |
578 | static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 }; |
579 | static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1, |
580 | DB8500_PIN_AE2, DB8500_PIN_AG2 }; |
581 | static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 }; |
582 | static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 }; |
583 | static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 }; |
584 | static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 }; |
585 | static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 }; |
586 | static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4, |
587 | DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 }; |
588 | static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 }; |
589 | static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 }; |
590 | static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 }; |
591 | static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 }; |
592 | static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 }; |
593 | static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3, |
594 | DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6, |
595 | DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8, |
596 | DB8500_PIN_D9 }; |
597 | static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 }; |
598 | static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11, |
599 | DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16, |
600 | DB8500_PIN_C23, DB8500_PIN_D23 }; |
601 | static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 }; |
602 | static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 }; |
603 | static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 }; |
604 | static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17, |
605 | DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 }; |
606 | static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 }; |
607 | static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 }; |
608 | static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21, |
609 | DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 }; |
610 | static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 }; |
611 | static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 }; |
612 | static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 }; |
613 | static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 }; |
614 | static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 }; |
615 | static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9, |
616 | DB8500_PIN_AG9, DB8500_PIN_AG8 }; |
617 | static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 }; |
618 | static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 }; |
619 | |
620 | /* Other C1 column */ |
621 | static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 }; |
622 | static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4, |
623 | DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 }; |
624 | static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 }; |
625 | static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 }; |
626 | static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4, |
627 | DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2, |
628 | DB8500_PIN_J2, DB8500_PIN_H1 }; |
629 | static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3, |
630 | DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6, |
631 | DB8500_PIN_D6, DB8500_PIN_B7 }; |
632 | static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 }; |
633 | static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 }; |
634 | static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 }; |
635 | static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 }; |
636 | static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17, |
637 | DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 }; |
638 | static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20, |
639 | DB8500_PIN_C20, DB8500_PIN_B21, DB8500_PIN_C21, DB8500_PIN_A22, |
640 | DB8500_PIN_B24, DB8500_PIN_C22 }; |
641 | static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 }; |
642 | static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12, |
643 | DB8500_PIN_AH12, DB8500_PIN_AH11 }; |
644 | static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12, |
645 | DB8500_PIN_AH11 }; |
646 | |
647 | /* Other C2 column */ |
648 | static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2, |
649 | DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 }; |
650 | static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4, |
651 | DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2, |
652 | DB8500_PIN_J2, DB8500_PIN_H1 }; |
653 | static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16, |
654 | DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17, |
655 | DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20, |
656 | DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21, |
657 | DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 }; |
658 | |
659 | /* Other C3 column */ |
660 | static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2, |
661 | DB8500_PIN_W3, DB8500_PIN_V3, DB8500_PIN_V2 }; |
662 | static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4, |
663 | DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 }; |
664 | static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 }; |
665 | static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 }; |
666 | static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16, |
667 | DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17, |
668 | DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20, |
669 | DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21, |
670 | DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 }; |
671 | |
672 | /* Other C4 column */ |
673 | static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4, |
674 | DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H1 }; |
675 | static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16, |
676 | DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17, |
677 | DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20, |
678 | DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21, |
679 | DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 }; |
680 | |
681 | static const struct nmk_pingroup nmk_db8500_groups[] = { |
682 | /* Altfunction A column */ |
683 | NMK_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A), |
684 | NMK_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A), |
685 | NMK_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A), |
686 | NMK_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A), |
687 | NMK_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A), |
688 | NMK_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A), |
689 | NMK_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A), |
690 | NMK_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A), |
691 | NMK_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A), |
692 | NMK_PIN_GROUP(mc0_a_2, NMK_GPIO_ALT_A), |
693 | NMK_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A), |
694 | NMK_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A), |
695 | NMK_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A), |
696 | NMK_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A), |
697 | NMK_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A), |
698 | NMK_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A), |
699 | NMK_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A), |
700 | NMK_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A), |
701 | NMK_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A), |
702 | NMK_PIN_GROUP(lcd_d12_d15_a_1, NMK_GPIO_ALT_A), |
703 | NMK_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A), |
704 | NMK_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A), |
705 | NMK_PIN_GROUP(kpskaskb_a_1, NMK_GPIO_ALT_A), |
706 | NMK_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A), |
707 | NMK_PIN_GROUP(mc2_a_2, NMK_GPIO_ALT_A), |
708 | NMK_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A), |
709 | NMK_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A), |
710 | NMK_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A), |
711 | NMK_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A), |
712 | NMK_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A), |
713 | NMK_PIN_GROUP(modem_a_1, NMK_GPIO_ALT_A), |
714 | NMK_PIN_GROUP(kp_a_2, NMK_GPIO_ALT_A), |
715 | NMK_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A), |
716 | NMK_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A), |
717 | NMK_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A), |
718 | NMK_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A), |
719 | NMK_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A), |
720 | NMK_PIN_GROUP(mc1dir_a_1, NMK_GPIO_ALT_A), |
721 | NMK_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A), |
722 | NMK_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A), |
723 | NMK_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A), |
724 | NMK_PIN_GROUP(clkout1_a_1, NMK_GPIO_ALT_A), |
725 | NMK_PIN_GROUP(clkout1_a_2, NMK_GPIO_ALT_A), |
726 | NMK_PIN_GROUP(clkout2_a_1, NMK_GPIO_ALT_A), |
727 | NMK_PIN_GROUP(clkout2_a_2, NMK_GPIO_ALT_A), |
728 | NMK_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A), |
729 | /* Altfunction B column */ |
730 | NMK_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B), |
731 | NMK_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B), |
732 | NMK_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B), |
733 | NMK_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B), |
734 | NMK_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B), |
735 | NMK_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B), |
736 | NMK_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B), |
737 | NMK_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B), |
738 | NMK_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B), |
739 | NMK_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B), |
740 | NMK_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B), |
741 | NMK_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B), |
742 | NMK_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B), |
743 | NMK_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B), |
744 | NMK_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B), |
745 | NMK_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B), |
746 | NMK_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B), |
747 | NMK_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B), |
748 | NMK_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B), |
749 | NMK_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B), |
750 | NMK_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B), |
751 | NMK_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B), |
752 | NMK_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B), |
753 | NMK_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B), |
754 | NMK_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B), |
755 | NMK_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B), |
756 | NMK_PIN_GROUP(lcd_d16_d23_b_1, NMK_GPIO_ALT_B), |
757 | NMK_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B), |
758 | NMK_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B), |
759 | NMK_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B), |
760 | NMK_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B), |
761 | NMK_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B), |
762 | NMK_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B), |
763 | NMK_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B), |
764 | /* Altfunction C column */ |
765 | NMK_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C), |
766 | NMK_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C), |
767 | NMK_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C), |
768 | NMK_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C), |
769 | NMK_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C), |
770 | NMK_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C), |
771 | NMK_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C), |
772 | NMK_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C), |
773 | NMK_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C), |
774 | NMK_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C), |
775 | NMK_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C), |
776 | NMK_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C), |
777 | NMK_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C), |
778 | NMK_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C), |
779 | NMK_PIN_GROUP(ipgpio6_c_2, NMK_GPIO_ALT_C), |
780 | NMK_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C), |
781 | NMK_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C), |
782 | NMK_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C), |
783 | NMK_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C), |
784 | NMK_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C), |
785 | NMK_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C), |
786 | NMK_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C), |
787 | NMK_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C), |
788 | NMK_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C), |
789 | NMK_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C), |
790 | NMK_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C), |
791 | NMK_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C), |
792 | NMK_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C), |
793 | NMK_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C), |
794 | NMK_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C), |
795 | NMK_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C), |
796 | NMK_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C), |
797 | NMK_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C), |
798 | NMK_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C), |
799 | NMK_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C), |
800 | NMK_PIN_GROUP(clkout1_c_1, NMK_GPIO_ALT_C), |
801 | NMK_PIN_GROUP(clkout2_c_1, NMK_GPIO_ALT_C), |
802 | NMK_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C), |
803 | NMK_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C), |
804 | NMK_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C), |
805 | NMK_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C), |
806 | /* Other alt C1 column */ |
807 | NMK_PIN_GROUP(u2rx_oc1_1, NMK_GPIO_ALT_C1), |
808 | NMK_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C1), |
809 | NMK_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C1), |
810 | NMK_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C1), |
811 | NMK_PIN_GROUP(ptma9_oc1_1, NMK_GPIO_ALT_C1), |
812 | NMK_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1), |
813 | NMK_PIN_GROUP(rf_oc1_1, NMK_GPIO_ALT_C1), |
814 | NMK_PIN_GROUP(hxclk_oc1_1, NMK_GPIO_ALT_C1), |
815 | NMK_PIN_GROUP(uartmodrx_oc1_1, NMK_GPIO_ALT_C1), |
816 | NMK_PIN_GROUP(uartmodtx_oc1_1, NMK_GPIO_ALT_C1), |
817 | NMK_PIN_GROUP(stmmod_oc1_1, NMK_GPIO_ALT_C1), |
818 | NMK_PIN_GROUP(hxgpio_oc1_1, NMK_GPIO_ALT_C1), |
819 | NMK_PIN_GROUP(rf_oc1_2, NMK_GPIO_ALT_C1), |
820 | NMK_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1), |
821 | NMK_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1), |
822 | /* Other alt C2 column */ |
823 | NMK_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C2), |
824 | NMK_PIN_GROUP(etmr4_oc2_1, NMK_GPIO_ALT_C2), |
825 | NMK_PIN_GROUP(ptma9_oc2_1, NMK_GPIO_ALT_C2), |
826 | /* Other alt C3 column */ |
827 | NMK_PIN_GROUP(stmmod_oc3_1, NMK_GPIO_ALT_C3), |
828 | NMK_PIN_GROUP(stmmod_oc3_2, NMK_GPIO_ALT_C3), |
829 | NMK_PIN_GROUP(uartmodrx_oc3_1, NMK_GPIO_ALT_C3), |
830 | NMK_PIN_GROUP(uartmodtx_oc3_1, NMK_GPIO_ALT_C3), |
831 | NMK_PIN_GROUP(etmr4_oc3_1, NMK_GPIO_ALT_C3), |
832 | /* Other alt C4 column */ |
833 | NMK_PIN_GROUP(sbag_oc4_1, NMK_GPIO_ALT_C4), |
834 | NMK_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C4), |
835 | }; |
836 | |
837 | /* We use this macro to define the groups applicable to a function */ |
838 | #define DB8500_FUNC_GROUPS(a, b...) \ |
839 | static const char * const a##_groups[] = { b }; |
840 | |
841 | DB8500_FUNC_GROUPS(u0, "u0_a_1" , "u0_c_1" ); |
842 | DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1" , "u1ctsrts_a_1" ); |
843 | /* |
844 | * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however |
845 | * only available on two pins in alternative function C |
846 | */ |
847 | DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1" , "u2rxtx_c_1" , "u2ctsrts_c_1" , |
848 | "u2rxtx_c_2" , "u2rxtx_c_3" , "u2rx_oc1_1" ); |
849 | DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1" , "ipi2c_a_2" ); |
850 | /* |
851 | * MSP0 can only be on a certain set of pins, but the TX/RX pins can be |
852 | * switched around by selecting the altfunction A or B. The SCK pin is |
853 | * only available on the altfunction B. |
854 | */ |
855 | DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1" , "msp0tfstck_a_1" , "msp0rfstck_a_1" , |
856 | "msp0txrx_b_1" , "msp0sck_b_1" ); |
857 | DB8500_FUNC_GROUPS(mc0, "mc0_a_1" , "mc0_a_2" , "mc0_dat47_a_1" , "mc0dat31dir_a_1" ); |
858 | /* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */ |
859 | DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1" , "msp1_a_1" , "msp1txrx_b_1" ); |
860 | DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1" ); |
861 | DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1" , "lcdvsi1_a_1" , "lcd_d0_d7_a_1" , |
862 | "lcd_d8_d11_a_1" , "lcd_d12_d15_a_1" , "lcd_d12_d23_a_1" , "lcd_b_1" , |
863 | "lcd_d16_d23_b_1" ); |
864 | DB8500_FUNC_GROUPS(kp, "kp_a_1" , "kp_a_2" , "kp_b_1" , "kp_b_2" , "kp_c_1" , "kp_oc1_1" ); |
865 | DB8500_FUNC_GROUPS(mc2, "mc2_a_1" , "mc2_a_2" , "mc2rstn_c_1" ); |
866 | DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1" ); |
867 | DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1" ); |
868 | DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1" ); |
869 | /* The image processor has 8 GPIO pins that can be muxed out */ |
870 | DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1" , "ipgpio1_a_1" , "ipgpio7_b_1" , |
871 | "ipgpio2_b_1" , "ipgpio3_b_1" , "ipgpio6_c_1" , "ipgpio0_c_1" , |
872 | "ipgpio1_c_1" , "ipgpio3_c_1" , "ipgpio2_c_1" , "ipgpio4_c_1" , |
873 | "ipgpio5_c_1" , "ipgpio6_c_2" , "ipgpio7_c_1" , "ipgpio2_c_2" , |
874 | "ipgpio3_c_2" , "ipgpio4_c_2" , "ipgpio5_c_2" ); |
875 | /* MSP2 can not invert the RX/TX pins but has the optional SCK pin */ |
876 | DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1" , "msp2_a_1" ); |
877 | DB8500_FUNC_GROUPS(mc4, "mc4_a_1" , "mc4rstn_c_1" ); |
878 | DB8500_FUNC_GROUPS(mc1, "mc1_a_1" , "mc1_a_2" , "mc1dir_a_1" ); |
879 | DB8500_FUNC_GROUPS(hsi, "hsir_a_1" , "hsit_a_1" , "hsit_a_2" ); |
880 | DB8500_FUNC_GROUPS(clkout, "clkout1_a_1" , "clkout1_a_2" , "clkout1_c_1" , |
881 | "clkout2_a_1" , "clkout2_a_2" , "clkout2_c_1" ); |
882 | DB8500_FUNC_GROUPS(usb, "usb_a_1" ); |
883 | DB8500_FUNC_GROUPS(trig, "trig_b_1" ); |
884 | DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1" ); |
885 | DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1" , "i2c1_b_2" ); |
886 | DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1" , "i2c2_b_2" ); |
887 | /* |
888 | * The modem UART can output its RX and TX pins in some different places, |
889 | * so select one of each. |
890 | */ |
891 | DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1" , "uartmodrx_b_1" , "uartmodrx_b_2" , |
892 | "uartmodrx_c_1" , "uartmod_tx_c_1" , "uartmodrx_oc1_1" , |
893 | "uartmodtx_oc1_1" , "uartmodrx_oc3_1" , "uartmodtx_oc3_1" ); |
894 | DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1" , "stmmod_c_1" , "stmmod_oc1_1" , |
895 | "stmmod_oc3_1" , "stmmod_oc3_2" ); |
896 | DB8500_FUNC_GROUPS(spi3, "spi3_b_1" ); |
897 | /* Select between CS0 on alt B or PS1 on alt C */ |
898 | DB8500_FUNC_GROUPS(sm, "sm_b_1" , "smcs0_b_1" , "smcs1_b_1" , "smcleale_c_1" , |
899 | "smps0_c_1" , "smps1_c_1" ); |
900 | DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1" , "lcda_b_1" ); |
901 | DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1" ); |
902 | DB8500_FUNC_GROUPS(pwl, "pwl_b_1" , "pwl_b_2" , "pwl_b_3" , "pwl_b_4" ); |
903 | DB8500_FUNC_GROUPS(spi1, "spi1_b_1" ); |
904 | DB8500_FUNC_GROUPS(mc3, "mc3_b_1" ); |
905 | DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1" ); |
906 | DB8500_FUNC_GROUPS(slim0, "slim0_c_1" ); |
907 | DB8500_FUNC_GROUPS(ms, "ms_c_1" ); |
908 | DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1" ); |
909 | DB8500_FUNC_GROUPS(stmape, "stmape_c_1" , "stmape_c_2" , "stmape_oc1_1" ); |
910 | DB8500_FUNC_GROUPS(mc5, "mc5_c_1" ); |
911 | DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1" , "usbsim_c_2" ); |
912 | DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1" , "i2c3_c_2" ); |
913 | DB8500_FUNC_GROUPS(spi0, "spi0_c_1" ); |
914 | DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1" , "spi2_oc1_2" ); |
915 | DB8500_FUNC_GROUPS(remap, "remap0_oc1_1" , "remap1_oc1_1" ); |
916 | DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1" , "sbag_oc4_1" ); |
917 | DB8500_FUNC_GROUPS(ptm, "ptma9_oc1_1" , "ptma9_oc2_1" ); |
918 | DB8500_FUNC_GROUPS(rf, "rf_oc1_1" , "rf_oc1_2" ); |
919 | DB8500_FUNC_GROUPS(hx, "hxclk_oc1_1" , "hxgpio_oc1_1" ); |
920 | DB8500_FUNC_GROUPS(etm, "etmr4_oc2_1" , "etmr4_oc3_1" ); |
921 | DB8500_FUNC_GROUPS(hwobs, "hwobs_oc4_1" ); |
922 | #define FUNCTION(fname) \ |
923 | { \ |
924 | .name = #fname, \ |
925 | .groups = fname##_groups, \ |
926 | .ngroups = ARRAY_SIZE(fname##_groups), \ |
927 | } |
928 | |
929 | static const struct nmk_function nmk_db8500_functions[] = { |
930 | FUNCTION(u0), |
931 | FUNCTION(u1), |
932 | FUNCTION(u2), |
933 | FUNCTION(ipi2c), |
934 | FUNCTION(msp0), |
935 | FUNCTION(mc0), |
936 | FUNCTION(msp1), |
937 | FUNCTION(lcdb), |
938 | FUNCTION(lcd), |
939 | FUNCTION(kp), |
940 | FUNCTION(mc2), |
941 | FUNCTION(ssp1), |
942 | FUNCTION(ssp0), |
943 | FUNCTION(i2c0), |
944 | FUNCTION(ipgpio), |
945 | FUNCTION(msp2), |
946 | FUNCTION(mc4), |
947 | FUNCTION(mc1), |
948 | FUNCTION(hsi), |
949 | FUNCTION(clkout), |
950 | FUNCTION(usb), |
951 | FUNCTION(trig), |
952 | FUNCTION(i2c4), |
953 | FUNCTION(i2c1), |
954 | FUNCTION(i2c2), |
955 | FUNCTION(uartmod), |
956 | FUNCTION(stmmod), |
957 | FUNCTION(spi3), |
958 | FUNCTION(sm), |
959 | FUNCTION(lcda), |
960 | FUNCTION(ddrtrig), |
961 | FUNCTION(pwl), |
962 | FUNCTION(spi1), |
963 | FUNCTION(mc3), |
964 | FUNCTION(ipjtag), |
965 | FUNCTION(slim0), |
966 | FUNCTION(ms), |
967 | FUNCTION(iptrigout), |
968 | FUNCTION(stmape), |
969 | FUNCTION(mc5), |
970 | FUNCTION(usbsim), |
971 | FUNCTION(i2c3), |
972 | FUNCTION(spi0), |
973 | FUNCTION(spi2), |
974 | FUNCTION(remap), |
975 | FUNCTION(sbag), |
976 | FUNCTION(ptm), |
977 | FUNCTION(rf), |
978 | FUNCTION(hx), |
979 | FUNCTION(etm), |
980 | FUNCTION(hwobs), |
981 | }; |
982 | |
983 | static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = { |
984 | PRCM_GPIOCR_ALTCX(23, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */ |
985 | true, PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */ |
986 | false, 0, 0, |
987 | false, 0, 0 |
988 | ), |
989 | PRCM_GPIOCR_ALTCX(24, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */ |
990 | true, PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */ |
991 | true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ |
992 | false, 0, 0 |
993 | ), |
994 | PRCM_GPIOCR_ALTCX(25, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */ |
995 | true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */ |
996 | false, 0, 0, |
997 | false, 0, 0 |
998 | ), |
999 | PRCM_GPIOCR_ALTCX(26, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */ |
1000 | true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */ |
1001 | false, 0, 0, |
1002 | false, 0, 0 |
1003 | ), |
1004 | PRCM_GPIOCR_ALTCX(27, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */ |
1005 | true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */ |
1006 | false, 0, 0, |
1007 | false, 0, 0 |
1008 | ), |
1009 | PRCM_GPIOCR_ALTCX(28, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */ |
1010 | true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */ |
1011 | false, 0, 0, |
1012 | false, 0, 0 |
1013 | ), |
1014 | PRCM_GPIOCR_ALTCX(29, false, 0, 0, |
1015 | false, 0, 0, |
1016 | true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ |
1017 | false, 0, 0 |
1018 | ), |
1019 | PRCM_GPIOCR_ALTCX(30, false, 0, 0, |
1020 | false, 0, 0, |
1021 | true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ |
1022 | false, 0, 0 |
1023 | ), |
1024 | PRCM_GPIOCR_ALTCX(31, false, 0, 0, |
1025 | false, 0, 0, |
1026 | true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ |
1027 | false, 0, 0 |
1028 | ), |
1029 | PRCM_GPIOCR_ALTCX(32, false, 0, 0, |
1030 | false, 0, 0, |
1031 | true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ |
1032 | false, 0, 0 |
1033 | ), |
1034 | PRCM_GPIOCR_ALTCX(68, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */ |
1035 | false, 0, 0, |
1036 | false, 0, 0, |
1037 | false, 0, 0 |
1038 | ), |
1039 | PRCM_GPIOCR_ALTCX(69, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */ |
1040 | false, 0, 0, |
1041 | false, 0, 0, |
1042 | false, 0, 0 |
1043 | ), |
1044 | PRCM_GPIOCR_ALTCX(70, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */ |
1045 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1046 | true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ |
1047 | true, PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */ |
1048 | ), |
1049 | PRCM_GPIOCR_ALTCX(71, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */ |
1050 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1051 | true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ |
1052 | true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */ |
1053 | ), |
1054 | PRCM_GPIOCR_ALTCX(72, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */ |
1055 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1056 | true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ |
1057 | true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */ |
1058 | ), |
1059 | PRCM_GPIOCR_ALTCX(73, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */ |
1060 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1061 | true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ |
1062 | true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */ |
1063 | ), |
1064 | PRCM_GPIOCR_ALTCX(74, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */ |
1065 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1066 | true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ |
1067 | true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */ |
1068 | ), |
1069 | PRCM_GPIOCR_ALTCX(75, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */ |
1070 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1071 | true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */ |
1072 | false, 0, 0 |
1073 | ), |
1074 | PRCM_GPIOCR_ALTCX(76, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */ |
1075 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1076 | true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */ |
1077 | false, 0, 0 |
1078 | ), |
1079 | PRCM_GPIOCR_ALTCX(77, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */ |
1080 | true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ |
1081 | false, 0, 0, |
1082 | true, PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */ |
1083 | ), |
1084 | PRCM_GPIOCR_ALTCX(86, true, PRCM_IDX_GPIOCR1, 12, /* KP_O3 */ |
1085 | false, 0, 0, |
1086 | false, 0, 0, |
1087 | false, 0, 0 |
1088 | ), |
1089 | PRCM_GPIOCR_ALTCX(87, true, PRCM_IDX_GPIOCR1, 12, /* KP_O2 */ |
1090 | false, 0, 0, |
1091 | false, 0, 0, |
1092 | false, 0, 0 |
1093 | ), |
1094 | PRCM_GPIOCR_ALTCX(88, true, PRCM_IDX_GPIOCR1, 12, /* KP_I3 */ |
1095 | false, 0, 0, |
1096 | false, 0, 0, |
1097 | false, 0, 0 |
1098 | ), |
1099 | PRCM_GPIOCR_ALTCX(89, true, PRCM_IDX_GPIOCR1, 12, /* KP_I2 */ |
1100 | false, 0, 0, |
1101 | false, 0, 0, |
1102 | false, 0, 0 |
1103 | ), |
1104 | PRCM_GPIOCR_ALTCX(90, true, PRCM_IDX_GPIOCR1, 12, /* KP_O1 */ |
1105 | false, 0, 0, |
1106 | false, 0, 0, |
1107 | false, 0, 0 |
1108 | ), |
1109 | PRCM_GPIOCR_ALTCX(91, true, PRCM_IDX_GPIOCR1, 12, /* KP_O0 */ |
1110 | false, 0, 0, |
1111 | false, 0, 0, |
1112 | false, 0, 0 |
1113 | ), |
1114 | PRCM_GPIOCR_ALTCX(92, true, PRCM_IDX_GPIOCR1, 12, /* KP_I1 */ |
1115 | false, 0, 0, |
1116 | false, 0, 0, |
1117 | false, 0, 0 |
1118 | ), |
1119 | PRCM_GPIOCR_ALTCX(93, true, PRCM_IDX_GPIOCR1, 12, /* KP_I0 */ |
1120 | false, 0, 0, |
1121 | false, 0, 0, |
1122 | false, 0, 0 |
1123 | ), |
1124 | PRCM_GPIOCR_ALTCX(96, true, PRCM_IDX_GPIOCR2, 3, /* RF_INT */ |
1125 | false, 0, 0, |
1126 | false, 0, 0, |
1127 | false, 0, 0 |
1128 | ), |
1129 | PRCM_GPIOCR_ALTCX(97, true, PRCM_IDX_GPIOCR2, 1, /* RF_CTRL */ |
1130 | false, 0, 0, |
1131 | false, 0, 0, |
1132 | false, 0, 0 |
1133 | ), |
1134 | PRCM_GPIOCR_ALTCX(151, false, 0, 0, |
1135 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */ |
1136 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1137 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */ |
1138 | ), |
1139 | PRCM_GPIOCR_ALTCX(152, true, PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */ |
1140 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */ |
1141 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1142 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */ |
1143 | ), |
1144 | PRCM_GPIOCR_ALTCX(153, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */ |
1145 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */ |
1146 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1147 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */ |
1148 | ), |
1149 | PRCM_GPIOCR_ALTCX(154, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */ |
1150 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */ |
1151 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1152 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */ |
1153 | ), |
1154 | PRCM_GPIOCR_ALTCX(155, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ |
1155 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */ |
1156 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1157 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */ |
1158 | ), |
1159 | PRCM_GPIOCR_ALTCX(156, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ |
1160 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */ |
1161 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1162 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */ |
1163 | ), |
1164 | PRCM_GPIOCR_ALTCX(157, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ |
1165 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */ |
1166 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1167 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */ |
1168 | ), |
1169 | PRCM_GPIOCR_ALTCX(158, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ |
1170 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */ |
1171 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1172 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */ |
1173 | ), |
1174 | PRCM_GPIOCR_ALTCX(159, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ |
1175 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */ |
1176 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1177 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */ |
1178 | ), |
1179 | PRCM_GPIOCR_ALTCX(160, false, 0, 0, |
1180 | true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */ |
1181 | true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ |
1182 | true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */ |
1183 | ), |
1184 | PRCM_GPIOCR_ALTCX(161, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */ |
1185 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */ |
1186 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1187 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */ |
1188 | ), |
1189 | PRCM_GPIOCR_ALTCX(162, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */ |
1190 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */ |
1191 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1192 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */ |
1193 | ), |
1194 | PRCM_GPIOCR_ALTCX(163, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */ |
1195 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */ |
1196 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1197 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */ |
1198 | ), |
1199 | PRCM_GPIOCR_ALTCX(164, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */ |
1200 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */ |
1201 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1202 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */ |
1203 | ), |
1204 | PRCM_GPIOCR_ALTCX(165, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */ |
1205 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */ |
1206 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1207 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */ |
1208 | ), |
1209 | PRCM_GPIOCR_ALTCX(166, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */ |
1210 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */ |
1211 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1212 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */ |
1213 | ), |
1214 | PRCM_GPIOCR_ALTCX(167, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */ |
1215 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */ |
1216 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1217 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */ |
1218 | ), |
1219 | PRCM_GPIOCR_ALTCX(168, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */ |
1220 | true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */ |
1221 | true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ |
1222 | true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */ |
1223 | ), |
1224 | PRCM_GPIOCR_ALTCX(170, true, PRCM_IDX_GPIOCR2, 2, /* RF_INT */ |
1225 | false, 0, 0, |
1226 | false, 0, 0, |
1227 | false, 0, 0 |
1228 | ), |
1229 | PRCM_GPIOCR_ALTCX(171, true, PRCM_IDX_GPIOCR2, 0, /* RF_CTRL */ |
1230 | false, 0, 0, |
1231 | false, 0, 0, |
1232 | false, 0, 0 |
1233 | ), |
1234 | PRCM_GPIOCR_ALTCX(215, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */ |
1235 | false, 0, 0, |
1236 | false, 0, 0, |
1237 | false, 0, 0 |
1238 | ), |
1239 | PRCM_GPIOCR_ALTCX(216, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */ |
1240 | false, 0, 0, |
1241 | false, 0, 0, |
1242 | false, 0, 0 |
1243 | ), |
1244 | PRCM_GPIOCR_ALTCX(217, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */ |
1245 | false, 0, 0, |
1246 | false, 0, 0, |
1247 | false, 0, 0 |
1248 | ), |
1249 | PRCM_GPIOCR_ALTCX(218, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */ |
1250 | false, 0, 0, |
1251 | false, 0, 0, |
1252 | false, 0, 0 |
1253 | ), |
1254 | }; |
1255 | |
1256 | static const u16 db8500_prcm_gpiocr_regs[] = { |
1257 | [PRCM_IDX_GPIOCR1] = 0x138, |
1258 | [PRCM_IDX_GPIOCR2] = 0x574, |
1259 | }; |
1260 | |
1261 | static const struct nmk_pinctrl_soc_data nmk_db8500_soc = { |
1262 | .pins = nmk_db8500_pins, |
1263 | .npins = ARRAY_SIZE(nmk_db8500_pins), |
1264 | .functions = nmk_db8500_functions, |
1265 | .nfunctions = ARRAY_SIZE(nmk_db8500_functions), |
1266 | .groups = nmk_db8500_groups, |
1267 | .ngroups = ARRAY_SIZE(nmk_db8500_groups), |
1268 | .altcx_pins = db8500_altcx_pins, |
1269 | .npins_altcx = ARRAY_SIZE(db8500_altcx_pins), |
1270 | .prcm_gpiocr_registers = db8500_prcm_gpiocr_regs, |
1271 | }; |
1272 | |
1273 | void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) |
1274 | { |
1275 | *soc = &nmk_db8500_soc; |
1276 | } |
1277 | |