1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /****************************************************************************** |
3 | * |
4 | * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. |
5 | * |
6 | ******************************************************************************/ |
7 | #ifndef __INC_HAL8723BPHYREG_H__ |
8 | #define __INC_HAL8723BPHYREG_H__ |
9 | |
10 | #include <Hal8192CPhyReg.h> |
11 | |
12 | /* BB Register Definition */ |
13 | /* */ |
14 | /* 4. Page9(0x900) */ |
15 | /* */ |
16 | #define rDPDT_control 0x92c |
17 | #define rfe_ctrl_anta_src 0x930 |
18 | #define rS0S1_PathSwitch 0x948 |
19 | #define AGC_table_select 0xb2c |
20 | |
21 | /* */ |
22 | /* PageB(0xB00) */ |
23 | /* */ |
24 | #define rPdp_AntA 0xb00 |
25 | #define rPdp_AntA_4 0xb04 |
26 | #define rPdp_AntA_8 0xb08 |
27 | #define rPdp_AntA_C 0xb0c |
28 | #define rPdp_AntA_10 0xb10 |
29 | #define rPdp_AntA_14 0xb14 |
30 | #define rPdp_AntA_18 0xb18 |
31 | #define rPdp_AntA_1C 0xb1c |
32 | #define rPdp_AntA_20 0xb20 |
33 | #define rPdp_AntA_24 0xb24 |
34 | |
35 | #define rConfig_Pmpd_AntA 0xb28 |
36 | #define rConfig_ram64x16 0xb2c |
37 | |
38 | #define rBndA 0xb30 |
39 | #define rHssiPar 0xb34 |
40 | |
41 | #define rConfig_AntA 0xb68 |
42 | #define rConfig_AntB 0xb6c |
43 | |
44 | #define rPdp_AntB 0xb70 |
45 | #define rPdp_AntB_4 0xb74 |
46 | #define rPdp_AntB_8 0xb78 |
47 | #define rPdp_AntB_C 0xb7c |
48 | #define rPdp_AntB_10 0xb80 |
49 | #define rPdp_AntB_14 0xb84 |
50 | #define rPdp_AntB_18 0xb88 |
51 | #define rPdp_AntB_1C 0xb8c |
52 | #define rPdp_AntB_20 0xb90 |
53 | #define rPdp_AntB_24 0xb94 |
54 | |
55 | #define rConfig_Pmpd_AntB 0xb98 |
56 | |
57 | #define rBndB 0xba0 |
58 | |
59 | #define rAPK 0xbd8 |
60 | #define rPm_Rx0_AntA 0xbdc |
61 | #define rPm_Rx1_AntA 0xbe0 |
62 | #define rPm_Rx2_AntA 0xbe4 |
63 | #define rPm_Rx3_AntA 0xbe8 |
64 | #define rPm_Rx0_AntB 0xbec |
65 | #define rPm_Rx1_AntB 0xbf0 |
66 | #define rPm_Rx2_AntB 0xbf4 |
67 | #define rPm_Rx3_AntB 0xbf8 |
68 | |
69 | #endif |
70 | |