1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* |
3 | * Driver for 8250/16550-type serial ports |
4 | * |
5 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. |
6 | * |
7 | * Copyright (C) 2001 Russell King. |
8 | */ |
9 | |
10 | #include <linux/bits.h> |
11 | #include <linux/serial_8250.h> |
12 | #include <linux/serial_reg.h> |
13 | #include <linux/dmaengine.h> |
14 | |
15 | #include "../serial_mctrl_gpio.h" |
16 | |
17 | struct uart_8250_dma { |
18 | int (*tx_dma)(struct uart_8250_port *p); |
19 | int (*rx_dma)(struct uart_8250_port *p); |
20 | void (*prepare_tx_dma)(struct uart_8250_port *p); |
21 | void (*prepare_rx_dma)(struct uart_8250_port *p); |
22 | |
23 | /* Filter function */ |
24 | dma_filter_fn fn; |
25 | /* Parameter to the filter function */ |
26 | void *rx_param; |
27 | void *tx_param; |
28 | |
29 | struct dma_slave_config rxconf; |
30 | struct dma_slave_config txconf; |
31 | |
32 | struct dma_chan *rxchan; |
33 | struct dma_chan *txchan; |
34 | |
35 | /* Device address base for DMA operations */ |
36 | phys_addr_t rx_dma_addr; |
37 | phys_addr_t tx_dma_addr; |
38 | |
39 | /* DMA address of the buffer in memory */ |
40 | dma_addr_t rx_addr; |
41 | dma_addr_t tx_addr; |
42 | |
43 | dma_cookie_t rx_cookie; |
44 | dma_cookie_t tx_cookie; |
45 | |
46 | void *rx_buf; |
47 | |
48 | size_t rx_size; |
49 | size_t tx_size; |
50 | |
51 | unsigned char tx_running; |
52 | unsigned char tx_err; |
53 | unsigned char rx_running; |
54 | }; |
55 | |
56 | struct old_serial_port { |
57 | unsigned int uart; |
58 | unsigned int baud_base; |
59 | unsigned int port; |
60 | unsigned int irq; |
61 | upf_t flags; |
62 | unsigned char io_type; |
63 | unsigned char __iomem *iomem_base; |
64 | unsigned short iomem_reg_shift; |
65 | }; |
66 | |
67 | struct serial8250_config { |
68 | const char *name; |
69 | unsigned short fifo_size; |
70 | unsigned short tx_loadsz; |
71 | unsigned char fcr; |
72 | unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE]; |
73 | unsigned int flags; |
74 | }; |
75 | |
76 | #define UART_CAP_FIFO BIT(8) /* UART has FIFO */ |
77 | #define UART_CAP_EFR BIT(9) /* UART has EFR */ |
78 | #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */ |
79 | #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */ |
80 | #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */ |
81 | #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */ |
82 | #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */ |
83 | #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */ |
84 | #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */ |
85 | #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks: |
86 | * STOP PARITY EPAR SPAR WLEN5 WLEN6 |
87 | */ |
88 | #define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */ |
89 | |
90 | #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */ |
91 | #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */ |
92 | #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */ |
93 | #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */ |
94 | #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */ |
95 | |
96 | |
97 | #ifdef CONFIG_SERIAL_8250_SHARE_IRQ |
98 | #define SERIAL8250_SHARE_IRQS 1 |
99 | #else |
100 | #define SERIAL8250_SHARE_IRQS 0 |
101 | #endif |
102 | |
103 | #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ |
104 | { \ |
105 | .iobase = _base, \ |
106 | .irq = _irq, \ |
107 | .uartclk = 1843200, \ |
108 | .iotype = UPIO_PORT, \ |
109 | .flags = UPF_BOOT_AUTOCONF | (_flags), \ |
110 | } |
111 | |
112 | #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) |
113 | |
114 | |
115 | static inline int serial_in(struct uart_8250_port *up, int offset) |
116 | { |
117 | return up->port.serial_in(&up->port, offset); |
118 | } |
119 | |
120 | static inline void serial_out(struct uart_8250_port *up, int offset, int value) |
121 | { |
122 | up->port.serial_out(&up->port, offset, value); |
123 | } |
124 | |
125 | /** |
126 | * serial_lsr_in - Read LSR register and preserve flags across reads |
127 | * @up: uart 8250 port |
128 | * |
129 | * Read LSR register and handle saving non-preserved flags across reads. |
130 | * The flags that are not preserved across reads are stored into |
131 | * up->lsr_saved_flags. |
132 | * |
133 | * Returns LSR value or'ed with the preserved flags (if any). |
134 | */ |
135 | static inline u16 serial_lsr_in(struct uart_8250_port *up) |
136 | { |
137 | u16 lsr = up->lsr_saved_flags; |
138 | |
139 | lsr |= serial_in(up, UART_LSR); |
140 | up->lsr_saved_flags = lsr & up->lsr_save_mask; |
141 | |
142 | return lsr; |
143 | } |
144 | |
145 | /* |
146 | * For the 16C950 |
147 | */ |
148 | static void serial_icr_write(struct uart_8250_port *up, int offset, int value) |
149 | { |
150 | serial_out(up, UART_SCR, value: offset); |
151 | serial_out(up, UART_ICR, value); |
152 | } |
153 | |
154 | static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up, |
155 | int offset) |
156 | { |
157 | unsigned int value; |
158 | |
159 | serial_icr_write(up, UART_ACR, value: up->acr | UART_ACR_ICRRD); |
160 | serial_out(up, UART_SCR, value: offset); |
161 | value = serial_in(up, UART_ICR); |
162 | serial_icr_write(up, UART_ACR, value: up->acr); |
163 | |
164 | return value; |
165 | } |
166 | |
167 | void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); |
168 | |
169 | static inline u32 serial_dl_read(struct uart_8250_port *up) |
170 | { |
171 | return up->dl_read(up); |
172 | } |
173 | |
174 | static inline void serial_dl_write(struct uart_8250_port *up, u32 value) |
175 | { |
176 | up->dl_write(up, value); |
177 | } |
178 | |
179 | static inline bool serial8250_set_THRI(struct uart_8250_port *up) |
180 | { |
181 | /* Port locked to synchronize UART_IER access against the console. */ |
182 | lockdep_assert_held_once(&up->port.lock); |
183 | |
184 | if (up->ier & UART_IER_THRI) |
185 | return false; |
186 | up->ier |= UART_IER_THRI; |
187 | serial_out(up, UART_IER, value: up->ier); |
188 | return true; |
189 | } |
190 | |
191 | static inline bool serial8250_clear_THRI(struct uart_8250_port *up) |
192 | { |
193 | /* Port locked to synchronize UART_IER access against the console. */ |
194 | lockdep_assert_held_once(&up->port.lock); |
195 | |
196 | if (!(up->ier & UART_IER_THRI)) |
197 | return false; |
198 | up->ier &= ~UART_IER_THRI; |
199 | serial_out(up, UART_IER, value: up->ier); |
200 | return true; |
201 | } |
202 | |
203 | struct uart_8250_port *serial8250_get_port(int line); |
204 | |
205 | void serial8250_rpm_get(struct uart_8250_port *p); |
206 | void serial8250_rpm_put(struct uart_8250_port *p); |
207 | |
208 | void serial8250_rpm_get_tx(struct uart_8250_port *p); |
209 | void serial8250_rpm_put_tx(struct uart_8250_port *p); |
210 | |
211 | int serial8250_em485_config(struct uart_port *port, struct ktermios *termios, |
212 | struct serial_rs485 *rs485); |
213 | void serial8250_em485_start_tx(struct uart_8250_port *p); |
214 | void serial8250_em485_stop_tx(struct uart_8250_port *p); |
215 | void serial8250_em485_destroy(struct uart_8250_port *p); |
216 | extern struct serial_rs485 serial8250_em485_supported; |
217 | |
218 | /* MCR <-> TIOCM conversion */ |
219 | static inline int serial8250_TIOCM_to_MCR(int tiocm) |
220 | { |
221 | int mcr = 0; |
222 | |
223 | if (tiocm & TIOCM_RTS) |
224 | mcr |= UART_MCR_RTS; |
225 | if (tiocm & TIOCM_DTR) |
226 | mcr |= UART_MCR_DTR; |
227 | if (tiocm & TIOCM_OUT1) |
228 | mcr |= UART_MCR_OUT1; |
229 | if (tiocm & TIOCM_OUT2) |
230 | mcr |= UART_MCR_OUT2; |
231 | if (tiocm & TIOCM_LOOP) |
232 | mcr |= UART_MCR_LOOP; |
233 | |
234 | return mcr; |
235 | } |
236 | |
237 | static inline int serial8250_MCR_to_TIOCM(int mcr) |
238 | { |
239 | int tiocm = 0; |
240 | |
241 | if (mcr & UART_MCR_RTS) |
242 | tiocm |= TIOCM_RTS; |
243 | if (mcr & UART_MCR_DTR) |
244 | tiocm |= TIOCM_DTR; |
245 | if (mcr & UART_MCR_OUT1) |
246 | tiocm |= TIOCM_OUT1; |
247 | if (mcr & UART_MCR_OUT2) |
248 | tiocm |= TIOCM_OUT2; |
249 | if (mcr & UART_MCR_LOOP) |
250 | tiocm |= TIOCM_LOOP; |
251 | |
252 | return tiocm; |
253 | } |
254 | |
255 | /* MSR <-> TIOCM conversion */ |
256 | static inline int serial8250_MSR_to_TIOCM(int msr) |
257 | { |
258 | int tiocm = 0; |
259 | |
260 | if (msr & UART_MSR_DCD) |
261 | tiocm |= TIOCM_CAR; |
262 | if (msr & UART_MSR_RI) |
263 | tiocm |= TIOCM_RNG; |
264 | if (msr & UART_MSR_DSR) |
265 | tiocm |= TIOCM_DSR; |
266 | if (msr & UART_MSR_CTS) |
267 | tiocm |= TIOCM_CTS; |
268 | |
269 | return tiocm; |
270 | } |
271 | |
272 | static inline void serial8250_out_MCR(struct uart_8250_port *up, int value) |
273 | { |
274 | serial_out(up, UART_MCR, value); |
275 | |
276 | if (up->gpios) |
277 | mctrl_gpio_set(gpios: up->gpios, mctrl: serial8250_MCR_to_TIOCM(mcr: value)); |
278 | } |
279 | |
280 | static inline int serial8250_in_MCR(struct uart_8250_port *up) |
281 | { |
282 | int mctrl; |
283 | |
284 | mctrl = serial_in(up, UART_MCR); |
285 | |
286 | if (up->gpios) { |
287 | unsigned int mctrl_gpio = 0; |
288 | |
289 | mctrl_gpio = mctrl_gpio_get_outputs(gpios: up->gpios, mctrl: &mctrl_gpio); |
290 | mctrl |= serial8250_TIOCM_to_MCR(tiocm: mctrl_gpio); |
291 | } |
292 | |
293 | return mctrl; |
294 | } |
295 | |
296 | bool alpha_jensen(void); |
297 | void alpha_jensen_set_mctrl(struct uart_port *port, unsigned int mctrl); |
298 | |
299 | #ifdef CONFIG_SERIAL_8250_PNP |
300 | int serial8250_pnp_init(void); |
301 | void serial8250_pnp_exit(void); |
302 | #else |
303 | static inline int serial8250_pnp_init(void) { return 0; } |
304 | static inline void serial8250_pnp_exit(void) { } |
305 | #endif |
306 | |
307 | #ifdef CONFIG_SERIAL_8250_FINTEK |
308 | int fintek_8250_probe(struct uart_8250_port *uart); |
309 | #else |
310 | static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; } |
311 | #endif |
312 | |
313 | #ifdef CONFIG_ARCH_OMAP1 |
314 | #include <linux/soc/ti/omap1-soc.h> |
315 | static inline int is_omap1_8250(struct uart_8250_port *pt) |
316 | { |
317 | int res; |
318 | |
319 | switch (pt->port.mapbase) { |
320 | case OMAP1_UART1_BASE: |
321 | case OMAP1_UART2_BASE: |
322 | case OMAP1_UART3_BASE: |
323 | res = 1; |
324 | break; |
325 | default: |
326 | res = 0; |
327 | break; |
328 | } |
329 | |
330 | return res; |
331 | } |
332 | |
333 | static inline int is_omap1510_8250(struct uart_8250_port *pt) |
334 | { |
335 | if (!cpu_is_omap1510()) |
336 | return 0; |
337 | |
338 | return is_omap1_8250(pt); |
339 | } |
340 | #else |
341 | static inline int is_omap1_8250(struct uart_8250_port *pt) |
342 | { |
343 | return 0; |
344 | } |
345 | static inline int is_omap1510_8250(struct uart_8250_port *pt) |
346 | { |
347 | return 0; |
348 | } |
349 | #endif |
350 | |
351 | #ifdef CONFIG_SERIAL_8250_DMA |
352 | extern int serial8250_tx_dma(struct uart_8250_port *); |
353 | extern int serial8250_rx_dma(struct uart_8250_port *); |
354 | extern void serial8250_rx_dma_flush(struct uart_8250_port *); |
355 | extern int serial8250_request_dma(struct uart_8250_port *); |
356 | extern void serial8250_release_dma(struct uart_8250_port *); |
357 | |
358 | static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p) |
359 | { |
360 | struct uart_8250_dma *dma = p->dma; |
361 | |
362 | if (dma->prepare_tx_dma) |
363 | dma->prepare_tx_dma(p); |
364 | } |
365 | |
366 | static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p) |
367 | { |
368 | struct uart_8250_dma *dma = p->dma; |
369 | |
370 | if (dma->prepare_rx_dma) |
371 | dma->prepare_rx_dma(p); |
372 | } |
373 | |
374 | static inline bool serial8250_tx_dma_running(struct uart_8250_port *p) |
375 | { |
376 | struct uart_8250_dma *dma = p->dma; |
377 | |
378 | return dma && dma->tx_running; |
379 | } |
380 | #else |
381 | static inline int serial8250_tx_dma(struct uart_8250_port *p) |
382 | { |
383 | return -1; |
384 | } |
385 | static inline int serial8250_rx_dma(struct uart_8250_port *p) |
386 | { |
387 | return -1; |
388 | } |
389 | static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { } |
390 | static inline int serial8250_request_dma(struct uart_8250_port *p) |
391 | { |
392 | return -1; |
393 | } |
394 | static inline void serial8250_release_dma(struct uart_8250_port *p) { } |
395 | |
396 | static inline bool serial8250_tx_dma_running(struct uart_8250_port *p) |
397 | { |
398 | return false; |
399 | } |
400 | #endif |
401 | |
402 | static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) |
403 | { |
404 | unsigned char status; |
405 | |
406 | status = serial_in(up, offset: 0x04); /* EXCR2 */ |
407 | #define PRESL(x) ((x) & 0x30) |
408 | if (PRESL(status) == 0x10) { |
409 | /* already in high speed mode */ |
410 | return 0; |
411 | } else { |
412 | status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ |
413 | status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ |
414 | serial_out(up, offset: 0x04, value: status); |
415 | } |
416 | return 1; |
417 | } |
418 | |
419 | static inline int serial_index(struct uart_port *port) |
420 | { |
421 | return port->minor - 64; |
422 | } |
423 | |