| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2014 Freescale Semiconductor, Inc. |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __DT_BINDINGS_CLOCK_IMX6SX_H |
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| 7 | #define __DT_BINDINGS_CLOCK_IMX6SX_H |
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| 8 | |
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| 9 | #define IMX6SX_CLK_DUMMY 0 |
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| 10 | #define IMX6SX_CLK_CKIL 1 |
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| 11 | #define IMX6SX_CLK_CKIH 2 |
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| 12 | #define IMX6SX_CLK_OSC 3 |
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| 13 | #define IMX6SX_CLK_PLL1_SYS 4 |
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| 14 | #define IMX6SX_CLK_PLL2_BUS 5 |
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| 15 | #define IMX6SX_CLK_PLL3_USB_OTG 6 |
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| 16 | #define IMX6SX_CLK_PLL4_AUDIO 7 |
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| 17 | #define IMX6SX_CLK_PLL5_VIDEO 8 |
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| 18 | #define IMX6SX_CLK_PLL6_ENET 9 |
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| 19 | #define IMX6SX_CLK_PLL7_USB_HOST 10 |
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| 20 | #define IMX6SX_CLK_USBPHY1 11 |
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| 21 | #define IMX6SX_CLK_USBPHY2 12 |
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| 22 | #define IMX6SX_CLK_USBPHY1_GATE 13 |
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| 23 | #define IMX6SX_CLK_USBPHY2_GATE 14 |
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| 24 | #define IMX6SX_CLK_PCIE_REF 15 |
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| 25 | #define IMX6SX_CLK_PCIE_REF_125M 16 |
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| 26 | #define IMX6SX_CLK_ENET_REF 17 |
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| 27 | #define IMX6SX_CLK_PLL2_PFD0 18 |
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| 28 | #define IMX6SX_CLK_PLL2_PFD1 19 |
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| 29 | #define IMX6SX_CLK_PLL2_PFD2 20 |
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| 30 | #define IMX6SX_CLK_PLL2_PFD3 21 |
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| 31 | #define IMX6SX_CLK_PLL3_PFD0 22 |
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| 32 | #define IMX6SX_CLK_PLL3_PFD1 23 |
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| 33 | #define IMX6SX_CLK_PLL3_PFD2 24 |
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| 34 | #define IMX6SX_CLK_PLL3_PFD3 25 |
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| 35 | #define IMX6SX_CLK_PLL2_198M 26 |
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| 36 | #define IMX6SX_CLK_PLL3_120M 27 |
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| 37 | #define IMX6SX_CLK_PLL3_80M 28 |
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| 38 | #define IMX6SX_CLK_PLL3_60M 29 |
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| 39 | #define IMX6SX_CLK_TWD 30 |
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| 40 | #define IMX6SX_CLK_PLL4_POST_DIV 31 |
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| 41 | #define IMX6SX_CLK_PLL4_AUDIO_DIV 32 |
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| 42 | #define IMX6SX_CLK_PLL5_POST_DIV 33 |
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| 43 | #define IMX6SX_CLK_PLL5_VIDEO_DIV 34 |
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| 44 | #define IMX6SX_CLK_STEP 35 |
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| 45 | #define IMX6SX_CLK_PLL1_SW 36 |
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| 46 | #define IMX6SX_CLK_OCRAM_SEL 37 |
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| 47 | #define IMX6SX_CLK_PERIPH_PRE 38 |
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| 48 | #define IMX6SX_CLK_PERIPH2_PRE 39 |
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| 49 | #define IMX6SX_CLK_PERIPH_CLK2_SEL 40 |
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| 50 | #define IMX6SX_CLK_PERIPH2_CLK2_SEL 41 |
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| 51 | #define IMX6SX_CLK_PCIE_AXI_SEL 42 |
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| 52 | #define IMX6SX_CLK_GPU_AXI_SEL 43 |
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| 53 | #define IMX6SX_CLK_GPU_CORE_SEL 44 |
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| 54 | #define IMX6SX_CLK_EIM_SLOW_SEL 45 |
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| 55 | #define IMX6SX_CLK_USDHC1_SEL 46 |
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| 56 | #define IMX6SX_CLK_USDHC2_SEL 47 |
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| 57 | #define IMX6SX_CLK_USDHC3_SEL 48 |
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| 58 | #define IMX6SX_CLK_USDHC4_SEL 49 |
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| 59 | #define IMX6SX_CLK_SSI1_SEL 50 |
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| 60 | #define IMX6SX_CLK_SSI2_SEL 51 |
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| 61 | #define IMX6SX_CLK_SSI3_SEL 52 |
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| 62 | #define IMX6SX_CLK_QSPI1_SEL 53 |
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| 63 | #define IMX6SX_CLK_PERCLK_SEL 54 |
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| 64 | #define IMX6SX_CLK_VID_SEL 55 |
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| 65 | #define IMX6SX_CLK_ESAI_SEL 56 |
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| 66 | #define IMX6SX_CLK_LDB_DI0_DIV_SEL 57 |
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| 67 | #define IMX6SX_CLK_LDB_DI1_DIV_SEL 58 |
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| 68 | #define IMX6SX_CLK_CAN_SEL 59 |
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| 69 | #define IMX6SX_CLK_UART_SEL 60 |
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| 70 | #define IMX6SX_CLK_QSPI2_SEL 61 |
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| 71 | #define IMX6SX_CLK_LDB_DI1_SEL 62 |
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| 72 | #define IMX6SX_CLK_LDB_DI0_SEL 63 |
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| 73 | #define IMX6SX_CLK_SPDIF_SEL 64 |
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| 74 | #define IMX6SX_CLK_AUDIO_SEL 65 |
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| 75 | #define IMX6SX_CLK_ENET_PRE_SEL 66 |
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| 76 | #define IMX6SX_CLK_ENET_SEL 67 |
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| 77 | #define IMX6SX_CLK_M4_PRE_SEL 68 |
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| 78 | #define IMX6SX_CLK_M4_SEL 69 |
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| 79 | #define IMX6SX_CLK_ECSPI_SEL 70 |
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| 80 | #define IMX6SX_CLK_LCDIF1_PRE_SEL 71 |
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| 81 | #define IMX6SX_CLK_LCDIF2_PRE_SEL 72 |
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| 82 | #define IMX6SX_CLK_LCDIF1_SEL 73 |
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| 83 | #define IMX6SX_CLK_LCDIF2_SEL 74 |
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| 84 | #define IMX6SX_CLK_DISPLAY_SEL 75 |
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| 85 | #define IMX6SX_CLK_CSI_SEL 76 |
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| 86 | #define IMX6SX_CLK_CKO1_SEL 77 |
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| 87 | #define IMX6SX_CLK_CKO2_SEL 78 |
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| 88 | #define IMX6SX_CLK_CKO 79 |
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| 89 | #define IMX6SX_CLK_PERIPH_CLK2 80 |
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| 90 | #define IMX6SX_CLK_PERIPH2_CLK2 81 |
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| 91 | #define IMX6SX_CLK_IPG 82 |
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| 92 | #define IMX6SX_CLK_GPU_CORE_PODF 83 |
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| 93 | #define IMX6SX_CLK_GPU_AXI_PODF 84 |
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| 94 | #define IMX6SX_CLK_LCDIF1_PODF 85 |
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| 95 | #define IMX6SX_CLK_QSPI1_PODF 86 |
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| 96 | #define IMX6SX_CLK_EIM_SLOW_PODF 87 |
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| 97 | #define IMX6SX_CLK_LCDIF2_PODF 88 |
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| 98 | #define IMX6SX_CLK_PERCLK 89 |
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| 99 | #define IMX6SX_CLK_VID_PODF 90 |
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| 100 | #define IMX6SX_CLK_CAN_PODF 91 |
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| 101 | #define IMX6SX_CLK_USDHC1_PODF 92 |
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| 102 | #define IMX6SX_CLK_USDHC2_PODF 93 |
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| 103 | #define IMX6SX_CLK_USDHC3_PODF 94 |
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| 104 | #define IMX6SX_CLK_USDHC4_PODF 95 |
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| 105 | #define IMX6SX_CLK_UART_PODF 96 |
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| 106 | #define IMX6SX_CLK_ESAI_PRED 97 |
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| 107 | #define IMX6SX_CLK_ESAI_PODF 98 |
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| 108 | #define IMX6SX_CLK_SSI3_PRED 99 |
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| 109 | #define IMX6SX_CLK_SSI3_PODF 100 |
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| 110 | #define IMX6SX_CLK_SSI1_PRED 101 |
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| 111 | #define IMX6SX_CLK_SSI1_PODF 102 |
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| 112 | #define IMX6SX_CLK_QSPI2_PRED 103 |
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| 113 | #define IMX6SX_CLK_QSPI2_PODF 104 |
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| 114 | #define IMX6SX_CLK_SSI2_PRED 105 |
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| 115 | #define IMX6SX_CLK_SSI2_PODF 106 |
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| 116 | #define IMX6SX_CLK_SPDIF_PRED 107 |
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| 117 | #define IMX6SX_CLK_SPDIF_PODF 108 |
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| 118 | #define IMX6SX_CLK_AUDIO_PRED 109 |
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| 119 | #define IMX6SX_CLK_AUDIO_PODF 110 |
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| 120 | #define IMX6SX_CLK_ENET_PODF 111 |
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| 121 | #define IMX6SX_CLK_M4_PODF 112 |
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| 122 | #define IMX6SX_CLK_ECSPI_PODF 113 |
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| 123 | #define IMX6SX_CLK_LCDIF1_PRED 114 |
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| 124 | #define IMX6SX_CLK_LCDIF2_PRED 115 |
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| 125 | #define IMX6SX_CLK_DISPLAY_PODF 116 |
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| 126 | #define IMX6SX_CLK_CSI_PODF 117 |
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| 127 | #define IMX6SX_CLK_LDB_DI0_DIV_3_5 118 |
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| 128 | #define IMX6SX_CLK_LDB_DI0_DIV_7 119 |
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| 129 | #define IMX6SX_CLK_LDB_DI1_DIV_3_5 120 |
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| 130 | #define IMX6SX_CLK_LDB_DI1_DIV_7 121 |
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| 131 | #define IMX6SX_CLK_CKO1_PODF 122 |
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| 132 | #define IMX6SX_CLK_CKO2_PODF 123 |
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| 133 | #define IMX6SX_CLK_PERIPH 124 |
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| 134 | #define IMX6SX_CLK_PERIPH2 125 |
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| 135 | #define IMX6SX_CLK_OCRAM 126 |
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| 136 | #define IMX6SX_CLK_AHB 127 |
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| 137 | #define IMX6SX_CLK_MMDC_PODF 128 |
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| 138 | #define IMX6SX_CLK_ARM 129 |
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| 139 | #define IMX6SX_CLK_AIPS_TZ1 130 |
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| 140 | #define IMX6SX_CLK_AIPS_TZ2 131 |
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| 141 | #define IMX6SX_CLK_APBH_DMA 132 |
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| 142 | #define IMX6SX_CLK_ASRC_GATE 133 |
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| 143 | #define IMX6SX_CLK_CAAM_MEM 134 |
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| 144 | #define IMX6SX_CLK_CAAM_ACLK 135 |
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| 145 | #define IMX6SX_CLK_CAAM_IPG 136 |
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| 146 | #define IMX6SX_CLK_CAN1_IPG 137 |
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| 147 | #define IMX6SX_CLK_CAN1_SERIAL 138 |
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| 148 | #define IMX6SX_CLK_CAN2_IPG 139 |
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| 149 | #define IMX6SX_CLK_CAN2_SERIAL 140 |
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| 150 | #define IMX6SX_CLK_CPU_DEBUG 141 |
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| 151 | #define IMX6SX_CLK_DCIC1 142 |
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| 152 | #define IMX6SX_CLK_DCIC2 143 |
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| 153 | #define IMX6SX_CLK_AIPS_TZ3 144 |
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| 154 | #define IMX6SX_CLK_ECSPI1 145 |
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| 155 | #define IMX6SX_CLK_ECSPI2 146 |
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| 156 | #define IMX6SX_CLK_ECSPI3 147 |
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| 157 | #define IMX6SX_CLK_ECSPI4 148 |
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| 158 | #define IMX6SX_CLK_ECSPI5 149 |
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| 159 | #define IMX6SX_CLK_EPIT1 150 |
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| 160 | #define IMX6SX_CLK_EPIT2 151 |
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| 161 | #define IMX6SX_CLK_ESAI_EXTAL 152 |
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| 162 | #define IMX6SX_CLK_WAKEUP 153 |
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| 163 | #define IMX6SX_CLK_GPT_BUS 154 |
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| 164 | #define IMX6SX_CLK_GPT_SERIAL 155 |
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| 165 | #define IMX6SX_CLK_GPU 156 |
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| 166 | #define IMX6SX_CLK_OCRAM_S 157 |
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| 167 | #define IMX6SX_CLK_CANFD 158 |
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| 168 | #define IMX6SX_CLK_CSI 159 |
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| 169 | #define IMX6SX_CLK_I2C1 160 |
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| 170 | #define IMX6SX_CLK_I2C2 161 |
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| 171 | #define IMX6SX_CLK_I2C3 162 |
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| 172 | #define IMX6SX_CLK_OCOTP 163 |
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| 173 | #define IMX6SX_CLK_IOMUXC 164 |
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| 174 | #define IMX6SX_CLK_IPMUX1 165 |
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| 175 | #define IMX6SX_CLK_IPMUX2 166 |
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| 176 | #define IMX6SX_CLK_IPMUX3 167 |
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| 177 | #define IMX6SX_CLK_TZASC1 168 |
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| 178 | #define IMX6SX_CLK_LCDIF_APB 169 |
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| 179 | #define IMX6SX_CLK_PXP_AXI 170 |
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| 180 | #define IMX6SX_CLK_M4 171 |
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| 181 | #define IMX6SX_CLK_ENET 172 |
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| 182 | #define IMX6SX_CLK_DISPLAY_AXI 173 |
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| 183 | #define IMX6SX_CLK_LCDIF2_PIX 174 |
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| 184 | #define IMX6SX_CLK_LCDIF1_PIX 175 |
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| 185 | #define IMX6SX_CLK_LDB_DI0 176 |
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| 186 | #define IMX6SX_CLK_QSPI1 177 |
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| 187 | #define IMX6SX_CLK_MLB 178 |
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| 188 | #define IMX6SX_CLK_MMDC_P0_FAST 179 |
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| 189 | #define IMX6SX_CLK_MMDC_P0_IPG 180 |
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| 190 | #define IMX6SX_CLK_AXI 181 |
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| 191 | #define IMX6SX_CLK_PCIE_AXI 182 |
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| 192 | #define IMX6SX_CLK_QSPI2 183 |
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| 193 | #define IMX6SX_CLK_PER1_BCH 184 |
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| 194 | #define IMX6SX_CLK_PER2_MAIN 185 |
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| 195 | #define IMX6SX_CLK_PWM1 186 |
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| 196 | #define IMX6SX_CLK_PWM2 187 |
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| 197 | #define IMX6SX_CLK_PWM3 188 |
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| 198 | #define IMX6SX_CLK_PWM4 189 |
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| 199 | #define IMX6SX_CLK_GPMI_BCH_APB 190 |
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| 200 | #define IMX6SX_CLK_GPMI_BCH 191 |
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| 201 | #define IMX6SX_CLK_GPMI_IO 192 |
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| 202 | #define IMX6SX_CLK_GPMI_APB 193 |
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| 203 | #define IMX6SX_CLK_ROM 194 |
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| 204 | #define IMX6SX_CLK_SDMA 195 |
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| 205 | #define IMX6SX_CLK_SPBA 196 |
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| 206 | #define IMX6SX_CLK_SPDIF 197 |
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| 207 | #define IMX6SX_CLK_SSI1_IPG 198 |
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| 208 | #define IMX6SX_CLK_SSI2_IPG 199 |
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| 209 | #define IMX6SX_CLK_SSI3_IPG 200 |
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| 210 | #define IMX6SX_CLK_SSI1 201 |
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| 211 | #define IMX6SX_CLK_SSI2 202 |
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| 212 | #define IMX6SX_CLK_SSI3 203 |
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| 213 | #define IMX6SX_CLK_UART_IPG 204 |
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| 214 | #define IMX6SX_CLK_UART_SERIAL 205 |
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| 215 | #define IMX6SX_CLK_SAI1 206 |
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| 216 | #define IMX6SX_CLK_SAI2 207 |
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| 217 | #define IMX6SX_CLK_USBOH3 208 |
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| 218 | #define IMX6SX_CLK_USDHC1 209 |
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| 219 | #define IMX6SX_CLK_USDHC2 210 |
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| 220 | #define IMX6SX_CLK_USDHC3 211 |
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| 221 | #define IMX6SX_CLK_USDHC4 212 |
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| 222 | #define IMX6SX_CLK_EIM_SLOW 213 |
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| 223 | #define IMX6SX_CLK_PWM8 214 |
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| 224 | #define IMX6SX_CLK_VADC 215 |
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| 225 | #define IMX6SX_CLK_GIS 216 |
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| 226 | #define IMX6SX_CLK_I2C4 217 |
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| 227 | #define IMX6SX_CLK_PWM5 218 |
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| 228 | #define IMX6SX_CLK_PWM6 219 |
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| 229 | #define IMX6SX_CLK_PWM7 220 |
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| 230 | #define IMX6SX_CLK_CKO1 221 |
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| 231 | #define IMX6SX_CLK_CKO2 222 |
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| 232 | #define IMX6SX_CLK_IPP_DI0 223 |
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| 233 | #define IMX6SX_CLK_IPP_DI1 224 |
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| 234 | #define IMX6SX_CLK_ENET_AHB 225 |
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| 235 | #define IMX6SX_CLK_OCRAM_PODF 226 |
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| 236 | #define IMX6SX_CLK_GPT_3M 227 |
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| 237 | #define IMX6SX_CLK_ENET_PTP 228 |
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| 238 | #define IMX6SX_CLK_ENET_PTP_REF 229 |
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| 239 | #define IMX6SX_CLK_ENET2_REF 230 |
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| 240 | #define IMX6SX_CLK_ENET2_REF_125M 231 |
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| 241 | #define IMX6SX_CLK_AUDIO 232 |
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| 242 | #define IMX6SX_CLK_LVDS1_SEL 233 |
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| 243 | #define IMX6SX_CLK_LVDS1_OUT 234 |
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| 244 | #define IMX6SX_CLK_ASRC_IPG 235 |
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| 245 | #define IMX6SX_CLK_ASRC_MEM 236 |
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| 246 | #define IMX6SX_CLK_SAI1_IPG 237 |
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| 247 | #define IMX6SX_CLK_SAI2_IPG 238 |
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| 248 | #define IMX6SX_CLK_ESAI_IPG 239 |
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| 249 | #define IMX6SX_CLK_ESAI_MEM 240 |
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| 250 | #define IMX6SX_CLK_LVDS1_IN 241 |
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| 251 | #define IMX6SX_CLK_ANACLK1 242 |
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| 252 | #define IMX6SX_PLL1_BYPASS_SRC 243 |
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| 253 | #define IMX6SX_PLL2_BYPASS_SRC 244 |
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| 254 | #define IMX6SX_PLL3_BYPASS_SRC 245 |
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| 255 | #define IMX6SX_PLL4_BYPASS_SRC 246 |
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| 256 | #define IMX6SX_PLL5_BYPASS_SRC 247 |
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| 257 | #define IMX6SX_PLL6_BYPASS_SRC 248 |
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| 258 | #define IMX6SX_PLL7_BYPASS_SRC 249 |
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| 259 | #define IMX6SX_CLK_PLL1 250 |
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| 260 | #define IMX6SX_CLK_PLL2 251 |
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| 261 | #define IMX6SX_CLK_PLL3 252 |
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| 262 | #define IMX6SX_CLK_PLL4 253 |
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| 263 | #define IMX6SX_CLK_PLL5 254 |
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| 264 | #define IMX6SX_CLK_PLL6 255 |
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| 265 | #define IMX6SX_CLK_PLL7 256 |
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| 266 | #define IMX6SX_PLL1_BYPASS 257 |
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| 267 | #define IMX6SX_PLL2_BYPASS 258 |
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| 268 | #define IMX6SX_PLL3_BYPASS 259 |
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| 269 | #define IMX6SX_PLL4_BYPASS 260 |
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| 270 | #define IMX6SX_PLL5_BYPASS 261 |
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| 271 | #define IMX6SX_PLL6_BYPASS 262 |
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| 272 | #define IMX6SX_PLL7_BYPASS 263 |
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| 273 | #define IMX6SX_CLK_SPDIF_GCLK 264 |
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| 274 | #define IMX6SX_CLK_LVDS2_SEL 265 |
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| 275 | #define IMX6SX_CLK_LVDS2_OUT 266 |
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| 276 | #define IMX6SX_CLK_LVDS2_IN 267 |
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| 277 | #define IMX6SX_CLK_ANACLK2 268 |
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| 278 | #define IMX6SX_CLK_MMDC_P1_IPG 269 |
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| 279 | #define IMX6SX_CLK_CLK_END 270 |
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| 280 | |
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| 281 | #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */ |
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| 282 | |
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