1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * This header provides constants for the reset controller |
4 | * based peripheral powerdown requests on the STMicroelectronics |
5 | * STiH407 SoC. |
6 | */ |
7 | #ifndef _DT_BINDINGS_RESET_CONTROLLER_STIH407 |
8 | #define _DT_BINDINGS_RESET_CONTROLLER_STIH407 |
9 | |
10 | /* Powerdown requests control 0 */ |
11 | #define STIH407_EMISS_POWERDOWN 0 |
12 | #define STIH407_NAND_POWERDOWN 1 |
13 | |
14 | /* Synp GMAC PowerDown */ |
15 | #define STIH407_ETH1_POWERDOWN 2 |
16 | |
17 | /* Powerdown requests control 1 */ |
18 | #define STIH407_USB3_POWERDOWN 3 |
19 | #define STIH407_USB2_PORT1_POWERDOWN 4 |
20 | #define STIH407_USB2_PORT0_POWERDOWN 5 |
21 | #define STIH407_PCIE1_POWERDOWN 6 |
22 | #define STIH407_PCIE0_POWERDOWN 7 |
23 | #define STIH407_SATA1_POWERDOWN 8 |
24 | #define STIH407_SATA0_POWERDOWN 9 |
25 | |
26 | /* Reset defines */ |
27 | #define STIH407_ETH1_SOFTRESET 0 |
28 | #define STIH407_MMC1_SOFTRESET 1 |
29 | #define STIH407_PICOPHY_SOFTRESET 2 |
30 | #define STIH407_IRB_SOFTRESET 3 |
31 | #define STIH407_PCIE0_SOFTRESET 4 |
32 | #define STIH407_PCIE1_SOFTRESET 5 |
33 | #define STIH407_SATA0_SOFTRESET 6 |
34 | #define STIH407_SATA1_SOFTRESET 7 |
35 | #define STIH407_MIPHY0_SOFTRESET 8 |
36 | #define STIH407_MIPHY1_SOFTRESET 9 |
37 | #define STIH407_MIPHY2_SOFTRESET 10 |
38 | #define STIH407_SATA0_PWR_SOFTRESET 11 |
39 | #define STIH407_SATA1_PWR_SOFTRESET 12 |
40 | #define STIH407_DELTA_SOFTRESET 13 |
41 | #define STIH407_BLITTER_SOFTRESET 14 |
42 | #define STIH407_HDTVOUT_SOFTRESET 15 |
43 | #define STIH407_HDQVDP_SOFTRESET 16 |
44 | #define STIH407_VDP_AUX_SOFTRESET 17 |
45 | #define STIH407_COMPO_SOFTRESET 18 |
46 | #define STIH407_HDMI_TX_PHY_SOFTRESET 19 |
47 | #define STIH407_JPEG_DEC_SOFTRESET 20 |
48 | #define STIH407_VP8_DEC_SOFTRESET 21 |
49 | #define STIH407_GPU_SOFTRESET 22 |
50 | #define STIH407_HVA_SOFTRESET 23 |
51 | #define STIH407_ERAM_HVA_SOFTRESET 24 |
52 | #define STIH407_LPM_SOFTRESET 25 |
53 | #define STIH407_KEYSCAN_SOFTRESET 26 |
54 | #define STIH407_USB2_PORT0_SOFTRESET 27 |
55 | #define STIH407_USB2_PORT1_SOFTRESET 28 |
56 | #define STIH407_ST231_AUD_SOFTRESET 29 |
57 | #define STIH407_ST231_DMU_SOFTRESET 30 |
58 | #define STIH407_ST231_GP0_SOFTRESET 31 |
59 | #define STIH407_ST231_GP1_SOFTRESET 32 |
60 | |
61 | /* Picophy reset defines */ |
62 | #define STIH407_PICOPHY0_RESET 0 |
63 | #define STIH407_PICOPHY1_RESET 1 |
64 | #define STIH407_PICOPHY2_RESET 2 |
65 | |
66 | #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH407 */ |
67 | |