1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
4 | * I/O routines for GF1/InterWave synthesizer chips |
5 | */ |
6 | |
7 | #include <linux/delay.h> |
8 | #include <linux/time.h> |
9 | #include <sound/core.h> |
10 | #include <sound/gus.h> |
11 | |
12 | void snd_gf1_delay(struct snd_gus_card * gus) |
13 | { |
14 | int i; |
15 | |
16 | for (i = 0; i < 6; i++) { |
17 | mb(); |
18 | inb(GUSP(gus, DRAM)); |
19 | } |
20 | } |
21 | |
22 | /* |
23 | * ======================================================================= |
24 | */ |
25 | |
26 | /* |
27 | * ok.. stop of control registers (wave & ramp) need some special things.. |
28 | * big UltraClick (tm) elimination... |
29 | */ |
30 | |
31 | static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg) |
32 | { |
33 | unsigned char value; |
34 | |
35 | outb(value: reg | 0x80, port: gus->gf1.reg_regsel); |
36 | mb(); |
37 | value = inb(port: gus->gf1.reg_data8); |
38 | mb(); |
39 | outb(value: reg, port: gus->gf1.reg_regsel); |
40 | mb(); |
41 | outb(value: (value | 0x03) & ~(0x80 | 0x20), port: gus->gf1.reg_data8); |
42 | mb(); |
43 | } |
44 | |
45 | static inline void __snd_gf1_write8(struct snd_gus_card * gus, |
46 | unsigned char reg, |
47 | unsigned char data) |
48 | { |
49 | outb(value: reg, port: gus->gf1.reg_regsel); |
50 | mb(); |
51 | outb(value: data, port: gus->gf1.reg_data8); |
52 | mb(); |
53 | } |
54 | |
55 | static inline unsigned char __snd_gf1_look8(struct snd_gus_card * gus, |
56 | unsigned char reg) |
57 | { |
58 | outb(value: reg, port: gus->gf1.reg_regsel); |
59 | mb(); |
60 | return inb(port: gus->gf1.reg_data8); |
61 | } |
62 | |
63 | static inline void __snd_gf1_write16(struct snd_gus_card * gus, |
64 | unsigned char reg, unsigned int data) |
65 | { |
66 | outb(value: reg, port: gus->gf1.reg_regsel); |
67 | mb(); |
68 | outw(value: (unsigned short) data, port: gus->gf1.reg_data16); |
69 | mb(); |
70 | } |
71 | |
72 | static inline unsigned short __snd_gf1_look16(struct snd_gus_card * gus, |
73 | unsigned char reg) |
74 | { |
75 | outb(value: reg, port: gus->gf1.reg_regsel); |
76 | mb(); |
77 | return inw(port: gus->gf1.reg_data16); |
78 | } |
79 | |
80 | static inline void __snd_gf1_adlib_write(struct snd_gus_card * gus, |
81 | unsigned char reg, unsigned char data) |
82 | { |
83 | outb(value: reg, port: gus->gf1.reg_timerctrl); |
84 | inb(port: gus->gf1.reg_timerctrl); |
85 | inb(port: gus->gf1.reg_timerctrl); |
86 | outb(value: data, port: gus->gf1.reg_timerdata); |
87 | inb(port: gus->gf1.reg_timerctrl); |
88 | inb(port: gus->gf1.reg_timerctrl); |
89 | } |
90 | |
91 | static inline void __snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg, |
92 | unsigned int addr, int w_16bit) |
93 | { |
94 | if (gus->gf1.enh_mode) { |
95 | if (w_16bit) |
96 | addr = ((addr >> 1) & ~0x0000000f) | (addr & 0x0000000f); |
97 | __snd_gf1_write8(gus, SNDRV_GF1_VB_UPPER_ADDRESS, data: (unsigned char) ((addr >> 26) & 0x03)); |
98 | } else if (w_16bit) |
99 | addr = (addr & 0x00c0000f) | ((addr & 0x003ffff0) >> 1); |
100 | __snd_gf1_write16(gus, reg, data: (unsigned short) (addr >> 11)); |
101 | __snd_gf1_write16(gus, reg: reg + 1, data: (unsigned short) (addr << 5)); |
102 | } |
103 | |
104 | static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card * gus, |
105 | unsigned char reg, short w_16bit) |
106 | { |
107 | unsigned int res; |
108 | |
109 | res = ((unsigned int) __snd_gf1_look16(gus, reg: reg | 0x80) << 11) & 0xfff800; |
110 | res |= ((unsigned int) __snd_gf1_look16(gus, reg: (reg + 1) | 0x80) >> 5) & 0x0007ff; |
111 | if (gus->gf1.enh_mode) { |
112 | res |= (unsigned int) __snd_gf1_look8(gus, SNDRV_GF1_VB_UPPER_ADDRESS | 0x80) << 26; |
113 | if (w_16bit) |
114 | res = ((res << 1) & 0xffffffe0) | (res & 0x0000000f); |
115 | } else if (w_16bit) |
116 | res = ((res & 0x001ffff0) << 1) | (res & 0x00c0000f); |
117 | return res; |
118 | } |
119 | |
120 | |
121 | /* |
122 | * ======================================================================= |
123 | */ |
124 | |
125 | void snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg) |
126 | { |
127 | __snd_gf1_ctrl_stop(gus, reg); |
128 | } |
129 | |
130 | void snd_gf1_write8(struct snd_gus_card * gus, |
131 | unsigned char reg, |
132 | unsigned char data) |
133 | { |
134 | __snd_gf1_write8(gus, reg, data); |
135 | } |
136 | |
137 | unsigned char snd_gf1_look8(struct snd_gus_card * gus, unsigned char reg) |
138 | { |
139 | return __snd_gf1_look8(gus, reg); |
140 | } |
141 | |
142 | void snd_gf1_write16(struct snd_gus_card * gus, |
143 | unsigned char reg, |
144 | unsigned int data) |
145 | { |
146 | __snd_gf1_write16(gus, reg, data); |
147 | } |
148 | |
149 | unsigned short snd_gf1_look16(struct snd_gus_card * gus, unsigned char reg) |
150 | { |
151 | return __snd_gf1_look16(gus, reg); |
152 | } |
153 | |
154 | void snd_gf1_adlib_write(struct snd_gus_card * gus, |
155 | unsigned char reg, |
156 | unsigned char data) |
157 | { |
158 | __snd_gf1_adlib_write(gus, reg, data); |
159 | } |
160 | |
161 | void snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg, |
162 | unsigned int addr, short w_16bit) |
163 | { |
164 | __snd_gf1_write_addr(gus, reg, addr, w_16bit); |
165 | } |
166 | |
167 | unsigned int snd_gf1_read_addr(struct snd_gus_card * gus, |
168 | unsigned char reg, |
169 | short w_16bit) |
170 | { |
171 | return __snd_gf1_read_addr(gus, reg, w_16bit); |
172 | } |
173 | |
174 | /* |
175 | |
176 | */ |
177 | |
178 | void snd_gf1_i_ctrl_stop(struct snd_gus_card * gus, unsigned char reg) |
179 | { |
180 | unsigned long flags; |
181 | |
182 | spin_lock_irqsave(&gus->reg_lock, flags); |
183 | __snd_gf1_ctrl_stop(gus, reg); |
184 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
185 | } |
186 | |
187 | void snd_gf1_i_write8(struct snd_gus_card * gus, |
188 | unsigned char reg, |
189 | unsigned char data) |
190 | { |
191 | unsigned long flags; |
192 | |
193 | spin_lock_irqsave(&gus->reg_lock, flags); |
194 | __snd_gf1_write8(gus, reg, data); |
195 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
196 | } |
197 | |
198 | unsigned char snd_gf1_i_look8(struct snd_gus_card * gus, unsigned char reg) |
199 | { |
200 | unsigned long flags; |
201 | unsigned char res; |
202 | |
203 | spin_lock_irqsave(&gus->reg_lock, flags); |
204 | res = __snd_gf1_look8(gus, reg); |
205 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
206 | return res; |
207 | } |
208 | |
209 | void snd_gf1_i_write16(struct snd_gus_card * gus, |
210 | unsigned char reg, |
211 | unsigned int data) |
212 | { |
213 | unsigned long flags; |
214 | |
215 | spin_lock_irqsave(&gus->reg_lock, flags); |
216 | __snd_gf1_write16(gus, reg, data); |
217 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
218 | } |
219 | |
220 | unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg) |
221 | { |
222 | unsigned long flags; |
223 | unsigned short res; |
224 | |
225 | spin_lock_irqsave(&gus->reg_lock, flags); |
226 | res = __snd_gf1_look16(gus, reg); |
227 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
228 | return res; |
229 | } |
230 | |
231 | #if 0 |
232 | |
233 | void snd_gf1_i_adlib_write(struct snd_gus_card * gus, |
234 | unsigned char reg, |
235 | unsigned char data) |
236 | { |
237 | unsigned long flags; |
238 | |
239 | spin_lock_irqsave(&gus->reg_lock, flags); |
240 | __snd_gf1_adlib_write(gus, reg, data); |
241 | spin_unlock_irqrestore(&gus->reg_lock, flags); |
242 | } |
243 | |
244 | void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg, |
245 | unsigned int addr, short w_16bit) |
246 | { |
247 | unsigned long flags; |
248 | |
249 | spin_lock_irqsave(&gus->reg_lock, flags); |
250 | __snd_gf1_write_addr(gus, reg, addr, w_16bit); |
251 | spin_unlock_irqrestore(&gus->reg_lock, flags); |
252 | } |
253 | |
254 | #endif /* 0 */ |
255 | |
256 | #ifdef CONFIG_SND_DEBUG |
257 | static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus, |
258 | unsigned char reg, short w_16bit) |
259 | { |
260 | unsigned int res; |
261 | unsigned long flags; |
262 | |
263 | spin_lock_irqsave(&gus->reg_lock, flags); |
264 | res = __snd_gf1_read_addr(gus, reg, w_16bit); |
265 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
266 | return res; |
267 | } |
268 | #endif |
269 | |
270 | /* |
271 | |
272 | */ |
273 | |
274 | void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr) |
275 | { |
276 | outb(value: 0x43, port: gus->gf1.reg_regsel); |
277 | mb(); |
278 | outw(value: (unsigned short) addr, port: gus->gf1.reg_data16); |
279 | mb(); |
280 | outb(value: 0x44, port: gus->gf1.reg_regsel); |
281 | mb(); |
282 | outb(value: (unsigned char) (addr >> 16), port: gus->gf1.reg_data8); |
283 | mb(); |
284 | } |
285 | |
286 | void snd_gf1_poke(struct snd_gus_card * gus, unsigned int addr, unsigned char data) |
287 | { |
288 | unsigned long flags; |
289 | |
290 | spin_lock_irqsave(&gus->reg_lock, flags); |
291 | outb(SNDRV_GF1_GW_DRAM_IO_LOW, port: gus->gf1.reg_regsel); |
292 | mb(); |
293 | outw(value: (unsigned short) addr, port: gus->gf1.reg_data16); |
294 | mb(); |
295 | outb(SNDRV_GF1_GB_DRAM_IO_HIGH, port: gus->gf1.reg_regsel); |
296 | mb(); |
297 | outb(value: (unsigned char) (addr >> 16), port: gus->gf1.reg_data8); |
298 | mb(); |
299 | outb(value: data, port: gus->gf1.reg_dram); |
300 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
301 | } |
302 | |
303 | unsigned char snd_gf1_peek(struct snd_gus_card * gus, unsigned int addr) |
304 | { |
305 | unsigned long flags; |
306 | unsigned char res; |
307 | |
308 | spin_lock_irqsave(&gus->reg_lock, flags); |
309 | outb(SNDRV_GF1_GW_DRAM_IO_LOW, port: gus->gf1.reg_regsel); |
310 | mb(); |
311 | outw(value: (unsigned short) addr, port: gus->gf1.reg_data16); |
312 | mb(); |
313 | outb(SNDRV_GF1_GB_DRAM_IO_HIGH, port: gus->gf1.reg_regsel); |
314 | mb(); |
315 | outb(value: (unsigned char) (addr >> 16), port: gus->gf1.reg_data8); |
316 | mb(); |
317 | res = inb(port: gus->gf1.reg_dram); |
318 | spin_unlock_irqrestore(lock: &gus->reg_lock, flags); |
319 | return res; |
320 | } |
321 | |
322 | #if 0 |
323 | |
324 | void snd_gf1_pokew(struct snd_gus_card * gus, unsigned int addr, unsigned short data) |
325 | { |
326 | unsigned long flags; |
327 | |
328 | #ifdef CONFIG_SND_DEBUG |
329 | if (!gus->interwave) |
330 | snd_printk(KERN_DEBUG "snd_gf1_pokew - GF1!!!\n" ); |
331 | #endif |
332 | spin_lock_irqsave(&gus->reg_lock, flags); |
333 | outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel); |
334 | mb(); |
335 | outw((unsigned short) addr, gus->gf1.reg_data16); |
336 | mb(); |
337 | outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel); |
338 | mb(); |
339 | outb((unsigned char) (addr >> 16), gus->gf1.reg_data8); |
340 | mb(); |
341 | outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel); |
342 | mb(); |
343 | outw(data, gus->gf1.reg_data16); |
344 | spin_unlock_irqrestore(&gus->reg_lock, flags); |
345 | } |
346 | |
347 | unsigned short snd_gf1_peekw(struct snd_gus_card * gus, unsigned int addr) |
348 | { |
349 | unsigned long flags; |
350 | unsigned short res; |
351 | |
352 | #ifdef CONFIG_SND_DEBUG |
353 | if (!gus->interwave) |
354 | snd_printk(KERN_DEBUG "snd_gf1_peekw - GF1!!!\n" ); |
355 | #endif |
356 | spin_lock_irqsave(&gus->reg_lock, flags); |
357 | outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel); |
358 | mb(); |
359 | outw((unsigned short) addr, gus->gf1.reg_data16); |
360 | mb(); |
361 | outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel); |
362 | mb(); |
363 | outb((unsigned char) (addr >> 16), gus->gf1.reg_data8); |
364 | mb(); |
365 | outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel); |
366 | mb(); |
367 | res = inw(gus->gf1.reg_data16); |
368 | spin_unlock_irqrestore(&gus->reg_lock, flags); |
369 | return res; |
370 | } |
371 | |
372 | void snd_gf1_dram_setmem(struct snd_gus_card * gus, unsigned int addr, |
373 | unsigned short value, unsigned int count) |
374 | { |
375 | unsigned long port; |
376 | unsigned long flags; |
377 | |
378 | #ifdef CONFIG_SND_DEBUG |
379 | if (!gus->interwave) |
380 | snd_printk(KERN_DEBUG "snd_gf1_dram_setmem - GF1!!!\n" ); |
381 | #endif |
382 | addr &= ~1; |
383 | count >>= 1; |
384 | port = GUSP(gus, GF1DATALOW); |
385 | spin_lock_irqsave(&gus->reg_lock, flags); |
386 | outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel); |
387 | mb(); |
388 | outw((unsigned short) addr, gus->gf1.reg_data16); |
389 | mb(); |
390 | outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel); |
391 | mb(); |
392 | outb((unsigned char) (addr >> 16), gus->gf1.reg_data8); |
393 | mb(); |
394 | outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel); |
395 | while (count--) |
396 | outw(value, port); |
397 | spin_unlock_irqrestore(&gus->reg_lock, flags); |
398 | } |
399 | |
400 | #endif /* 0 */ |
401 | |
402 | void snd_gf1_select_active_voices(struct snd_gus_card * gus) |
403 | { |
404 | unsigned short voices; |
405 | |
406 | static const unsigned short voices_tbl[32 - 14 + 1] = |
407 | { |
408 | 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843, |
409 | 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293 |
410 | }; |
411 | |
412 | voices = gus->gf1.active_voices; |
413 | if (voices > 32) |
414 | voices = 32; |
415 | if (voices < 14) |
416 | voices = 14; |
417 | if (gus->gf1.enh_mode) |
418 | voices = 32; |
419 | gus->gf1.active_voices = voices; |
420 | gus->gf1.playback_freq = |
421 | gus->gf1.enh_mode ? 44100 : voices_tbl[voices - 14]; |
422 | if (!gus->gf1.enh_mode) { |
423 | snd_gf1_i_write8(gus, SNDRV_GF1_GB_ACTIVE_VOICES, data: 0xc0 | (voices - 1)); |
424 | udelay(100); |
425 | } |
426 | } |
427 | |
428 | #ifdef CONFIG_SND_DEBUG |
429 | |
430 | void snd_gf1_print_voice_registers(struct snd_gus_card * gus) |
431 | { |
432 | unsigned char mode; |
433 | int voice, ctrl; |
434 | |
435 | voice = gus->gf1.active_voice; |
436 | printk(KERN_INFO " -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n" , voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d)); |
437 | printk(KERN_INFO " -%i- GF1 frequency = 0x%x\n" , voice, snd_gf1_i_read16(gus, 1)); |
438 | printk(KERN_INFO " -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n" , voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4), snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4), snd_gf1_i_read_addr(gus, 4, ctrl & 4), snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4)); |
439 | printk(KERN_INFO " -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n" , voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8), snd_gf1_i_read8(gus, 6)); |
440 | printk(KERN_INFO" -%i- GF1 volume = 0x%x\n" , voice, snd_gf1_i_read16(gus, 9)); |
441 | printk(KERN_INFO " -%i- GF1 position = 0x%x (0x%x)\n" , voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4), snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4)); |
442 | if (gus->interwave && snd_gf1_i_read8(gus, reg: 0x19) & 0x01) { /* enhanced mode */ |
443 | mode = snd_gf1_i_read8(gus, reg: 0x15); |
444 | printk(KERN_INFO " -%i- GFA1 mode = 0x%x\n" , voice, mode); |
445 | if (mode & 0x01) { /* Effect processor */ |
446 | printk(KERN_INFO " -%i- GFA1 effect address = 0x%x\n" , voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4)); |
447 | printk(KERN_INFO " -%i- GFA1 effect volume = 0x%x\n" , voice, snd_gf1_i_read16(gus, 0x16)); |
448 | printk(KERN_INFO " -%i- GFA1 effect volume final = 0x%x\n" , voice, snd_gf1_i_read16(gus, 0x1d)); |
449 | printk(KERN_INFO " -%i- GFA1 effect accumulator = 0x%x\n" , voice, snd_gf1_i_read8(gus, 0x14)); |
450 | } |
451 | if (mode & 0x20) { |
452 | printk(KERN_INFO " -%i- GFA1 left offset = 0x%x (%i)\n" , voice, snd_gf1_i_read16(gus, 0x13), snd_gf1_i_read16(gus, 0x13) >> 4); |
453 | printk(KERN_INFO " -%i- GFA1 left offset final = 0x%x (%i)\n" , voice, snd_gf1_i_read16(gus, 0x1c), snd_gf1_i_read16(gus, 0x1c) >> 4); |
454 | printk(KERN_INFO " -%i- GFA1 right offset = 0x%x (%i)\n" , voice, snd_gf1_i_read16(gus, 0x0c), snd_gf1_i_read16(gus, 0x0c) >> 4); |
455 | printk(KERN_INFO " -%i- GFA1 right offset final = 0x%x (%i)\n" , voice, snd_gf1_i_read16(gus, 0x1b), snd_gf1_i_read16(gus, 0x1b) >> 4); |
456 | } else |
457 | printk(KERN_INFO " -%i- GF1 pan = 0x%x\n" , voice, snd_gf1_i_read8(gus, 0x0c)); |
458 | } else |
459 | printk(KERN_INFO " -%i- GF1 pan = 0x%x\n" , voice, snd_gf1_i_read8(gus, 0x0c)); |
460 | } |
461 | |
462 | #if 0 |
463 | |
464 | void snd_gf1_print_global_registers(struct snd_gus_card * gus) |
465 | { |
466 | unsigned char global_mode = 0x00; |
467 | |
468 | printk(KERN_INFO " -G- GF1 active voices = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES)); |
469 | if (gus->interwave) { |
470 | global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE); |
471 | printk(KERN_INFO " -G- GF1 global mode = 0x%x\n" , global_mode); |
472 | } |
473 | if (global_mode & 0x02) /* LFO enabled? */ |
474 | printk(KERN_INFO " -G- GF1 LFO base = 0x%x\n" , snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE)); |
475 | printk(KERN_INFO " -G- GF1 voices IRQ read = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ)); |
476 | printk(KERN_INFO " -G- GF1 DRAM DMA control = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL)); |
477 | printk(KERN_INFO " -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW)); |
478 | printk(KERN_INFO " -G- GF1 DRAM IO high/low = 0x%x/0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW)); |
479 | if (!gus->interwave) |
480 | printk(KERN_INFO " -G- GF1 record DMA control = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL)); |
481 | printk(KERN_INFO " -G- GF1 DRAM IO 16 = 0x%x\n" , snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16)); |
482 | if (gus->gf1.enh_mode) { |
483 | printk(KERN_INFO " -G- GFA1 memory config = 0x%x\n" , snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG)); |
484 | printk(KERN_INFO " -G- GFA1 memory control = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL)); |
485 | printk(KERN_INFO " -G- GFA1 FIFO record base = 0x%x\n" , snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR)); |
486 | printk(KERN_INFO " -G- GFA1 FIFO playback base = 0x%x\n" , snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR)); |
487 | printk(KERN_INFO " -G- GFA1 interleave control = 0x%x\n" , snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE)); |
488 | } |
489 | } |
490 | |
491 | void snd_gf1_print_setup_registers(struct snd_gus_card * gus) |
492 | { |
493 | printk(KERN_INFO " -S- mix control = 0x%x\n" , inb(GUSP(gus, MIXCNTRLREG))); |
494 | printk(KERN_INFO " -S- IRQ status = 0x%x\n" , inb(GUSP(gus, IRQSTAT))); |
495 | printk(KERN_INFO " -S- timer control = 0x%x\n" , inb(GUSP(gus, TIMERCNTRL))); |
496 | printk(KERN_INFO " -S- timer data = 0x%x\n" , inb(GUSP(gus, TIMERDATA))); |
497 | printk(KERN_INFO " -S- status read = 0x%x\n" , inb(GUSP(gus, REGCNTRLS))); |
498 | printk(KERN_INFO " -S- Sound Blaster control = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL)); |
499 | printk(KERN_INFO " -S- AdLib timer 1/2 = 0x%x/0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1), snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2)); |
500 | printk(KERN_INFO " -S- reset = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET)); |
501 | if (gus->interwave) { |
502 | printk(KERN_INFO " -S- compatibility = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY)); |
503 | printk(KERN_INFO " -S- decode control = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL)); |
504 | printk(KERN_INFO " -S- version number = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER)); |
505 | printk(KERN_INFO " -S- MPU-401 emul. control A/B = 0x%x/0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A), snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B)); |
506 | printk(KERN_INFO " -S- emulation IRQ = 0x%x\n" , snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ)); |
507 | } |
508 | } |
509 | |
510 | void snd_gf1_peek_print_block(struct snd_gus_card * gus, unsigned int addr, int count, int w_16bit) |
511 | { |
512 | if (!w_16bit) { |
513 | while (count-- > 0) |
514 | printk(count > 0 ? "%02x:" : "%02x" , snd_gf1_peek(gus, addr++)); |
515 | } else { |
516 | while (count-- > 0) { |
517 | printk(count > 0 ? "%04x:" : "%04x" , snd_gf1_peek(gus, addr) | (snd_gf1_peek(gus, addr + 1) << 8)); |
518 | addr += 2; |
519 | } |
520 | } |
521 | } |
522 | |
523 | #endif /* 0 */ |
524 | |
525 | #endif |
526 | |