1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
4 | * James Courtier-Dutton <James@superbug.co.uk> |
5 | * Oswald Buddenhagen <oswald.buddenhagen@gmx.de> |
6 | * Creative Labs, Inc. |
7 | * |
8 | * Routines for control of EMU10K1 chips |
9 | */ |
10 | |
11 | #include <linux/sched.h> |
12 | #include <linux/delay.h> |
13 | #include <linux/init.h> |
14 | #include <linux/module.h> |
15 | #include <linux/interrupt.h> |
16 | #include <linux/iommu.h> |
17 | #include <linux/pci.h> |
18 | #include <linux/slab.h> |
19 | #include <linux/vmalloc.h> |
20 | #include <linux/mutex.h> |
21 | |
22 | |
23 | #include <sound/core.h> |
24 | #include <sound/emu10k1.h> |
25 | #include <linux/firmware.h> |
26 | #include "p16v.h" |
27 | #include "tina2.h" |
28 | #include "p17v.h" |
29 | |
30 | |
31 | #define HANA_FILENAME "emu/hana.fw" |
32 | #define DOCK_FILENAME "emu/audio_dock.fw" |
33 | #define EMU1010B_FILENAME "emu/emu1010b.fw" |
34 | #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" |
35 | #define EMU0404_FILENAME "emu/emu0404.fw" |
36 | #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" |
37 | |
38 | MODULE_FIRMWARE(HANA_FILENAME); |
39 | MODULE_FIRMWARE(DOCK_FILENAME); |
40 | MODULE_FIRMWARE(EMU1010B_FILENAME); |
41 | MODULE_FIRMWARE(MICRO_DOCK_FILENAME); |
42 | MODULE_FIRMWARE(EMU0404_FILENAME); |
43 | MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); |
44 | |
45 | |
46 | /************************************************************************* |
47 | * EMU10K1 init / done |
48 | *************************************************************************/ |
49 | |
50 | void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) |
51 | { |
52 | snd_emu10k1_ptr_write_multiple(emu, chn: ch, |
53 | DCYSUSV, 0, |
54 | VTFT, VTFT_FILTERTARGET_MASK, |
55 | CVCF, CVCF_CURRENTFILTER_MASK, |
56 | PTRX, 0, |
57 | CPF, 0, |
58 | CCR, 0, |
59 | |
60 | PSST, 0, |
61 | DSL, 0x10, |
62 | CCCA, 0, |
63 | Z1, 0, |
64 | Z2, 0, |
65 | FXRT, 0x32100000, |
66 | |
67 | // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero |
68 | DCYSUSM, 0, |
69 | ATKHLDV, 0, |
70 | ATKHLDM, 0, |
71 | IP, 0, |
72 | IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK, |
73 | PEFE, 0, |
74 | FMMOD, 0, |
75 | TREMFRQ, 24, /* 1 Hz */ |
76 | FM2FRQ2, 24, /* 1 Hz */ |
77 | LFOVAL2, 0, |
78 | LFOVAL1, 0, |
79 | ENVVOL, 0, |
80 | ENVVAL, 0, |
81 | |
82 | REGLIST_END); |
83 | |
84 | /* Audigy extra stuffs */ |
85 | if (emu->audigy) { |
86 | snd_emu10k1_ptr_write_multiple(emu, chn: ch, |
87 | A_CSBA, 0, |
88 | A_CSDC, 0, |
89 | A_CSFE, 0, |
90 | A_CSHG, 0, |
91 | A_FXRT1, 0x03020100, |
92 | A_FXRT2, 0x07060504, |
93 | A_SENDAMOUNTS, 0, |
94 | REGLIST_END); |
95 | } |
96 | } |
97 | |
98 | static const unsigned int spi_dac_init[] = { |
99 | 0x00ff, |
100 | 0x02ff, |
101 | 0x0400, |
102 | 0x0520, |
103 | 0x0600, |
104 | 0x08ff, |
105 | 0x0aff, |
106 | 0x0cff, |
107 | 0x0eff, |
108 | 0x10ff, |
109 | 0x1200, |
110 | 0x1400, |
111 | 0x1480, |
112 | 0x1800, |
113 | 0x1aff, |
114 | 0x1cff, |
115 | 0x1e00, |
116 | 0x0530, |
117 | 0x0602, |
118 | 0x0622, |
119 | 0x1400, |
120 | }; |
121 | |
122 | static const unsigned int i2c_adc_init[][2] = { |
123 | { 0x17, 0x00 }, /* Reset */ |
124 | { 0x07, 0x00 }, /* Timeout */ |
125 | { 0x0b, 0x22 }, /* Interface control */ |
126 | { 0x0c, 0x22 }, /* Master mode control */ |
127 | { 0x0d, 0x08 }, /* Powerdown control */ |
128 | { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ |
129 | { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ |
130 | { 0x10, 0x7b }, /* ALC Control 1 */ |
131 | { 0x11, 0x00 }, /* ALC Control 2 */ |
132 | { 0x12, 0x32 }, /* ALC Control 3 */ |
133 | { 0x13, 0x00 }, /* Noise gate control */ |
134 | { 0x14, 0xa6 }, /* Limiter control */ |
135 | { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ |
136 | }; |
137 | |
138 | static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) |
139 | { |
140 | unsigned int silent_page; |
141 | int ch; |
142 | u32 tmp; |
143 | |
144 | /* disable audio and lock cache */ |
145 | outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | |
146 | HCFG_MUTEBUTTONENABLE, port: emu->port + HCFG); |
147 | |
148 | outl(value: 0, port: emu->port + INTE); |
149 | |
150 | snd_emu10k1_ptr_write_multiple(emu, chn: 0, |
151 | /* reset recording buffers */ |
152 | MICBS, ADCBS_BUFSIZE_NONE, |
153 | MICBA, 0, |
154 | FXBS, ADCBS_BUFSIZE_NONE, |
155 | FXBA, 0, |
156 | ADCBS, ADCBS_BUFSIZE_NONE, |
157 | ADCBA, 0, |
158 | |
159 | /* disable channel interrupt */ |
160 | CLIEL, 0, |
161 | CLIEH, 0, |
162 | |
163 | /* disable stop on loop end */ |
164 | SOLEL, 0, |
165 | SOLEH, 0, |
166 | |
167 | REGLIST_END); |
168 | |
169 | if (emu->audigy) { |
170 | /* set SPDIF bypass mode */ |
171 | snd_emu10k1_ptr_write(emu, SPBYPASS, chn: 0, SPBYPASS_FORMAT); |
172 | /* enable rear left + rear right AC97 slots */ |
173 | snd_emu10k1_ptr_write(emu, AC97SLOT, chn: 0, AC97SLOT_REAR_RIGHT | |
174 | AC97SLOT_REAR_LEFT); |
175 | } |
176 | |
177 | /* init envelope engine */ |
178 | for (ch = 0; ch < NUM_G; ch++) |
179 | snd_emu10k1_voice_init(emu, ch); |
180 | |
181 | snd_emu10k1_ptr_write_multiple(emu, chn: 0, |
182 | SPCS0, emu->spdif_bits[0], |
183 | SPCS1, emu->spdif_bits[1], |
184 | SPCS2, emu->spdif_bits[2], |
185 | REGLIST_END); |
186 | |
187 | if (emu->card_capabilities->emu_model) { |
188 | } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ |
189 | /* Hacks for Alice3 to work independent of haP16V driver */ |
190 | /* Setup SRCMulti_I2S SamplingRate */ |
191 | snd_emu10k1_ptr_write(emu, reg: A_I2S_CAPTURE_RATE, chn: 0, A_I2S_CAPTURE_96000); |
192 | |
193 | /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ |
194 | snd_emu10k1_ptr20_write(emu, SRCSel, chn: 0, data: 0x14); |
195 | /* Setup SRCMulti Input Audio Enable */ |
196 | /* Use 0xFFFFFFFF to enable P16V sounds. */ |
197 | snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, chn: 0, data: 0xFFFFFFFF); |
198 | |
199 | /* Enabled Phased (8-channel) P16V playback */ |
200 | outl(value: 0x0201, port: emu->port + HCFG2); |
201 | /* Set playback routing. */ |
202 | snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, chn: 0, data: 0x78e4); |
203 | } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ |
204 | /* Hacks for Alice3 to work independent of haP16V driver */ |
205 | dev_info(emu->card->dev, "Audigy2 value: Special config.\n" ); |
206 | /* Setup SRCMulti_I2S SamplingRate */ |
207 | snd_emu10k1_ptr_write(emu, reg: A_I2S_CAPTURE_RATE, chn: 0, A_I2S_CAPTURE_96000); |
208 | |
209 | /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ |
210 | snd_emu10k1_ptr20_write(emu, P17V_SRCSel, chn: 0, data: 0x14); |
211 | |
212 | /* Setup SRCMulti Input Audio Enable */ |
213 | snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, chn: 0, data: 0xFF000000); |
214 | |
215 | /* Setup SPDIF Out Audio Enable */ |
216 | /* The Audigy 2 Value has a separate SPDIF out, |
217 | * so no need for a mixer switch |
218 | */ |
219 | snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, chn: 0, data: 0xFF000000); |
220 | |
221 | tmp = inw(port: emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ |
222 | outw(value: tmp, port: emu->port + A_IOCFG); |
223 | } |
224 | if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ |
225 | int size, n; |
226 | |
227 | size = ARRAY_SIZE(spi_dac_init); |
228 | for (n = 0; n < size; n++) |
229 | snd_emu10k1_spi_write(emu, data: spi_dac_init[n]); |
230 | |
231 | snd_emu10k1_ptr20_write(emu, reg: 0x60, chn: 0, data: 0x10); |
232 | /* Enable GPIOs |
233 | * GPIO0: Unknown |
234 | * GPIO1: Speakers-enabled. |
235 | * GPIO2: Unknown |
236 | * GPIO3: Unknown |
237 | * GPIO4: IEC958 Output on. |
238 | * GPIO5: Unknown |
239 | * GPIO6: Unknown |
240 | * GPIO7: Unknown |
241 | */ |
242 | outw(value: 0x76, port: emu->port + A_IOCFG); /* Windows uses 0x3f76 */ |
243 | } |
244 | if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ |
245 | int size, n; |
246 | |
247 | snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, chn: 0, data: 0x2020205f); |
248 | tmp = inw(port: emu->port + A_IOCFG); |
249 | outw(value: tmp | 0x4, port: emu->port + A_IOCFG); /* Set bit 2 for mic input */ |
250 | tmp = inw(port: emu->port + A_IOCFG); |
251 | size = ARRAY_SIZE(i2c_adc_init); |
252 | for (n = 0; n < size; n++) |
253 | snd_emu10k1_i2c_write(emu, reg: i2c_adc_init[n][0], value: i2c_adc_init[n][1]); |
254 | for (n = 0; n < 4; n++) { |
255 | emu->i2c_capture_volume[n][0] = 0xcf; |
256 | emu->i2c_capture_volume[n][1] = 0xcf; |
257 | } |
258 | } |
259 | |
260 | |
261 | snd_emu10k1_ptr_write(emu, PTB, chn: 0, data: emu->ptb_pages.addr); |
262 | snd_emu10k1_ptr_write(emu, TCB, chn: 0, data: 0); /* taken from original driver */ |
263 | snd_emu10k1_ptr_write(emu, TCBS, chn: 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ |
264 | |
265 | silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); |
266 | for (ch = 0; ch < NUM_G; ch++) { |
267 | snd_emu10k1_ptr_write(emu, MAPA, chn: ch, data: silent_page); |
268 | snd_emu10k1_ptr_write(emu, MAPB, chn: ch, data: silent_page); |
269 | } |
270 | |
271 | if (emu->card_capabilities->emu_model) { |
272 | outl(HCFG_AUTOMUTE_ASYNC | |
273 | HCFG_EMU32_SLAVE | |
274 | HCFG_AUDIOENABLE, port: emu->port + HCFG); |
275 | /* |
276 | * Hokay, setup HCFG |
277 | * Mute Disable Audio = 0 |
278 | * Lock Tank Memory = 1 |
279 | * Lock Sound Memory = 0 |
280 | * Auto Mute = 1 |
281 | */ |
282 | } else if (emu->audigy) { |
283 | if (emu->revision == 4) /* audigy2 */ |
284 | outl(HCFG_AUDIOENABLE | |
285 | HCFG_AC3ENABLE_CDSPDIF | |
286 | HCFG_AC3ENABLE_GPSPDIF | |
287 | HCFG_AUTOMUTE | HCFG_JOYENABLE, port: emu->port + HCFG); |
288 | else |
289 | outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, port: emu->port + HCFG); |
290 | /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, |
291 | * e.g. card_capabilities->joystick */ |
292 | } else if (emu->model == 0x20 || |
293 | emu->model == 0xc400 || |
294 | (emu->model == 0x21 && emu->revision < 6)) |
295 | outl(value: HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, port: emu->port + HCFG); |
296 | else |
297 | /* With on-chip joystick */ |
298 | outl(value: HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, port: emu->port + HCFG); |
299 | |
300 | if (enable_ir) { /* enable IR for SB Live */ |
301 | if (emu->card_capabilities->emu_model) { |
302 | ; /* Disable all access to A_IOCFG for the emu1010 */ |
303 | } else if (emu->card_capabilities->i2c_adc) { |
304 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ |
305 | } else if (emu->audigy) { |
306 | u16 reg = inw(port: emu->port + A_IOCFG); |
307 | outw(value: reg | A_IOCFG_GPOUT2, port: emu->port + A_IOCFG); |
308 | udelay(500); |
309 | outw(value: reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, port: emu->port + A_IOCFG); |
310 | udelay(100); |
311 | outw(value: reg, port: emu->port + A_IOCFG); |
312 | } else { |
313 | unsigned int reg = inl(port: emu->port + HCFG); |
314 | outl(value: reg | HCFG_GPOUT2, port: emu->port + HCFG); |
315 | udelay(500); |
316 | outl(value: reg | HCFG_GPOUT1 | HCFG_GPOUT2, port: emu->port + HCFG); |
317 | udelay(100); |
318 | outl(value: reg, port: emu->port + HCFG); |
319 | } |
320 | } |
321 | |
322 | if (emu->card_capabilities->emu_model) { |
323 | ; /* Disable all access to A_IOCFG for the emu1010 */ |
324 | } else if (emu->card_capabilities->i2c_adc) { |
325 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ |
326 | } else if (emu->audigy) { /* enable analog output */ |
327 | u16 reg = inw(port: emu->port + A_IOCFG); |
328 | outw(value: reg | A_IOCFG_GPOUT0, port: emu->port + A_IOCFG); |
329 | } |
330 | |
331 | if (emu->address_mode == 0) { |
332 | /* use 16M in 4G */ |
333 | outl(inl(port: emu->port + HCFG) | HCFG_EXPANDED_MEM, port: emu->port + HCFG); |
334 | } |
335 | |
336 | return 0; |
337 | } |
338 | |
339 | static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) |
340 | { |
341 | /* |
342 | * Enable the audio bit |
343 | */ |
344 | outl(inl(port: emu->port + HCFG) | HCFG_AUDIOENABLE, port: emu->port + HCFG); |
345 | |
346 | /* Enable analog/digital outs on audigy */ |
347 | if (emu->card_capabilities->emu_model) { |
348 | ; /* Disable all access to A_IOCFG for the emu1010 */ |
349 | } else if (emu->card_capabilities->i2c_adc) { |
350 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ |
351 | } else if (emu->audigy) { |
352 | outw(inw(port: emu->port + A_IOCFG) & ~0x44, port: emu->port + A_IOCFG); |
353 | |
354 | if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ |
355 | /* Unmute Analog now. Set GPO6 to 1 for Apollo. |
356 | * This has to be done after init ALice3 I2SOut beyond 48KHz. |
357 | * So, sequence is important. */ |
358 | outw(inw(port: emu->port + A_IOCFG) | 0x0040, port: emu->port + A_IOCFG); |
359 | } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ |
360 | /* Unmute Analog now. */ |
361 | outw(inw(port: emu->port + A_IOCFG) | 0x0060, port: emu->port + A_IOCFG); |
362 | } else { |
363 | /* Disable routing from AC97 line out to Front speakers */ |
364 | outw(inw(port: emu->port + A_IOCFG) | 0x0080, port: emu->port + A_IOCFG); |
365 | } |
366 | } |
367 | |
368 | #if 0 |
369 | { |
370 | unsigned int tmp; |
371 | /* FIXME: the following routine disables LiveDrive-II !! */ |
372 | /* TOSLink detection */ |
373 | emu->tos_link = 0; |
374 | tmp = inl(emu->port + HCFG); |
375 | if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { |
376 | outl(tmp|0x800, emu->port + HCFG); |
377 | udelay(50); |
378 | if (tmp != (inl(emu->port + HCFG) & ~0x800)) { |
379 | emu->tos_link = 1; |
380 | outl(tmp, emu->port + HCFG); |
381 | } |
382 | } |
383 | } |
384 | #endif |
385 | |
386 | if (emu->card_capabilities->emu_model) |
387 | snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE); |
388 | else |
389 | snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); |
390 | } |
391 | |
392 | int snd_emu10k1_done(struct snd_emu10k1 *emu) |
393 | { |
394 | int ch; |
395 | |
396 | outl(value: 0, port: emu->port + INTE); |
397 | |
398 | /* |
399 | * Shutdown the voices |
400 | */ |
401 | for (ch = 0; ch < NUM_G; ch++) { |
402 | snd_emu10k1_ptr_write_multiple(emu, chn: ch, |
403 | DCYSUSV, 0, |
404 | VTFT, 0, |
405 | CVCF, 0, |
406 | PTRX, 0, |
407 | CPF, 0, |
408 | REGLIST_END); |
409 | } |
410 | |
411 | // stop the DSP |
412 | if (emu->audigy) |
413 | snd_emu10k1_ptr_write(emu, A_DBG, chn: 0, A_DBG_SINGLE_STEP); |
414 | else |
415 | snd_emu10k1_ptr_write(emu, DBG, chn: 0, EMU10K1_DBG_SINGLE_STEP); |
416 | |
417 | snd_emu10k1_ptr_write_multiple(emu, chn: 0, |
418 | /* reset recording buffers */ |
419 | MICBS, 0, |
420 | MICBA, 0, |
421 | FXBS, 0, |
422 | FXBA, 0, |
423 | FXWC, 0, |
424 | ADCBS, ADCBS_BUFSIZE_NONE, |
425 | ADCBA, 0, |
426 | TCBS, TCBS_BUFFSIZE_16K, |
427 | TCB, 0, |
428 | |
429 | /* disable channel interrupt */ |
430 | CLIEL, 0, |
431 | CLIEH, 0, |
432 | SOLEL, 0, |
433 | SOLEH, 0, |
434 | |
435 | PTB, 0, |
436 | |
437 | REGLIST_END); |
438 | |
439 | /* disable audio and lock cache */ |
440 | outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, port: emu->port + HCFG); |
441 | |
442 | return 0; |
443 | } |
444 | |
445 | /************************************************************************* |
446 | * ECARD functional implementation |
447 | *************************************************************************/ |
448 | |
449 | /* In A1 Silicon, these bits are in the HC register */ |
450 | #define HOOKN_BIT (1L << 12) |
451 | #define HANDN_BIT (1L << 11) |
452 | #define PULSEN_BIT (1L << 10) |
453 | |
454 | #define EC_GDI1 (1 << 13) |
455 | #define EC_GDI0 (1 << 14) |
456 | |
457 | #define EC_NUM_CONTROL_BITS 20 |
458 | |
459 | #define EC_AC3_DATA_SELN 0x0001L |
460 | #define EC_EE_DATA_SEL 0x0002L |
461 | #define EC_EE_CNTRL_SELN 0x0004L |
462 | #define EC_EECLK 0x0008L |
463 | #define EC_EECS 0x0010L |
464 | #define EC_EESDO 0x0020L |
465 | #define EC_TRIM_CSN 0x0040L |
466 | #define EC_TRIM_SCLK 0x0080L |
467 | #define EC_TRIM_SDATA 0x0100L |
468 | #define EC_TRIM_MUTEN 0x0200L |
469 | #define EC_ADCCAL 0x0400L |
470 | #define EC_ADCRSTN 0x0800L |
471 | #define EC_DACCAL 0x1000L |
472 | #define EC_DACMUTEN 0x2000L |
473 | #define EC_LEDN 0x4000L |
474 | |
475 | #define EC_SPDIF0_SEL_SHIFT 15 |
476 | #define EC_SPDIF1_SEL_SHIFT 17 |
477 | #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) |
478 | #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) |
479 | #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) |
480 | #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) |
481 | #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should |
482 | * be incremented any time the EEPROM's |
483 | * format is changed. */ |
484 | |
485 | #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ |
486 | |
487 | /* Addresses for special values stored in to EEPROM */ |
488 | #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ |
489 | #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ |
490 | #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ |
491 | |
492 | #define EC_LAST_PROMFILE_ADDR 0x2f |
493 | |
494 | #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The |
495 | * can be up to 30 characters in length |
496 | * and is stored as a NULL-terminated |
497 | * ASCII string. Any unused bytes must be |
498 | * filled with zeros */ |
499 | #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ |
500 | |
501 | |
502 | /* Most of this stuff is pretty self-evident. According to the hardware |
503 | * dudes, we need to leave the ADCCAL bit low in order to avoid a DC |
504 | * offset problem. Weird. |
505 | */ |
506 | #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ |
507 | EC_TRIM_CSN) |
508 | |
509 | |
510 | #define EC_DEFAULT_ADC_GAIN 0xC4C4 |
511 | #define EC_DEFAULT_SPDIF0_SEL 0x0 |
512 | #define EC_DEFAULT_SPDIF1_SEL 0x4 |
513 | |
514 | /************************************************************************** |
515 | * @func Clock bits into the Ecard's control latch. The Ecard uses a |
516 | * control latch will is loaded bit-serially by toggling the Modem control |
517 | * lines from function 2 on the E8010. This function hides these details |
518 | * and presents the illusion that we are actually writing to a distinct |
519 | * register. |
520 | */ |
521 | |
522 | static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) |
523 | { |
524 | unsigned short count; |
525 | unsigned int data; |
526 | unsigned long hc_port; |
527 | unsigned int hc_value; |
528 | |
529 | hc_port = emu->port + HCFG; |
530 | hc_value = inl(port: hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); |
531 | outl(value: hc_value, port: hc_port); |
532 | |
533 | for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { |
534 | |
535 | /* Set up the value */ |
536 | data = ((value & 0x1) ? PULSEN_BIT : 0); |
537 | value >>= 1; |
538 | |
539 | outl(value: hc_value | data, port: hc_port); |
540 | |
541 | /* Clock the shift register */ |
542 | outl(value: hc_value | data | HANDN_BIT, port: hc_port); |
543 | outl(value: hc_value | data, port: hc_port); |
544 | } |
545 | |
546 | /* Latch the bits */ |
547 | outl(value: hc_value | HOOKN_BIT, port: hc_port); |
548 | outl(value: hc_value, port: hc_port); |
549 | } |
550 | |
551 | /************************************************************************** |
552 | * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The |
553 | * trim value consists of a 16bit value which is composed of two |
554 | * 8 bit gain/trim values, one for the left channel and one for the |
555 | * right channel. The following table maps from the Gain/Attenuation |
556 | * value in decibels into the corresponding bit pattern for a single |
557 | * channel. |
558 | */ |
559 | |
560 | static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, |
561 | unsigned short gain) |
562 | { |
563 | unsigned int bit; |
564 | |
565 | /* Enable writing to the TRIM registers */ |
566 | snd_emu10k1_ecard_write(emu, value: emu->ecard_ctrl & ~EC_TRIM_CSN); |
567 | |
568 | /* Do it again to insure that we meet hold time requirements */ |
569 | snd_emu10k1_ecard_write(emu, value: emu->ecard_ctrl & ~EC_TRIM_CSN); |
570 | |
571 | for (bit = (1 << 15); bit; bit >>= 1) { |
572 | unsigned int value; |
573 | |
574 | value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); |
575 | |
576 | if (gain & bit) |
577 | value |= EC_TRIM_SDATA; |
578 | |
579 | /* Clock the bit */ |
580 | snd_emu10k1_ecard_write(emu, value); |
581 | snd_emu10k1_ecard_write(emu, value: value | EC_TRIM_SCLK); |
582 | snd_emu10k1_ecard_write(emu, value); |
583 | } |
584 | |
585 | snd_emu10k1_ecard_write(emu, value: emu->ecard_ctrl); |
586 | } |
587 | |
588 | static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) |
589 | { |
590 | unsigned int hc_value; |
591 | |
592 | /* Set up the initial settings */ |
593 | emu->ecard_ctrl = EC_RAW_RUN_MODE | |
594 | EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | |
595 | EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); |
596 | |
597 | /* Step 0: Set the codec type in the hardware control register |
598 | * and enable audio output */ |
599 | hc_value = inl(port: emu->port + HCFG); |
600 | outl(value: hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, port: emu->port + HCFG); |
601 | inl(port: emu->port + HCFG); |
602 | |
603 | /* Step 1: Turn off the led and deassert TRIM_CS */ |
604 | snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); |
605 | |
606 | /* Step 2: Calibrate the ADC and DAC */ |
607 | snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); |
608 | |
609 | /* Step 3: Wait for awhile; XXX We can't get away with this |
610 | * under a real operating system; we'll need to block and wait that |
611 | * way. */ |
612 | snd_emu10k1_wait(emu, wait: 48000); |
613 | |
614 | /* Step 4: Switch off the DAC and ADC calibration. Note |
615 | * That ADC_CAL is actually an inverted signal, so we assert |
616 | * it here to stop calibration. */ |
617 | snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); |
618 | |
619 | /* Step 4: Switch into run mode */ |
620 | snd_emu10k1_ecard_write(emu, value: emu->ecard_ctrl); |
621 | |
622 | /* Step 5: Set the analog input gain */ |
623 | snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); |
624 | |
625 | return 0; |
626 | } |
627 | |
628 | static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) |
629 | { |
630 | unsigned long special_port; |
631 | __always_unused unsigned int value; |
632 | |
633 | /* Special initialisation routine |
634 | * before the rest of the IO-Ports become active. |
635 | */ |
636 | special_port = emu->port + 0x38; |
637 | value = inl(port: special_port); |
638 | outl(value: 0x00d00000, port: special_port); |
639 | value = inl(port: special_port); |
640 | outl(value: 0x00d00001, port: special_port); |
641 | value = inl(port: special_port); |
642 | outl(value: 0x00d0005f, port: special_port); |
643 | value = inl(port: special_port); |
644 | outl(value: 0x00d0007f, port: special_port); |
645 | value = inl(port: special_port); |
646 | outl(value: 0x0090007f, port: special_port); |
647 | value = inl(port: special_port); |
648 | |
649 | snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, chn: 0, data: 0xfefefefe); /* Defaults to 0x30303030 */ |
650 | /* Delay to give time for ADC chip to switch on. It needs 113ms */ |
651 | msleep(msecs: 200); |
652 | return 0; |
653 | } |
654 | |
655 | static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, |
656 | const struct firmware *fw_entry) |
657 | { |
658 | int n, i; |
659 | u16 reg; |
660 | u8 value; |
661 | __always_unused u16 write_post; |
662 | |
663 | if (!fw_entry) |
664 | return -EIO; |
665 | |
666 | /* The FPGA is a Xilinx Spartan IIE XC2S50E */ |
667 | /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ |
668 | /* GPIO7 -> FPGA PGMN |
669 | * GPIO6 -> FPGA CCLK |
670 | * GPIO5 -> FPGA DIN |
671 | * FPGA CONFIG OFF -> FPGA PGMN |
672 | */ |
673 | spin_lock_irq(lock: &emu->emu_lock); |
674 | outw(value: 0x00, port: emu->port + A_GPIO); /* Set PGMN low for 100uS. */ |
675 | write_post = inw(port: emu->port + A_GPIO); |
676 | udelay(100); |
677 | outw(value: 0x80, port: emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ |
678 | write_post = inw(port: emu->port + A_GPIO); |
679 | udelay(100); /* Allow FPGA memory to clean */ |
680 | for (n = 0; n < fw_entry->size; n++) { |
681 | value = fw_entry->data[n]; |
682 | for (i = 0; i < 8; i++) { |
683 | reg = 0x80; |
684 | if (value & 0x1) |
685 | reg = reg | 0x20; |
686 | value = value >> 1; |
687 | outw(value: reg, port: emu->port + A_GPIO); |
688 | write_post = inw(port: emu->port + A_GPIO); |
689 | outw(value: reg | 0x40, port: emu->port + A_GPIO); |
690 | write_post = inw(port: emu->port + A_GPIO); |
691 | } |
692 | } |
693 | /* After programming, set GPIO bit 4 high again. */ |
694 | outw(value: 0x10, port: emu->port + A_GPIO); |
695 | write_post = inw(port: emu->port + A_GPIO); |
696 | spin_unlock_irq(lock: &emu->emu_lock); |
697 | |
698 | return 0; |
699 | } |
700 | |
701 | /* firmware file names, per model, init-fw and dock-fw (optional) */ |
702 | static const char * const firmware_names[5][2] = { |
703 | [EMU_MODEL_EMU1010] = { |
704 | HANA_FILENAME, DOCK_FILENAME |
705 | }, |
706 | [EMU_MODEL_EMU1010B] = { |
707 | EMU1010B_FILENAME, MICRO_DOCK_FILENAME |
708 | }, |
709 | [EMU_MODEL_EMU1616] = { |
710 | EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME |
711 | }, |
712 | [EMU_MODEL_EMU0404] = { |
713 | EMU0404_FILENAME, NULL |
714 | }, |
715 | }; |
716 | |
717 | static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, |
718 | const struct firmware **fw) |
719 | { |
720 | const char *filename; |
721 | int err; |
722 | |
723 | if (!*fw) { |
724 | filename = firmware_names[emu->card_capabilities->emu_model][dock]; |
725 | if (!filename) |
726 | return 0; |
727 | err = request_firmware(fw, name: filename, device: &emu->pci->dev); |
728 | if (err) |
729 | return err; |
730 | } |
731 | |
732 | return snd_emu1010_load_firmware_entry(emu, fw_entry: *fw); |
733 | } |
734 | |
735 | static void emu1010_firmware_work(struct work_struct *work) |
736 | { |
737 | struct snd_emu10k1 *emu; |
738 | u32 tmp, tmp2, reg; |
739 | int err; |
740 | |
741 | emu = container_of(work, struct snd_emu10k1, |
742 | emu1010.firmware_work); |
743 | if (emu->card->shutdown) |
744 | return; |
745 | #ifdef CONFIG_PM_SLEEP |
746 | if (emu->suspend) |
747 | return; |
748 | #endif |
749 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, value: ®); /* OPTIONS: Which cards are attached to the EMU */ |
750 | if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { |
751 | /* Audio Dock attached */ |
752 | /* Return to Audio Dock programming mode */ |
753 | dev_info(emu->card->dev, |
754 | "emu1010: Loading Audio Dock Firmware\n" ); |
755 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, |
756 | EMU_HANA_FPGA_CONFIG_AUDIODOCK); |
757 | err = snd_emu1010_load_firmware(emu, dock: 1, fw: &emu->dock_fw); |
758 | if (err < 0) |
759 | return; |
760 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, value: 0); |
761 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, value: &tmp); |
762 | dev_info(emu->card->dev, |
763 | "emu1010: EMU_HANA+DOCK_ID = 0x%x\n" , tmp); |
764 | if ((tmp & 0x1f) != 0x15) { |
765 | /* FPGA failed to be programmed */ |
766 | dev_info(emu->card->dev, |
767 | "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n" , |
768 | tmp); |
769 | return; |
770 | } |
771 | dev_info(emu->card->dev, |
772 | "emu1010: Audio Dock Firmware loaded\n" ); |
773 | snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, value: &tmp); |
774 | snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, value: &tmp2); |
775 | dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n" , tmp, tmp2); |
776 | /* Sync clocking between 1010 and Dock */ |
777 | /* Allow DLL to settle */ |
778 | msleep(msecs: 10); |
779 | /* Unmute all. Default is muted after a firmware load */ |
780 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); |
781 | } |
782 | } |
783 | |
784 | static void emu1010_clock_work(struct work_struct *work) |
785 | { |
786 | struct snd_emu10k1 *emu; |
787 | struct snd_ctl_elem_id id; |
788 | |
789 | emu = container_of(work, struct snd_emu10k1, |
790 | emu1010.clock_work); |
791 | if (emu->card->shutdown) |
792 | return; |
793 | #ifdef CONFIG_PM_SLEEP |
794 | if (emu->suspend) |
795 | return; |
796 | #endif |
797 | |
798 | spin_lock_irq(lock: &emu->reg_lock); |
799 | // This is the only thing that can actually happen. |
800 | emu->emu1010.clock_source = emu->emu1010.clock_fallback; |
801 | emu->emu1010.wclock = 1 - emu->emu1010.clock_source; |
802 | snd_emu1010_update_clock(emu); |
803 | spin_unlock_irq(lock: &emu->reg_lock); |
804 | snd_ctl_build_ioff(dst_id: &id, src_kctl: emu->ctl_clock_source, offset: 0); |
805 | snd_ctl_notify(card: emu->card, SNDRV_CTL_EVENT_MASK_VALUE, id: &id); |
806 | } |
807 | |
808 | static void emu1010_interrupt(struct snd_emu10k1 *emu) |
809 | { |
810 | u32 sts; |
811 | |
812 | snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, value: &sts); |
813 | if (sts & EMU_HANA_IRQ_DOCK_LOST) { |
814 | /* Audio Dock removed */ |
815 | dev_info(emu->card->dev, "emu1010: Audio Dock detached\n" ); |
816 | /* The hardware auto-mutes all, so we unmute again */ |
817 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); |
818 | } else if (sts & EMU_HANA_IRQ_DOCK) { |
819 | schedule_work(work: &emu->emu1010.firmware_work); |
820 | } |
821 | if (sts & EMU_HANA_IRQ_WCLK_CHANGED) |
822 | schedule_work(work: &emu->emu1010.clock_work); |
823 | } |
824 | |
825 | /* |
826 | * Current status of the driver: |
827 | * ---------------------------- |
828 | * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) |
829 | * * PCM device nb. 2: |
830 | * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops |
831 | * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops |
832 | */ |
833 | static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) |
834 | { |
835 | u32 tmp, tmp2, reg; |
836 | int err; |
837 | |
838 | dev_info(emu->card->dev, "emu1010: Special config.\n" ); |
839 | |
840 | /* Mute, and disable audio and lock cache, just in case. |
841 | * Proper init follows in snd_emu10k1_init(). */ |
842 | outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, port: emu->port + HCFG); |
843 | |
844 | /* Disable 48Volt power to Audio Dock */ |
845 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, value: 0); |
846 | |
847 | /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ |
848 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, value: ®); |
849 | dev_dbg(emu->card->dev, "reg1 = 0x%x\n" , reg); |
850 | if ((reg & 0x3f) == 0x15) { |
851 | /* FPGA netlist already present so clear it */ |
852 | /* Return to programming mode */ |
853 | |
854 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); |
855 | } |
856 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, value: ®); |
857 | dev_dbg(emu->card->dev, "reg2 = 0x%x\n" , reg); |
858 | if ((reg & 0x3f) == 0x15) { |
859 | /* FPGA failed to return to programming mode */ |
860 | dev_info(emu->card->dev, |
861 | "emu1010: FPGA failed to return to programming mode\n" ); |
862 | return -ENODEV; |
863 | } |
864 | dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n" , reg); |
865 | |
866 | err = snd_emu1010_load_firmware(emu, dock: 0, fw: &emu->firmware); |
867 | if (err < 0) { |
868 | dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n" ); |
869 | return err; |
870 | } |
871 | |
872 | /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ |
873 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, value: ®); |
874 | if ((reg & 0x3f) != 0x15) { |
875 | /* FPGA failed to be programmed */ |
876 | dev_info(emu->card->dev, |
877 | "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n" , |
878 | reg); |
879 | return -ENODEV; |
880 | } |
881 | |
882 | dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n" ); |
883 | snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, value: &tmp); |
884 | snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, value: &tmp2); |
885 | dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n" , tmp, tmp2); |
886 | /* Enable 48Volt power to Audio Dock */ |
887 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); |
888 | |
889 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, value: ®); |
890 | dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n" , reg); |
891 | if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) |
892 | schedule_work(work: &emu->emu1010.firmware_work); |
893 | if (emu->card_capabilities->no_adat) { |
894 | emu->emu1010.optical_in = 0; /* IN_SPDIF */ |
895 | emu->emu1010.optical_out = 0; /* OUT_SPDIF */ |
896 | } else { |
897 | /* Optical -> ADAT I/O */ |
898 | emu->emu1010.optical_in = 1; /* IN_ADAT */ |
899 | emu->emu1010.optical_out = 1; /* OUT_ADAT */ |
900 | } |
901 | tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | |
902 | (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); |
903 | snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, value: tmp); |
904 | /* Set no attenuation on Audio Dock pads. */ |
905 | emu->emu1010.adc_pads = 0x00; |
906 | snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, value: emu->emu1010.adc_pads); |
907 | /* Unmute Audio dock DACs, Headphone source DAC-4. */ |
908 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); |
909 | /* DAC PADs. */ |
910 | emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | |
911 | EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; |
912 | snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, value: emu->emu1010.dac_pads); |
913 | /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ |
914 | snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); |
915 | /* MIDI routing */ |
916 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); |
917 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); |
918 | |
919 | emu->gpio_interrupt = emu1010_interrupt; |
920 | // Note: The Audigy INTE is set later |
921 | snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, |
922 | EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED); |
923 | snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, value: ®); // Clear pending IRQs |
924 | |
925 | emu->emu1010.clock_source = 1; /* 48000 */ |
926 | emu->emu1010.clock_fallback = 1; /* 48000 */ |
927 | /* Default WCLK set to 48kHz. */ |
928 | snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); |
929 | /* Word Clock source, Internal 48kHz x1 */ |
930 | emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K; |
931 | snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); |
932 | /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ |
933 | snd_emu1010_update_clock(emu); |
934 | |
935 | // The routes are all set to EMU_SRC_SILENCE due to the reset, |
936 | // so it is safe to simply enable the outputs. |
937 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); |
938 | |
939 | return 0; |
940 | } |
941 | /* |
942 | * Create the EMU10K1 instance |
943 | */ |
944 | |
945 | #ifdef CONFIG_PM_SLEEP |
946 | static int alloc_pm_buffer(struct snd_emu10k1 *emu); |
947 | static void free_pm_buffer(struct snd_emu10k1 *emu); |
948 | #endif |
949 | |
950 | static void snd_emu10k1_free(struct snd_card *card) |
951 | { |
952 | struct snd_emu10k1 *emu = card->private_data; |
953 | |
954 | if (emu->port) { /* avoid access to already used hardware */ |
955 | snd_emu10k1_fx8010_tram_setup(emu, size: 0); |
956 | snd_emu10k1_done(emu); |
957 | snd_emu10k1_free_efx(emu); |
958 | } |
959 | if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { |
960 | /* Disable 48Volt power to Audio Dock */ |
961 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, value: 0); |
962 | } |
963 | cancel_work_sync(work: &emu->emu1010.firmware_work); |
964 | cancel_work_sync(work: &emu->emu1010.clock_work); |
965 | release_firmware(fw: emu->firmware); |
966 | release_firmware(fw: emu->dock_fw); |
967 | snd_util_memhdr_free(hdr: emu->memhdr); |
968 | if (emu->silent_page.area) |
969 | snd_dma_free_pages(dmab: &emu->silent_page); |
970 | if (emu->ptb_pages.area) |
971 | snd_dma_free_pages(dmab: &emu->ptb_pages); |
972 | vfree(addr: emu->page_ptr_table); |
973 | vfree(addr: emu->page_addr_table); |
974 | #ifdef CONFIG_PM_SLEEP |
975 | free_pm_buffer(emu); |
976 | #endif |
977 | } |
978 | |
979 | static const struct snd_emu_chip_details emu_chip_details[] = { |
980 | /* Audigy 5/Rx SB1550 */ |
981 | /* Tested by michael@gernoth.net 28 Mar 2015 */ |
982 | /* DSP: CA10300-IAT LF |
983 | * DAC: Cirrus Logic CS4382-KQZ |
984 | * ADC: Philips 1361T |
985 | * AC97: Sigmatel STAC9750 |
986 | * CA0151: None |
987 | */ |
988 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, |
989 | .driver = "Audigy2" , .name = "SB Audigy 5/Rx [SB1550]" , |
990 | .id = "Audigy2" , |
991 | .emu10k2_chip = 1, |
992 | .ca0108_chip = 1, |
993 | .spk71 = 1, |
994 | .adc_1361t = 1, /* 24 bit capture instead of 16bit */ |
995 | .ac97_chip = 1}, |
996 | /* Audigy4 (Not PRO) SB0610 */ |
997 | /* Tested by James@superbug.co.uk 4th April 2006 */ |
998 | /* A_IOCFG bits |
999 | * Output |
1000 | * 0: ? |
1001 | * 1: ? |
1002 | * 2: ? |
1003 | * 3: 0 - Digital Out, 1 - Line in |
1004 | * 4: ? |
1005 | * 5: ? |
1006 | * 6: ? |
1007 | * 7: ? |
1008 | * Input |
1009 | * 8: ? |
1010 | * 9: ? |
1011 | * A: Green jack sense (Front) |
1012 | * B: ? |
1013 | * C: Black jack sense (Rear/Side Right) |
1014 | * D: Yellow jack sense (Center/LFE/Side Left) |
1015 | * E: ? |
1016 | * F: ? |
1017 | * |
1018 | * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) |
1019 | * 0 - Digital Out |
1020 | * 1 - Line in |
1021 | */ |
1022 | /* Mic input not tested. |
1023 | * Analog CD input not tested |
1024 | * Digital Out not tested. |
1025 | * Line in working. |
1026 | * Audio output 5.1 working. Side outputs not working. |
1027 | */ |
1028 | /* DSP: CA10300-IAT LF |
1029 | * DAC: Cirrus Logic CS4382-KQZ |
1030 | * ADC: Philips 1361T |
1031 | * AC97: Sigmatel STAC9750 |
1032 | * CA0151: None |
1033 | */ |
1034 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, |
1035 | .driver = "Audigy2" , .name = "SB Audigy 4 [SB0610]" , |
1036 | .id = "Audigy2" , |
1037 | .emu10k2_chip = 1, |
1038 | .ca0108_chip = 1, |
1039 | .spk71 = 1, |
1040 | .adc_1361t = 1, /* 24 bit capture instead of 16bit */ |
1041 | .ac97_chip = 1} , |
1042 | /* Audigy 2 Value AC3 out does not work yet. |
1043 | * Need to find out how to turn off interpolators. |
1044 | */ |
1045 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
1046 | /* DSP: CA0108-IAT |
1047 | * DAC: CS4382-KQ |
1048 | * ADC: Philips 1361T |
1049 | * AC97: STAC9750 |
1050 | * CA0151: None |
1051 | */ |
1052 | /* |
1053 | * A_IOCFG Input (GPIO) |
1054 | * 0x400 = Front analog jack plugged in. (Green socket) |
1055 | * 0x1000 = Rear analog jack plugged in. (Black socket) |
1056 | * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) |
1057 | * A_IOCFG Output (GPIO) |
1058 | * 0x60 = Sound out of front Left. |
1059 | * Win sets it to 0xXX61 |
1060 | */ |
1061 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, |
1062 | .driver = "Audigy2" , .name = "SB Audigy 2 Value [SB0400]" , |
1063 | .id = "Audigy2" , |
1064 | .emu10k2_chip = 1, |
1065 | .ca0108_chip = 1, |
1066 | .spk71 = 1, |
1067 | .ac97_chip = 1} , |
1068 | /* Audigy 2 ZS Notebook Cardbus card.*/ |
1069 | /* Tested by James@superbug.co.uk 6th November 2006 */ |
1070 | /* Audio output 7.1/Headphones working. |
1071 | * Digital output working. (AC3 not checked, only PCM) |
1072 | * Audio Mic/Line inputs working. |
1073 | * Digital input not tested. |
1074 | */ |
1075 | /* DSP: Tina2 |
1076 | * DAC: Wolfson WM8768/WM8568 |
1077 | * ADC: Wolfson WM8775 |
1078 | * AC97: None |
1079 | * CA0151: None |
1080 | */ |
1081 | /* Tested by James@superbug.co.uk 4th April 2006 */ |
1082 | /* A_IOCFG bits |
1083 | * Output |
1084 | * 0: Not Used |
1085 | * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. |
1086 | * 2: Analog input 0 = line in, 1 = mic in |
1087 | * 3: Not Used |
1088 | * 4: Digital output 0 = off, 1 = on. |
1089 | * 5: Not Used |
1090 | * 6: Not Used |
1091 | * 7: Not Used |
1092 | * Input |
1093 | * All bits 1 (0x3fxx) means nothing plugged in. |
1094 | * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. |
1095 | * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. |
1096 | * C-D: 2 = Front/Rear/etc, 3 = nothing. |
1097 | * E-F: Always 0 |
1098 | * |
1099 | */ |
1100 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, |
1101 | .driver = "Audigy2" , .name = "Audigy 2 ZS Notebook [SB0530]" , |
1102 | .id = "Audigy2" , |
1103 | .emu10k2_chip = 1, |
1104 | .ca0108_chip = 1, |
1105 | .ca_cardbus_chip = 1, |
1106 | .spi_dac = 1, |
1107 | .i2c_adc = 1, |
1108 | .spk71 = 1} , |
1109 | /* This is MAEM8950 "Mana" */ |
1110 | /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ |
1111 | /* Does NOT support sync daughter card (obviously). */ |
1112 | /* Tested by James@superbug.co.uk 4th Nov 2007. */ |
1113 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, |
1114 | .driver = "Audigy2" , .name = "E-MU 02 CardBus [MAEM8950]" , |
1115 | .id = "EMU1010" , |
1116 | .emu10k2_chip = 1, |
1117 | .ca0108_chip = 1, |
1118 | .ca_cardbus_chip = 1, |
1119 | .spk71 = 1 , |
1120 | .emu_model = EMU_MODEL_EMU1616}, |
1121 | /* Tested by James@superbug.co.uk 4th Nov 2007. */ |
1122 | /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ |
1123 | /* Attach 0202 daughter card to make it an E-MU 1212m, OR a |
1124 | * MicroDock[M] to make it an E-MU 1616[m]. */ |
1125 | /* Does NOT support sync daughter card. */ |
1126 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, |
1127 | .driver = "Audigy2" , .name = "E-MU 1010b PCI [MAEM8960]" , |
1128 | .id = "EMU1010" , |
1129 | .emu10k2_chip = 1, |
1130 | .ca0108_chip = 1, |
1131 | .spk71 = 1, |
1132 | .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ |
1133 | /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ |
1134 | /* This is MAEM8986, 0202 is MAEM8980 */ |
1135 | /* Attach 0202 daughter card to make it an E-MU 1212m, OR a |
1136 | * MicroDockM to make it an E-MU 1616m. The non-m |
1137 | * version was never sold with this card, but should |
1138 | * still work. */ |
1139 | /* Does NOT support sync daughter card. */ |
1140 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, |
1141 | .driver = "Audigy2" , .name = "E-MU 1010 PCIe [MAEM8986]" , |
1142 | .id = "EMU1010" , |
1143 | .emu10k2_chip = 1, |
1144 | .ca0108_chip = 1, |
1145 | .spk71 = 1, |
1146 | .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ |
1147 | /* Tested by James@superbug.co.uk 8th July 2005. */ |
1148 | /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ |
1149 | /* Attach 0202 daughter card to make it an E-MU 1212m, OR an |
1150 | * AudioDock[M] to make it an E-MU 1820[m]. */ |
1151 | /* Supports sync daughter card. */ |
1152 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, |
1153 | .driver = "Audigy2" , .name = "E-MU 1010 [MAEM8810]" , |
1154 | .id = "EMU1010" , |
1155 | .emu10k2_chip = 1, |
1156 | .ca0102_chip = 1, |
1157 | .spk71 = 1, |
1158 | .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ |
1159 | /* This is MAEM8852 "HanaLiteLite" */ |
1160 | /* Supports sync daughter card. */ |
1161 | /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ |
1162 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, |
1163 | .driver = "Audigy2" , .name = "E-MU 0404b PCI [MAEM8852]" , |
1164 | .id = "EMU0404" , |
1165 | .emu10k2_chip = 1, |
1166 | .ca0108_chip = 1, |
1167 | .spk20 = 1, |
1168 | .no_adat = 1, |
1169 | .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ |
1170 | /* This is MAEM8850 "HanaLite" */ |
1171 | /* Supports sync daughter card. */ |
1172 | /* Tested by James@superbug.co.uk 20-3-2007. */ |
1173 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, |
1174 | .driver = "Audigy2" , .name = "E-MU 0404 [MAEM8850]" , |
1175 | .id = "EMU0404" , |
1176 | .emu10k2_chip = 1, |
1177 | .ca0102_chip = 1, |
1178 | .spk20 = 1, |
1179 | .no_adat = 1, |
1180 | .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ |
1181 | /* EMU0404 PCIe */ |
1182 | /* Does NOT support sync daughter card. */ |
1183 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, |
1184 | .driver = "Audigy2" , .name = "E-MU 0404 PCIe [MAEM8984]" , |
1185 | .id = "EMU0404" , |
1186 | .emu10k2_chip = 1, |
1187 | .ca0108_chip = 1, |
1188 | .spk20 = 1, |
1189 | .no_adat = 1, |
1190 | .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ |
1191 | {.vendor = 0x1102, .device = 0x0008, |
1192 | .driver = "Audigy2" , .name = "SB Audigy 2 Value [Unknown]" , |
1193 | .id = "Audigy2" , |
1194 | .emu10k2_chip = 1, |
1195 | .ca0108_chip = 1, |
1196 | .ac97_chip = 1} , |
1197 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
1198 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, |
1199 | .driver = "Audigy2" , .name = "SB Audigy 4 PRO [SB0380]" , |
1200 | .id = "Audigy2" , |
1201 | .emu10k2_chip = 1, |
1202 | .ca0102_chip = 1, |
1203 | .ca0151_chip = 1, |
1204 | .spk71 = 1, |
1205 | .spdif_bug = 1, |
1206 | .ac97_chip = 1} , |
1207 | /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ |
1208 | /* The 0x20061102 does have SB0350 written on it |
1209 | * Just like 0x20021102 |
1210 | */ |
1211 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, |
1212 | .driver = "Audigy2" , .name = "SB Audigy 2 [SB0350b]" , |
1213 | .id = "Audigy2" , |
1214 | .emu10k2_chip = 1, |
1215 | .ca0102_chip = 1, |
1216 | .ca0151_chip = 1, |
1217 | .spk71 = 1, |
1218 | .spdif_bug = 1, |
1219 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1220 | .ac97_chip = 1} , |
1221 | /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by |
1222 | Creative's Windows driver */ |
1223 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, |
1224 | .driver = "Audigy2" , .name = "SB Audigy 2 ZS [SB0350a]" , |
1225 | .id = "Audigy2" , |
1226 | .emu10k2_chip = 1, |
1227 | .ca0102_chip = 1, |
1228 | .ca0151_chip = 1, |
1229 | .spk71 = 1, |
1230 | .spdif_bug = 1, |
1231 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1232 | .ac97_chip = 1} , |
1233 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, |
1234 | .driver = "Audigy2" , .name = "SB Audigy 2 ZS [SB0350]" , |
1235 | .id = "Audigy2" , |
1236 | .emu10k2_chip = 1, |
1237 | .ca0102_chip = 1, |
1238 | .ca0151_chip = 1, |
1239 | .spk71 = 1, |
1240 | .spdif_bug = 1, |
1241 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1242 | .ac97_chip = 1} , |
1243 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, |
1244 | .driver = "Audigy2" , .name = "SB Audigy 2 ZS [SB0360]" , |
1245 | .id = "Audigy2" , |
1246 | .emu10k2_chip = 1, |
1247 | .ca0102_chip = 1, |
1248 | .ca0151_chip = 1, |
1249 | .spk71 = 1, |
1250 | .spdif_bug = 1, |
1251 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1252 | .ac97_chip = 1} , |
1253 | /* Audigy 2 */ |
1254 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
1255 | /* DSP: CA0102-IAT |
1256 | * DAC: CS4382-KQ |
1257 | * ADC: Philips 1361T |
1258 | * AC97: STAC9721 |
1259 | * CA0151: Yes |
1260 | */ |
1261 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, |
1262 | .driver = "Audigy2" , .name = "SB Audigy 2 [SB0240]" , |
1263 | .id = "Audigy2" , |
1264 | .emu10k2_chip = 1, |
1265 | .ca0102_chip = 1, |
1266 | .ca0151_chip = 1, |
1267 | .spk71 = 1, |
1268 | .spdif_bug = 1, |
1269 | .adc_1361t = 1, /* 24 bit capture instead of 16bit */ |
1270 | .ac97_chip = 1} , |
1271 | /* Audigy 2 Platinum EX */ |
1272 | /* Win driver sets A_IOCFG output to 0x1c00 */ |
1273 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, |
1274 | .driver = "Audigy2" , .name = "Audigy 2 Platinum EX [SB0280]" , |
1275 | .id = "Audigy2" , |
1276 | .emu10k2_chip = 1, |
1277 | .ca0102_chip = 1, |
1278 | .ca0151_chip = 1, |
1279 | .spk71 = 1, |
1280 | .spdif_bug = 1} , |
1281 | /* Dell OEM/Creative Labs Audigy 2 ZS */ |
1282 | /* See ALSA bug#1365 */ |
1283 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, |
1284 | .driver = "Audigy2" , .name = "SB Audigy 2 ZS [SB0353]" , |
1285 | .id = "Audigy2" , |
1286 | .emu10k2_chip = 1, |
1287 | .ca0102_chip = 1, |
1288 | .ca0151_chip = 1, |
1289 | .spk71 = 1, |
1290 | .spdif_bug = 1, |
1291 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1292 | .ac97_chip = 1} , |
1293 | /* Audigy 2 Platinum */ |
1294 | /* Win driver sets A_IOCFG output to 0xa00 */ |
1295 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, |
1296 | .driver = "Audigy2" , .name = "SB Audigy 2 Platinum [SB0240P]" , |
1297 | .id = "Audigy2" , |
1298 | .emu10k2_chip = 1, |
1299 | .ca0102_chip = 1, |
1300 | .ca0151_chip = 1, |
1301 | .spk71 = 1, |
1302 | .spdif_bug = 1, |
1303 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1304 | .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ |
1305 | .ac97_chip = 1} , |
1306 | {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, |
1307 | .driver = "Audigy2" , .name = "SB Audigy 2 [Unknown]" , |
1308 | .id = "Audigy2" , |
1309 | .emu10k2_chip = 1, |
1310 | .ca0102_chip = 1, |
1311 | .ca0151_chip = 1, |
1312 | .spdif_bug = 1, |
1313 | .ac97_chip = 1} , |
1314 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, |
1315 | .driver = "Audigy" , .name = "SB Audigy 1 [SB0092]" , |
1316 | .id = "Audigy" , |
1317 | .emu10k2_chip = 1, |
1318 | .ca0102_chip = 1, |
1319 | .ac97_chip = 1} , |
1320 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, |
1321 | .driver = "Audigy" , .name = "SB Audigy 1 ES [SB0160]" , |
1322 | .id = "Audigy" , |
1323 | .emu10k2_chip = 1, |
1324 | .ca0102_chip = 1, |
1325 | .spdif_bug = 1, |
1326 | .ac97_chip = 1} , |
1327 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, |
1328 | .driver = "Audigy" , .name = "SB Audigy 1 [SB0090]" , |
1329 | .id = "Audigy" , |
1330 | .emu10k2_chip = 1, |
1331 | .ca0102_chip = 1, |
1332 | .ac97_chip = 1} , |
1333 | {.vendor = 0x1102, .device = 0x0004, |
1334 | .driver = "Audigy" , .name = "Audigy 1 [Unknown]" , |
1335 | .id = "Audigy" , |
1336 | .emu10k2_chip = 1, |
1337 | .ca0102_chip = 1, |
1338 | .ac97_chip = 1} , |
1339 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, |
1340 | .driver = "EMU10K1" , .name = "SB Live! 5.1 [SB0220]" , |
1341 | .id = "Live" , |
1342 | .emu10k1_chip = 1, |
1343 | .ac97_chip = 1, |
1344 | .sblive51 = 1} , |
1345 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, |
1346 | .driver = "EMU10K1" , .name = "SB Live! [SB0105]" , |
1347 | .id = "Live" , |
1348 | .emu10k1_chip = 1, |
1349 | .ac97_chip = 1, |
1350 | .sblive51 = 1} , |
1351 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, |
1352 | .driver = "EMU10K1" , .name = "SB Live! Value [SB0103]" , |
1353 | .id = "Live" , |
1354 | .emu10k1_chip = 1, |
1355 | .ac97_chip = 1, |
1356 | .sblive51 = 1} , |
1357 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, |
1358 | .driver = "EMU10K1" , .name = "SB Live! Value [SB0101]" , |
1359 | .id = "Live" , |
1360 | .emu10k1_chip = 1, |
1361 | .ac97_chip = 1, |
1362 | .sblive51 = 1} , |
1363 | /* Tested by ALSA bug#1680 26th December 2005 */ |
1364 | /* note: It really has SB0220 written on the card, */ |
1365 | /* but it's SB0228 according to kx.inf */ |
1366 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, |
1367 | .driver = "EMU10K1" , .name = "SB Live! 5.1 Dell OEM [SB0228]" , |
1368 | .id = "Live" , |
1369 | .emu10k1_chip = 1, |
1370 | .ac97_chip = 1, |
1371 | .sblive51 = 1} , |
1372 | /* Tested by Thomas Zehetbauer 27th Aug 2005 */ |
1373 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, |
1374 | .driver = "EMU10K1" , .name = "SB Live! 5.1 [SB0220]" , |
1375 | .id = "Live" , |
1376 | .emu10k1_chip = 1, |
1377 | .ac97_chip = 1, |
1378 | .sblive51 = 1} , |
1379 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, |
1380 | .driver = "EMU10K1" , .name = "SB Live! 5.1" , |
1381 | .id = "Live" , |
1382 | .emu10k1_chip = 1, |
1383 | .ac97_chip = 1, |
1384 | .sblive51 = 1} , |
1385 | /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ |
1386 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, |
1387 | .driver = "EMU10K1" , .name = "SB Live! 5.1 [SB0060]" , |
1388 | .id = "Live" , |
1389 | .emu10k1_chip = 1, |
1390 | .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum |
1391 | * share the same IDs! |
1392 | */ |
1393 | .sblive51 = 1} , |
1394 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, |
1395 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4850]" , |
1396 | .id = "Live" , |
1397 | .emu10k1_chip = 1, |
1398 | .ac97_chip = 1, |
1399 | .sblive51 = 1} , |
1400 | /* SB Live! Platinum */ |
1401 | /* Win driver sets A_IOCFG output to 0 */ |
1402 | /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ |
1403 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, |
1404 | .driver = "EMU10K1" , .name = "SB Live! Platinum [CT4760P]" , |
1405 | .id = "Live" , |
1406 | .emu10k1_chip = 1, |
1407 | .ac97_chip = 1} , |
1408 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, |
1409 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4871]" , |
1410 | .id = "Live" , |
1411 | .emu10k1_chip = 1, |
1412 | .ac97_chip = 1, |
1413 | .sblive51 = 1} , |
1414 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, |
1415 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4831]" , |
1416 | .id = "Live" , |
1417 | .emu10k1_chip = 1, |
1418 | .ac97_chip = 1, |
1419 | .sblive51 = 1} , |
1420 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, |
1421 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4870]" , |
1422 | .id = "Live" , |
1423 | .emu10k1_chip = 1, |
1424 | .ac97_chip = 1, |
1425 | .sblive51 = 1} , |
1426 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
1427 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, |
1428 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4832]" , |
1429 | .id = "Live" , |
1430 | .emu10k1_chip = 1, |
1431 | .ac97_chip = 1, |
1432 | .sblive51 = 1} , |
1433 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, |
1434 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4830]" , |
1435 | .id = "Live" , |
1436 | .emu10k1_chip = 1, |
1437 | .ac97_chip = 1, |
1438 | .sblive51 = 1} , |
1439 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, |
1440 | .driver = "EMU10K1" , .name = "SB PCI512 [CT4790]" , |
1441 | .id = "Live" , |
1442 | .emu10k1_chip = 1, |
1443 | .ac97_chip = 1, |
1444 | .sblive51 = 1} , |
1445 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, |
1446 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4780]" , |
1447 | .id = "Live" , |
1448 | .emu10k1_chip = 1, |
1449 | .ac97_chip = 1, |
1450 | .sblive51 = 1} , |
1451 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, |
1452 | .driver = "EMU10K1" , .name = "E-MU APS [PC545]" , |
1453 | .id = "APS" , |
1454 | .emu10k1_chip = 1, |
1455 | .ecard = 1} , |
1456 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, |
1457 | .driver = "EMU10K1" , .name = "SB Live! [CT4620]" , |
1458 | .id = "Live" , |
1459 | .emu10k1_chip = 1, |
1460 | .ac97_chip = 1, |
1461 | .sblive51 = 1} , |
1462 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, |
1463 | .driver = "EMU10K1" , .name = "SB Live! Value [CT4670]" , |
1464 | .id = "Live" , |
1465 | .emu10k1_chip = 1, |
1466 | .ac97_chip = 1, |
1467 | .sblive51 = 1} , |
1468 | {.vendor = 0x1102, .device = 0x0002, |
1469 | .driver = "EMU10K1" , .name = "SB Live! [Unknown]" , |
1470 | .id = "Live" , |
1471 | .emu10k1_chip = 1, |
1472 | .ac97_chip = 1, |
1473 | .sblive51 = 1} , |
1474 | { } /* terminator */ |
1475 | }; |
1476 | |
1477 | /* |
1478 | * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) |
1479 | * has a problem that from time to time it likes to do few DMA reads a bit |
1480 | * beyond its normal allocation and gets very confused if these reads get |
1481 | * blocked by a IOMMU. |
1482 | * |
1483 | * This behaviour has been observed for the first (reserved) page |
1484 | * (for which it happens multiple times at every playback), often for various |
1485 | * synth pages and sometimes for PCM playback buffers and the page table |
1486 | * memory itself. |
1487 | * |
1488 | * As a workaround let's widen these DMA allocations by an extra page if we |
1489 | * detect that the device is behind a non-passthrough IOMMU. |
1490 | */ |
1491 | static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) |
1492 | { |
1493 | struct iommu_domain *domain; |
1494 | |
1495 | emu->iommu_workaround = false; |
1496 | |
1497 | domain = iommu_get_domain_for_dev(dev: emu->card->dev); |
1498 | if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) |
1499 | return; |
1500 | |
1501 | dev_notice(emu->card->dev, |
1502 | "non-passthrough IOMMU detected, widening DMA allocations" ); |
1503 | emu->iommu_workaround = true; |
1504 | } |
1505 | |
1506 | int snd_emu10k1_create(struct snd_card *card, |
1507 | struct pci_dev *pci, |
1508 | unsigned short extin_mask, |
1509 | unsigned short extout_mask, |
1510 | long max_cache_bytes, |
1511 | int enable_ir, |
1512 | uint subsystem) |
1513 | { |
1514 | struct snd_emu10k1 *emu = card->private_data; |
1515 | int idx, err; |
1516 | int is_audigy; |
1517 | size_t page_table_size; |
1518 | __le32 *pgtbl; |
1519 | unsigned int silent_page; |
1520 | const struct snd_emu_chip_details *c; |
1521 | |
1522 | /* enable PCI device */ |
1523 | err = pcim_enable_device(pdev: pci); |
1524 | if (err < 0) |
1525 | return err; |
1526 | |
1527 | card->private_free = snd_emu10k1_free; |
1528 | emu->card = card; |
1529 | spin_lock_init(&emu->reg_lock); |
1530 | spin_lock_init(&emu->emu_lock); |
1531 | spin_lock_init(&emu->spi_lock); |
1532 | spin_lock_init(&emu->i2c_lock); |
1533 | spin_lock_init(&emu->voice_lock); |
1534 | spin_lock_init(&emu->synth_lock); |
1535 | spin_lock_init(&emu->memblk_lock); |
1536 | mutex_init(&emu->fx8010.lock); |
1537 | INIT_LIST_HEAD(list: &emu->mapped_link_head); |
1538 | INIT_LIST_HEAD(list: &emu->mapped_order_link_head); |
1539 | emu->pci = pci; |
1540 | emu->irq = -1; |
1541 | emu->synth = NULL; |
1542 | emu->get_synth_voice = NULL; |
1543 | INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work); |
1544 | INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work); |
1545 | /* read revision & serial */ |
1546 | emu->revision = pci->revision; |
1547 | pci_read_config_dword(dev: pci, PCI_SUBSYSTEM_VENDOR_ID, val: &emu->serial); |
1548 | pci_read_config_word(dev: pci, PCI_SUBSYSTEM_ID, val: &emu->model); |
1549 | dev_dbg(card->dev, |
1550 | "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n" , |
1551 | pci->vendor, pci->device, emu->serial, emu->model); |
1552 | |
1553 | for (c = emu_chip_details; c->vendor; c++) { |
1554 | if (c->vendor == pci->vendor && c->device == pci->device) { |
1555 | if (subsystem) { |
1556 | if (c->subsystem && (c->subsystem == subsystem)) |
1557 | break; |
1558 | else |
1559 | continue; |
1560 | } else { |
1561 | if (c->subsystem && (c->subsystem != emu->serial)) |
1562 | continue; |
1563 | if (c->revision && c->revision != emu->revision) |
1564 | continue; |
1565 | } |
1566 | break; |
1567 | } |
1568 | } |
1569 | if (c->vendor == 0) { |
1570 | dev_err(card->dev, "emu10k1: Card not recognised\n" ); |
1571 | return -ENOENT; |
1572 | } |
1573 | emu->card_capabilities = c; |
1574 | if (c->subsystem && !subsystem) |
1575 | dev_dbg(card->dev, "Sound card name = %s\n" , c->name); |
1576 | else if (subsystem) |
1577 | dev_dbg(card->dev, "Sound card name = %s, " |
1578 | "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " |
1579 | "Forced to subsystem = 0x%x\n" , c->name, |
1580 | pci->vendor, pci->device, emu->serial, c->subsystem); |
1581 | else |
1582 | dev_dbg(card->dev, "Sound card name = %s, " |
1583 | "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n" , |
1584 | c->name, pci->vendor, pci->device, |
1585 | emu->serial); |
1586 | |
1587 | if (!*card->id && c->id) |
1588 | strscpy(card->id, c->id, sizeof(card->id)); |
1589 | |
1590 | is_audigy = emu->audigy = c->emu10k2_chip; |
1591 | |
1592 | snd_emu10k1_detect_iommu(emu); |
1593 | |
1594 | /* set addressing mode */ |
1595 | emu->address_mode = is_audigy ? 0 : 1; |
1596 | /* set the DMA transfer mask */ |
1597 | emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; |
1598 | if (dma_set_mask_and_coherent(dev: &pci->dev, mask: emu->dma_mask) < 0) { |
1599 | dev_err(card->dev, |
1600 | "architecture does not support PCI busmaster DMA with mask 0x%lx\n" , |
1601 | emu->dma_mask); |
1602 | return -ENXIO; |
1603 | } |
1604 | if (is_audigy) |
1605 | emu->gpr_base = A_FXGPREGBASE; |
1606 | else |
1607 | emu->gpr_base = FXGPREGBASE; |
1608 | |
1609 | err = pci_request_regions(pci, "EMU10K1" ); |
1610 | if (err < 0) |
1611 | return err; |
1612 | emu->port = pci_resource_start(pci, 0); |
1613 | |
1614 | emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; |
1615 | |
1616 | page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : |
1617 | MAXPAGES0); |
1618 | if (snd_emu10k1_alloc_pages_maybe_wider(emu, size: page_table_size, |
1619 | dmab: &emu->ptb_pages) < 0) |
1620 | return -ENOMEM; |
1621 | dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n" , |
1622 | (unsigned long)emu->ptb_pages.addr, |
1623 | (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); |
1624 | |
1625 | emu->page_ptr_table = vmalloc(array_size(sizeof(void *), |
1626 | emu->max_cache_pages)); |
1627 | emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), |
1628 | emu->max_cache_pages)); |
1629 | if (!emu->page_ptr_table || !emu->page_addr_table) |
1630 | return -ENOMEM; |
1631 | |
1632 | if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, |
1633 | dmab: &emu->silent_page) < 0) |
1634 | return -ENOMEM; |
1635 | dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n" , |
1636 | (unsigned long)emu->silent_page.addr, |
1637 | (unsigned long)(emu->silent_page.addr + |
1638 | emu->silent_page.bytes)); |
1639 | |
1640 | emu->memhdr = snd_util_memhdr_new(memsize: emu->max_cache_pages * PAGE_SIZE); |
1641 | if (!emu->memhdr) |
1642 | return -ENOMEM; |
1643 | emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - |
1644 | sizeof(struct snd_util_memblk); |
1645 | |
1646 | pci_set_master(dev: pci); |
1647 | |
1648 | // The masks are not used for Audigy. |
1649 | // FIXME: these should come from the card_capabilites table. |
1650 | if (extin_mask == 0) |
1651 | extin_mask = 0x3fcf; // EXTIN_* |
1652 | if (extout_mask == 0) |
1653 | extout_mask = 0x7fff; // EXTOUT_* |
1654 | emu->fx8010.extin_mask = extin_mask; |
1655 | emu->fx8010.extout_mask = extout_mask; |
1656 | emu->enable_ir = enable_ir; |
1657 | |
1658 | if (emu->card_capabilities->ca_cardbus_chip) { |
1659 | err = snd_emu10k1_cardbus_init(emu); |
1660 | if (err < 0) |
1661 | return err; |
1662 | } |
1663 | if (emu->card_capabilities->ecard) { |
1664 | err = snd_emu10k1_ecard_init(emu); |
1665 | if (err < 0) |
1666 | return err; |
1667 | } else if (emu->card_capabilities->emu_model) { |
1668 | err = snd_emu10k1_emu1010_init(emu); |
1669 | if (err < 0) |
1670 | return err; |
1671 | } else { |
1672 | /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version |
1673 | does not support this, it shouldn't do any harm */ |
1674 | snd_emu10k1_ptr_write(emu, AC97SLOT, chn: 0, |
1675 | AC97SLOT_CNTR|AC97SLOT_LFE); |
1676 | } |
1677 | |
1678 | /* initialize TRAM setup */ |
1679 | emu->fx8010.itram_size = (16 * 1024)/2; |
1680 | emu->fx8010.etram_pages.area = NULL; |
1681 | emu->fx8010.etram_pages.bytes = 0; |
1682 | |
1683 | /* irq handler must be registered after I/O ports are activated */ |
1684 | if (devm_request_irq(dev: &pci->dev, irq: pci->irq, handler: snd_emu10k1_interrupt, |
1685 | IRQF_SHARED, KBUILD_MODNAME, dev_id: emu)) |
1686 | return -EBUSY; |
1687 | emu->irq = pci->irq; |
1688 | card->sync_irq = emu->irq; |
1689 | |
1690 | /* |
1691 | * Init to 0x02109204 : |
1692 | * Clock accuracy = 0 (1000ppm) |
1693 | * Sample Rate = 2 (48kHz) |
1694 | * Audio Channel = 1 (Left of 2) |
1695 | * Source Number = 0 (Unspecified) |
1696 | * Generation Status = 1 (Original for Cat Code 12) |
1697 | * Cat Code = 12 (Digital Signal Mixer) |
1698 | * Mode = 0 (Mode 0) |
1699 | * Emphasis = 0 (None) |
1700 | * CP = 1 (Copyright unasserted) |
1701 | * AN = 0 (Audio data) |
1702 | * P = 0 (Consumer) |
1703 | */ |
1704 | emu->spdif_bits[0] = emu->spdif_bits[1] = |
1705 | emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | |
1706 | SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | |
1707 | SPCS_GENERATIONSTATUS | 0x00001200 | |
1708 | 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; |
1709 | |
1710 | /* Clear silent pages and set up pointers */ |
1711 | memset(emu->silent_page.area, 0, emu->silent_page.bytes); |
1712 | silent_page = emu->silent_page.addr << emu->address_mode; |
1713 | pgtbl = (__le32 *)emu->ptb_pages.area; |
1714 | for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) |
1715 | pgtbl[idx] = cpu_to_le32(silent_page | idx); |
1716 | |
1717 | /* set up voice indices */ |
1718 | for (idx = 0; idx < NUM_G; idx++) |
1719 | emu->voices[idx].number = idx; |
1720 | |
1721 | err = snd_emu10k1_init(emu, enable_ir); |
1722 | if (err < 0) |
1723 | return err; |
1724 | #ifdef CONFIG_PM_SLEEP |
1725 | err = alloc_pm_buffer(emu); |
1726 | if (err < 0) |
1727 | return err; |
1728 | #endif |
1729 | |
1730 | /* Initialize the effect engine */ |
1731 | err = snd_emu10k1_init_efx(emu); |
1732 | if (err < 0) |
1733 | return err; |
1734 | snd_emu10k1_audio_enable(emu); |
1735 | |
1736 | #ifdef CONFIG_SND_PROC_FS |
1737 | snd_emu10k1_proc_init(emu); |
1738 | #endif |
1739 | return 0; |
1740 | } |
1741 | |
1742 | #ifdef CONFIG_PM_SLEEP |
1743 | static const unsigned char saved_regs[] = { |
1744 | CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, |
1745 | FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, |
1746 | ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, |
1747 | TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, |
1748 | MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, |
1749 | SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, |
1750 | 0xff /* end */ |
1751 | }; |
1752 | static const unsigned char saved_regs_audigy[] = { |
1753 | A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, |
1754 | A_FXRT2, A_SENDAMOUNTS, A_FXRT1, |
1755 | 0xff /* end */ |
1756 | }; |
1757 | |
1758 | static int alloc_pm_buffer(struct snd_emu10k1 *emu) |
1759 | { |
1760 | int size; |
1761 | |
1762 | size = ARRAY_SIZE(saved_regs); |
1763 | if (emu->audigy) |
1764 | size += ARRAY_SIZE(saved_regs_audigy); |
1765 | emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); |
1766 | if (!emu->saved_ptr) |
1767 | return -ENOMEM; |
1768 | if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) |
1769 | return -ENOMEM; |
1770 | if (emu->card_capabilities->ca0151_chip && |
1771 | snd_p16v_alloc_pm_buffer(emu) < 0) |
1772 | return -ENOMEM; |
1773 | return 0; |
1774 | } |
1775 | |
1776 | static void free_pm_buffer(struct snd_emu10k1 *emu) |
1777 | { |
1778 | vfree(addr: emu->saved_ptr); |
1779 | snd_emu10k1_efx_free_pm_buffer(emu); |
1780 | if (emu->card_capabilities->ca0151_chip) |
1781 | snd_p16v_free_pm_buffer(emu); |
1782 | } |
1783 | |
1784 | void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) |
1785 | { |
1786 | int i; |
1787 | const unsigned char *reg; |
1788 | unsigned int *val; |
1789 | |
1790 | val = emu->saved_ptr; |
1791 | for (reg = saved_regs; *reg != 0xff; reg++) |
1792 | for (i = 0; i < NUM_G; i++, val++) |
1793 | *val = snd_emu10k1_ptr_read(emu, reg: *reg, chn: i); |
1794 | if (emu->audigy) { |
1795 | for (reg = saved_regs_audigy; *reg != 0xff; reg++) |
1796 | for (i = 0; i < NUM_G; i++, val++) |
1797 | *val = snd_emu10k1_ptr_read(emu, reg: *reg, chn: i); |
1798 | } |
1799 | if (emu->audigy) |
1800 | emu->saved_a_iocfg = inw(port: emu->port + A_IOCFG); |
1801 | emu->saved_hcfg = inl(port: emu->port + HCFG); |
1802 | } |
1803 | |
1804 | void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) |
1805 | { |
1806 | if (emu->card_capabilities->ca_cardbus_chip) |
1807 | snd_emu10k1_cardbus_init(emu); |
1808 | if (emu->card_capabilities->ecard) |
1809 | snd_emu10k1_ecard_init(emu); |
1810 | else if (emu->card_capabilities->emu_model) |
1811 | snd_emu10k1_emu1010_init(emu); |
1812 | else |
1813 | snd_emu10k1_ptr_write(emu, AC97SLOT, chn: 0, AC97SLOT_CNTR|AC97SLOT_LFE); |
1814 | snd_emu10k1_init(emu, enable_ir: emu->enable_ir); |
1815 | } |
1816 | |
1817 | void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) |
1818 | { |
1819 | int i; |
1820 | const unsigned char *reg; |
1821 | unsigned int *val; |
1822 | |
1823 | snd_emu10k1_audio_enable(emu); |
1824 | |
1825 | /* resore for spdif */ |
1826 | if (emu->audigy) |
1827 | outw(value: emu->saved_a_iocfg, port: emu->port + A_IOCFG); |
1828 | outl(value: emu->saved_hcfg, port: emu->port + HCFG); |
1829 | |
1830 | val = emu->saved_ptr; |
1831 | for (reg = saved_regs; *reg != 0xff; reg++) |
1832 | for (i = 0; i < NUM_G; i++, val++) |
1833 | snd_emu10k1_ptr_write(emu, reg: *reg, chn: i, data: *val); |
1834 | if (emu->audigy) { |
1835 | for (reg = saved_regs_audigy; *reg != 0xff; reg++) |
1836 | for (i = 0; i < NUM_G; i++, val++) |
1837 | snd_emu10k1_ptr_write(emu, reg: *reg, chn: i, data: *val); |
1838 | } |
1839 | } |
1840 | #endif |
1841 | |