1	// SPDX-License-Identifier: GPL-2.0-or-later
2	/*
3	* DA7213 ALSA SoC Codec Driver
4	*
5	* Copyright (c) 2013 Dialog Semiconductor
6	*
7	* Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
8	* Based on DA9055 ALSA SoC codec driver.
9	*/
10
11	#include <linux/acpi.h>
12	#include <linux/of.h>
13	#include <linux/property.h>
14	#include <linux/clk.h>
15	#include <linux/delay.h>
16	#include <linux/i2c.h>
17	#include <linux/regmap.h>
18	#include <linux/slab.h>
19	#include <linux/module.h>
20	#include <sound/pcm.h>
21	#include <sound/pcm_params.h>
22	#include <linux/pm_runtime.h>
23	#include <sound/soc.h>
24	#include <sound/initval.h>
25	#include <sound/tlv.h>
26
27	#include <sound/da7213.h>
28	#include "da7213.h"
29
30
31	/* Gain and Volume */
32	static const DECLARE_TLV_DB_RANGE(aux_vol_tlv,
33	/* -54dB */
34	0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
35	/* -52.5dB to 15dB */
36	0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
37	);
38
39	static const DECLARE_TLV_DB_RANGE(digital_gain_tlv,
40	0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
41	/* -78dB to 12dB */
42	0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
43	);
44
45	static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv,
46	0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
47	/* 0dB to 36dB */
48	0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0)
49	);
50
51	static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
52	static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
53	static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
54	static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
55	static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
56	static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
57	static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0);
58	static const DECLARE_TLV_DB_SCALE(da7213_tonegen_gain_tlv, -4500, 300, 0);
59
60	/* ADC and DAC voice mode (8kHz) high pass cutoff value */
61	static const char * const da7213_voice_hpf_corner_txt[] = {
62	"2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
63	};
64
65	static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner,
66	DA7213_DAC_FILTERS1,
67	DA7213_VOICE_HPF_CORNER_SHIFT,
68	da7213_voice_hpf_corner_txt);
69
70	static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner,
71	DA7213_ADC_FILTERS1,
72	DA7213_VOICE_HPF_CORNER_SHIFT,
73	da7213_voice_hpf_corner_txt);
74
75	/* ADC and DAC high pass filter cutoff value */
76	static const char * const da7213_audio_hpf_corner_txt[] = {
77	"Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000"
78	};
79
80	static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner,
81	DA7213_DAC_FILTERS1
82	, DA7213_AUDIO_HPF_CORNER_SHIFT,
83	da7213_audio_hpf_corner_txt);
84
85	static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner,
86	DA7213_ADC_FILTERS1,
87	DA7213_AUDIO_HPF_CORNER_SHIFT,
88	da7213_audio_hpf_corner_txt);
89
90	static const char * const da7213_tonegen_dtmf_key_txt[] = {
91	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D",
92	"*", "#"
93	};
94
95	static const struct soc_enum da7213_tonegen_dtmf_key =
96	SOC_ENUM_SINGLE(DA7213_TONE_GEN_CFG1, DA7213_DTMF_REG_SHIFT,
97	DA7213_DTMF_REG_MAX, da7213_tonegen_dtmf_key_txt);
98
99	static const char * const da7213_tonegen_swg_sel_txt[] = {
100	"Sum", "SWG1", "SWG2", "Sum"
101	};
102
103	static const struct soc_enum da7213_tonegen_swg_sel =
104	SOC_ENUM_SINGLE(DA7213_TONE_GEN_CFG2, DA7213_SWG_SEL_SHIFT,
105	DA7213_SWG_SEL_MAX, da7213_tonegen_swg_sel_txt);
106
107	/* Gain ramping rate value */
108	static const char * const da7213_gain_ramp_rate_txt[] = {
109	"nominal rate * 8", "nominal rate * 16", "nominal rate / 16",
110	"nominal rate / 32"
111	};
112
113	static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate,
114	DA7213_GAIN_RAMP_CTRL,
115	DA7213_GAIN_RAMP_RATE_SHIFT,
116	da7213_gain_ramp_rate_txt);
117
118	/* DAC noise gate setup time value */
119	static const char * const da7213_dac_ng_setup_time_txt[] = {
120	"256 samples", "512 samples", "1024 samples", "2048 samples"
121	};
122
123	static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time,
124	DA7213_DAC_NG_SETUP_TIME,
125	DA7213_DAC_NG_SETUP_TIME_SHIFT,
126	da7213_dac_ng_setup_time_txt);
127
128	/* DAC noise gate rampup rate value */
129	static const char * const da7213_dac_ng_rampup_txt[] = {
130	"0.02 ms/dB", "0.16 ms/dB"
131	};
132
133	static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate,
134	DA7213_DAC_NG_SETUP_TIME,
135	DA7213_DAC_NG_RAMPUP_RATE_SHIFT,
136	da7213_dac_ng_rampup_txt);
137
138	/* DAC noise gate rampdown rate value */
139	static const char * const da7213_dac_ng_rampdown_txt[] = {
140	"0.64 ms/dB", "20.48 ms/dB"
141	};
142
143	static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate,
144	DA7213_DAC_NG_SETUP_TIME,
145	DA7213_DAC_NG_RAMPDN_RATE_SHIFT,
146	da7213_dac_ng_rampdown_txt);
147
148	/* DAC soft mute rate value */
149	static const char * const da7213_dac_soft_mute_rate_txt[] = {
150	"1", "2", "4", "8", "16", "32", "64"
151	};
152
153	static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate,
154	DA7213_DAC_FILTERS5,
155	DA7213_DAC_SOFTMUTE_RATE_SHIFT,
156	da7213_dac_soft_mute_rate_txt);
157
158	/* ALC Attack Rate select */
159	static const char * const da7213_alc_attack_rate_txt[] = {
160	"44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs",
161	"5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
162	};
163
164	static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate,
165	DA7213_ALC_CTRL2,
166	DA7213_ALC_ATTACK_SHIFT,
167	da7213_alc_attack_rate_txt);
168
169	/* ALC Release Rate select */
170	static const char * const da7213_alc_release_rate_txt[] = {
171	"176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs",
172	"11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
173	};
174
175	static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate,
176	DA7213_ALC_CTRL2,
177	DA7213_ALC_RELEASE_SHIFT,
178	da7213_alc_release_rate_txt);
179
180	/* ALC Hold Time select */
181	static const char * const da7213_alc_hold_time_txt[] = {
182	"62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
183	"7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
184	"253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
185	};
186
187	static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time,
188	DA7213_ALC_CTRL3,
189	DA7213_ALC_HOLD_SHIFT,
190	da7213_alc_hold_time_txt);
191
192	/* ALC Input Signal Tracking rate select */
193	static const char * const da7213_alc_integ_rate_txt[] = {
194	"1/4", "1/16", "1/256", "1/65536"
195	};
196
197	static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate,
198	DA7213_ALC_CTRL3,
199	DA7213_ALC_INTEG_ATTACK_SHIFT,
200	da7213_alc_integ_rate_txt);
201
202	static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate,
203	DA7213_ALC_CTRL3,
204	DA7213_ALC_INTEG_RELEASE_SHIFT,
205	da7213_alc_integ_rate_txt);
206
207
208	/*
209	* Control Functions
210	*/
211
212	/* Locked Kcontrol calls */
213	static int da7213_volsw_locked_get(struct snd_kcontrol *kcontrol,
214	struct snd_ctl_elem_value *ucontrol)
215	{
216	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
217	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
218	int ret;
219
220	mutex_lock(&da7213->ctrl_lock);
221	ret = snd_soc_get_volsw(kcontrol, ucontrol);
222	mutex_unlock(lock: &da7213->ctrl_lock);
223
224	return ret;
225	}
226
227	static int da7213_volsw_locked_put(struct snd_kcontrol *kcontrol,
228	struct snd_ctl_elem_value *ucontrol)
229	{
230	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
231	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
232	int ret;
233
234	mutex_lock(&da7213->ctrl_lock);
235	ret = snd_soc_put_volsw(kcontrol, ucontrol);
236	mutex_unlock(lock: &da7213->ctrl_lock);
237
238	return ret;
239	}
240
241	static int da7213_enum_locked_get(struct snd_kcontrol *kcontrol,
242	struct snd_ctl_elem_value *ucontrol)
243	{
244	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
245	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
246	int ret;
247
248	mutex_lock(&da7213->ctrl_lock);
249	ret = snd_soc_get_enum_double(kcontrol, ucontrol);
250	mutex_unlock(lock: &da7213->ctrl_lock);
251
252	return ret;
253	}
254
255	static int da7213_enum_locked_put(struct snd_kcontrol *kcontrol,
256	struct snd_ctl_elem_value *ucontrol)
257	{
258	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
259	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
260	int ret;
261
262	mutex_lock(&da7213->ctrl_lock);
263	ret = snd_soc_put_enum_double(kcontrol, ucontrol);
264	mutex_unlock(lock: &da7213->ctrl_lock);
265
266	return ret;
267	}
268
269	/* ALC */
270	static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val)
271	{
272	int mid_data, top_data;
273	int sum = 0;
274	u8 iteration;
275
276	for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS;
277	iteration++) {
278	/* Select the left or right channel and capture data */
279	snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, val: reg_val);
280
281	/* Select middle 8 bits for read back from data register */
282	snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
283	val: reg_val | DA7213_ALC_DATA_MIDDLE);
284	mid_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
285
286	/* Select top 8 bits for read back from data register */
287	snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
288	val: reg_val | DA7213_ALC_DATA_TOP);
289	top_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
290
291	sum += ((mid_data << 8) | (top_data << 16));
292	}
293
294	return sum / DA7213_ALC_AVG_ITERATIONS;
295	}
296
297	static void da7213_alc_calib_man(struct snd_soc_component *component)
298	{
299	u8 reg_val;
300	int avg_left_data, avg_right_data, offset_l, offset_r;
301
302	/* Calculate average for Left and Right data */
303	/* Left Data */
304	avg_left_data = da7213_get_alc_data(component,
305	DA7213_ALC_CIC_OP_CHANNEL_LEFT);
306	/* Right Data */
307	avg_right_data = da7213_get_alc_data(component,
308	DA7213_ALC_CIC_OP_CHANNEL_RIGHT);
309
310	/* Calculate DC offset */
311	offset_l = -avg_left_data;
312	offset_r = -avg_right_data;
313
314	reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8;
315	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_L, val: reg_val);
316	reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16;
317	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_L, val: reg_val);
318
319	reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8;
320	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_R, val: reg_val);
321	reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16;
322	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_R, val: reg_val);
323
324	/* Enable analog/digital gain mode & offset cancellation */
325	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
326	DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
327	DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
328	}
329
330	static void da7213_alc_calib_auto(struct snd_soc_component *component)
331	{
332	u8 alc_ctrl1;
333
334	/* Begin auto calibration and wait for completion */
335	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
336	DA7213_ALC_AUTO_CALIB_EN);
337	do {
338	alc_ctrl1 = snd_soc_component_read(component, DA7213_ALC_CTRL1);
339	} while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
340
341	/* If auto calibration fails, fall back to digital gain only mode */
342	if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) {
343	dev_warn(component->dev,
344	"ALC auto calibration failed with overflow\n");
345	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
346	DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
347	val: 0);
348	} else {
349	/* Enable analog/digital gain mode & offset cancellation */
350	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
351	DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
352	DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
353	}
354
355	}
356
357	static void da7213_alc_calib(struct snd_soc_component *component)
358	{
359	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
360	u8 adc_l_ctrl, adc_r_ctrl;
361	u8 mixin_l_sel, mixin_r_sel;
362	u8 mic_1_ctrl, mic_2_ctrl;
363
364	/* Save current values from ADC control registers */
365	adc_l_ctrl = snd_soc_component_read(component, DA7213_ADC_L_CTRL);
366	adc_r_ctrl = snd_soc_component_read(component, DA7213_ADC_R_CTRL);
367
368	/* Save current values from MIXIN_L/R_SELECT registers */
369	mixin_l_sel = snd_soc_component_read(component, DA7213_MIXIN_L_SELECT);
370	mixin_r_sel = snd_soc_component_read(component, DA7213_MIXIN_R_SELECT);
371
372	/* Save current values from MIC control registers */
373	mic_1_ctrl = snd_soc_component_read(component, DA7213_MIC_1_CTRL);
374	mic_2_ctrl = snd_soc_component_read(component, DA7213_MIC_2_CTRL);
375
376	/* Enable ADC Left and Right */
377	snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
378	DA7213_ADC_EN);
379	snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, DA7213_ADC_EN,
380	DA7213_ADC_EN);
381
382	/* Enable MIC paths */
383	snd_soc_component_update_bits(component, DA7213_MIXIN_L_SELECT,
384	DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
385	DA7213_MIXIN_L_MIX_SELECT_MIC_2,
386	DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
387	DA7213_MIXIN_L_MIX_SELECT_MIC_2);
388	snd_soc_component_update_bits(component, DA7213_MIXIN_R_SELECT,
389	DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
390	DA7213_MIXIN_R_MIX_SELECT_MIC_1,
391	DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
392	DA7213_MIXIN_R_MIX_SELECT_MIC_1);
393
394	/* Mute MIC PGAs */
395	snd_soc_component_update_bits(component, DA7213_MIC_1_CTRL, DA7213_MUTE_EN,
396	DA7213_MUTE_EN);
397	snd_soc_component_update_bits(component, DA7213_MIC_2_CTRL, DA7213_MUTE_EN,
398	DA7213_MUTE_EN);
399
400	/* Perform calibration */
401	if (da7213->alc_calib_auto)
402	da7213_alc_calib_auto(component);
403	else
404	da7213_alc_calib_man(component);
405
406	/* Restore MIXIN_L/R_SELECT registers to their original states */
407	snd_soc_component_write(component, DA7213_MIXIN_L_SELECT, val: mixin_l_sel);
408	snd_soc_component_write(component, DA7213_MIXIN_R_SELECT, val: mixin_r_sel);
409
410	/* Restore ADC control registers to their original states */
411	snd_soc_component_write(component, DA7213_ADC_L_CTRL, val: adc_l_ctrl);
412	snd_soc_component_write(component, DA7213_ADC_R_CTRL, val: adc_r_ctrl);
413
414	/* Restore original values of MIC control registers */
415	snd_soc_component_write(component, DA7213_MIC_1_CTRL, val: mic_1_ctrl);
416	snd_soc_component_write(component, DA7213_MIC_2_CTRL, val: mic_2_ctrl);
417	}
418
419	static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
420	struct snd_ctl_elem_value *ucontrol)
421	{
422	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
423	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
424	int ret;
425
426	ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
427
428	/* If ALC in operation, make sure calibrated offsets are updated */
429	if ((!ret) && (da7213->alc_en))
430	da7213_alc_calib(component);
431
432	return ret;
433	}
434
435	static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
436	struct snd_ctl_elem_value *ucontrol)
437	{
438	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
439	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
440
441	/* Force ALC offset calibration if enabling ALC */
442	if (ucontrol->value.integer.value[0] ||
443	ucontrol->value.integer.value[1]) {
444	if (!da7213->alc_en) {
445	da7213_alc_calib(component);
446	da7213->alc_en = true;
447	}
448	} else {
449	da7213->alc_en = false;
450	}
451
452	return snd_soc_put_volsw(kcontrol, ucontrol);
453	}
454
455	/* ToneGen */
456	static int da7213_tonegen_freq_get(struct snd_kcontrol *kcontrol,
457	struct snd_ctl_elem_value *ucontrol)
458	{
459	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
460	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
461	struct soc_mixer_control *mixer_ctrl =
462	(struct soc_mixer_control *) kcontrol->private_value;
463	unsigned int reg = mixer_ctrl->reg;
464	__le16 val;
465	int ret;
466
467	mutex_lock(&da7213->ctrl_lock);
468	ret = regmap_raw_read(map: da7213->regmap, reg, val: &val, val_len: sizeof(val));
469	mutex_unlock(lock: &da7213->ctrl_lock);
470
471	if (ret)
472	return ret;
473
474	/*
475	* Frequency value spans two 8-bit registers, lower then upper byte.
476	* Therefore we need to convert to host endianness here.
477	*/
478	ucontrol->value.integer.value[0] = le16_to_cpu(val);
479
480	return 0;
481	}
482
483	static int da7213_tonegen_freq_put(struct snd_kcontrol *kcontrol,
484	struct snd_ctl_elem_value *ucontrol)
485	{
486	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
487	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
488	struct soc_mixer_control *mixer_ctrl =
489	(struct soc_mixer_control *) kcontrol->private_value;
490	unsigned int reg = mixer_ctrl->reg;
491	__le16 val_new, val_old;
492	int ret;
493
494	/*
495	* Frequency value spans two 8-bit registers, lower then upper byte.
496	* Therefore we need to convert to little endian here to align with
497	* HW registers.
498	*/
499	val_new = cpu_to_le16(ucontrol->value.integer.value[0]);
500
501	mutex_lock(&da7213->ctrl_lock);
502	ret = regmap_raw_read(map: da7213->regmap, reg, val: &val_old, val_len: sizeof(val_old));
503	if (ret == 0 && (val_old != val_new))
504	ret = regmap_raw_write(map: da7213->regmap, reg,
505	val: &val_new, val_len: sizeof(val_new));
506	mutex_unlock(lock: &da7213->ctrl_lock);
507
508	if (ret < 0)
509	return ret;
510
511	return val_old != val_new;
512	}
513
514	/*
515	* KControls
516	*/
517
518	static const struct snd_kcontrol_new da7213_snd_controls[] = {
519
520	/* Volume controls */
521	SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN,
522	DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
523	DA7213_NO_INVERT, mic_vol_tlv),
524	SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN,
525	DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
526	DA7213_NO_INVERT, mic_vol_tlv),
527	SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN,
528	DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX,
529	DA7213_NO_INVERT, aux_vol_tlv),
530	SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN,
531	DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT,
532	DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT,
533	snd_soc_get_volsw_2r, da7213_put_mixin_gain,
534	mixin_gain_tlv),
535	SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN,
536	DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX,
537	DA7213_NO_INVERT, digital_gain_tlv),
538	SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN,
539	DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX,
540	DA7213_NO_INVERT, digital_gain_tlv),
541	SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN,
542	DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX,
543	DA7213_NO_INVERT, hp_vol_tlv),
544	SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN,
545	DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX,
546	DA7213_NO_INVERT, lineout_vol_tlv),
547
548	/* DAC Equalizer controls */
549	SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT,
550	DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT),
551	SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2,
552	DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX,
553	DA7213_NO_INVERT, eq_gain_tlv),
554	SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2,
555	DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX,
556	DA7213_NO_INVERT, eq_gain_tlv),
557	SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3,
558	DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX,
559	DA7213_NO_INVERT, eq_gain_tlv),
560	SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3,
561	DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX,
562	DA7213_NO_INVERT, eq_gain_tlv),
563	SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4,
564	DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX,
565	DA7213_NO_INVERT, eq_gain_tlv),
566
567	/* High Pass Filter and Voice Mode controls */
568	SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT,
569	DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
570	SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner),
571	SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1,
572	DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
573	DA7213_NO_INVERT),
574	SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner),
575
576	SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT,
577	DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
578	SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner),
579	SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1,
580	DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
581	DA7213_NO_INVERT),
582	SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner),
583
584	/* Mute controls */
585	SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT,
586	DA7213_MUTE_EN_MAX, DA7213_INVERT),
587	SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT,
588	DA7213_MUTE_EN_MAX, DA7213_INVERT),
589	SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
590	DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
591	SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL,
592	DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT,
593	DA7213_MUTE_EN_MAX, DA7213_INVERT),
594	SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL,
595	DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
596	SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
597	DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
598	SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT,
599	DA7213_MUTE_EN_MAX, DA7213_INVERT),
600	SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5,
601	DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX,
602	DA7213_NO_INVERT),
603	SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate),
604
605	/* Zero Cross controls */
606	SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
607	DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
608	SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL,
609	DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX,
610	DA7213_NO_INVERT),
611	SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
612	DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
613
614	/* Tone Generator */
615	SOC_SINGLE_EXT_TLV("ToneGen Volume", DA7213_TONE_GEN_CFG2,
616	DA7213_TONE_GEN_GAIN_SHIFT, DA7213_TONE_GEN_GAIN_MAX,
617	DA7213_NO_INVERT, da7213_volsw_locked_get,
618	da7213_volsw_locked_put, da7213_tonegen_gain_tlv),
619	SOC_ENUM_EXT("ToneGen DTMF Key", da7213_tonegen_dtmf_key,
620	da7213_enum_locked_get, da7213_enum_locked_put),
621	SOC_SINGLE_EXT("ToneGen DTMF Switch", DA7213_TONE_GEN_CFG1,
622	DA7213_DTMF_EN_SHIFT, DA7213_SWITCH_EN_MAX,
623	DA7213_NO_INVERT, da7213_volsw_locked_get,
624	da7213_volsw_locked_put),
625	SOC_SINGLE_EXT("ToneGen Start", DA7213_TONE_GEN_CFG1,
626	DA7213_START_STOPN_SHIFT, DA7213_SWITCH_EN_MAX,
627	DA7213_NO_INVERT, da7213_volsw_locked_get,
628	da7213_volsw_locked_put),
629	SOC_ENUM_EXT("ToneGen Sinewave Gen Type", da7213_tonegen_swg_sel,
630	da7213_enum_locked_get, da7213_enum_locked_put),
631	SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7213_TONE_GEN_FREQ1_L,
632	DA7213_FREQ1_L_SHIFT, DA7213_FREQ_MAX, DA7213_NO_INVERT,
633	da7213_tonegen_freq_get, da7213_tonegen_freq_put),
634	SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7213_TONE_GEN_FREQ2_L,
635	DA7213_FREQ2_L_SHIFT, DA7213_FREQ_MAX, DA7213_NO_INVERT,
636	da7213_tonegen_freq_get, da7213_tonegen_freq_put),
637	SOC_SINGLE_EXT("ToneGen On Time", DA7213_TONE_GEN_ON_PER,
638	DA7213_BEEP_ON_PER_SHIFT, DA7213_BEEP_ON_OFF_MAX,
639	DA7213_NO_INVERT, da7213_volsw_locked_get,
640	da7213_volsw_locked_put),
641	SOC_SINGLE("ToneGen Off Time", DA7213_TONE_GEN_OFF_PER,
642	DA7213_BEEP_OFF_PER_SHIFT, DA7213_BEEP_ON_OFF_MAX,
643	DA7213_NO_INVERT),
644
645	/* Gain Ramping controls */
646	SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL,
647	DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
648	DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
649	SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL,
650	DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
651	DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
652	SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL,
653	DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
654	DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
655	SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL,
656	DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
657	DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
658	SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL,
659	DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
660	DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
661	SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL,
662	DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX,
663	DA7213_NO_INVERT),
664	SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate),
665
666	/* DAC Noise Gate controls */
667	SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT,
668	DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT),
669	SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time),
670	SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate),
671	SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate),
672	SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD,
673	DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
674	DA7213_NO_INVERT),
675	SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD,
676	DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
677	DA7213_NO_INVERT),
678
679	/* DAC Routing & Inversion */
680	SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC,
681	DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT,
682	DA7213_DAC_MONO_MAX, DA7213_NO_INVERT),
683	SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT,
684	DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX,
685	DA7213_NO_INVERT),
686
687	/* DMIC controls */
688	SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT,
689	DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT,
690	DA7213_DMIC_EN_MAX, DA7213_NO_INVERT),
691
692	/* ALC Controls */
693	SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT,
694	DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX,
695	DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw),
696	SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate),
697	SOC_ENUM("ALC Release Rate", da7213_alc_release_rate),
698	SOC_ENUM("ALC Hold Time", da7213_alc_hold_time),
699	/*
700	* Rate at which input signal envelope is tracked as the signal gets
701	* larger
702	*/
703	SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate),
704	/*
705	* Rate at which input signal envelope is tracked as the signal gets
706	* smaller
707	*/
708	SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate),
709	SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE,
710	DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
711	DA7213_INVERT, alc_threshold_tlv),
712	SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN,
713	DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
714	DA7213_INVERT, alc_threshold_tlv),
715	SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX,
716	DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
717	DA7213_INVERT, alc_threshold_tlv),
718	SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS,
719	DA7213_ALC_ATTEN_MAX_SHIFT,
720	DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT,
721	alc_gain_tlv),
722	SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS,
723	DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX,
724	DA7213_NO_INVERT, alc_gain_tlv),
725	SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
726	DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
727	DA7213_NO_INVERT, alc_analog_gain_tlv),
728	SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
729	DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
730	DA7213_NO_INVERT, alc_analog_gain_tlv),
731	SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL,
732	DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX,
733	DA7213_NO_INVERT),
734	SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL,
735	DA7213_ALC_ANTICLIP_LEVEL_SHIFT,
736	DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT),
737	};
738
739
740	/*
741	* DAPM
742	*/
743
744	/*
745	* Enums
746	*/
747
748	/* MIC PGA source select */
749	static const char * const da7213_mic_amp_in_sel_txt[] = {
750	"Differential", "MIC_P", "MIC_N"
751	};
752
753	static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel,
754	DA7213_MIC_1_CTRL,
755	DA7213_MIC_AMP_IN_SEL_SHIFT,
756	da7213_mic_amp_in_sel_txt);
757	static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux =
758	SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel);
759
760	static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel,
761	DA7213_MIC_2_CTRL,
762	DA7213_MIC_AMP_IN_SEL_SHIFT,
763	da7213_mic_amp_in_sel_txt);
764	static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux =
765	SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel);
766
767	/* DAI routing select */
768	static const char * const da7213_dai_src_txt[] = {
769	"ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right"
770	};
771
772	static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src,
773	DA7213_DIG_ROUTING_DAI,
774	DA7213_DAI_L_SRC_SHIFT,
775	da7213_dai_src_txt);
776	static const struct snd_kcontrol_new da7213_dai_l_src_mux =
777	SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src);
778
779	static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src,
780	DA7213_DIG_ROUTING_DAI,
781	DA7213_DAI_R_SRC_SHIFT,
782	da7213_dai_src_txt);
783	static const struct snd_kcontrol_new da7213_dai_r_src_mux =
784	SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src);
785
786	/* DAC routing select */
787	static const char * const da7213_dac_src_txt[] = {
788	"ADC Output Left", "ADC Output Right", "DAI Input Left",
789	"DAI Input Right"
790	};
791
792	static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src,
793	DA7213_DIG_ROUTING_DAC,
794	DA7213_DAC_L_SRC_SHIFT,
795	da7213_dac_src_txt);
796	static const struct snd_kcontrol_new da7213_dac_l_src_mux =
797	SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src);
798
799	static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src,
800	DA7213_DIG_ROUTING_DAC,
801	DA7213_DAC_R_SRC_SHIFT,
802	da7213_dac_src_txt);
803	static const struct snd_kcontrol_new da7213_dac_r_src_mux =
804	SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src);
805
806	/*
807	* Mixer Controls
808	*/
809
810	/* Mixin Left */
811	static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = {
812	SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT,
813	DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT,
814	DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
815	SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT,
816	DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT,
817	DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
818	SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT,
819	DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT,
820	DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
821	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT,
822	DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT,
823	DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
824	};
825
826	/* Mixin Right */
827	static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = {
828	SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT,
829	DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT,
830	DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
831	SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT,
832	DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT,
833	DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
834	SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT,
835	DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT,
836	DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
837	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT,
838	DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT,
839	DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
840	};
841
842	/* Mixout Left */
843	static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = {
844	SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT,
845	DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT,
846	DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
847	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT,
848	DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT,
849	DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
850	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT,
851	DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT,
852	DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
853	SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT,
854	DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT,
855	DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
856	SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT,
857	DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT,
858	DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
859	SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT,
860	DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
861	DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
862	SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT,
863	DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
864	DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
865	};
866
867	/* Mixout Right */
868	static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = {
869	SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT,
870	DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT,
871	DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
872	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT,
873	DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT,
874	DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
875	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT,
876	DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT,
877	DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
878	SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT,
879	DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT,
880	DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
881	SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT,
882	DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT,
883	DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
884	SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT,
885	DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
886	DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
887	SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT,
888	DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
889	DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
890	};
891
892
893	/*
894	* DAPM Events
895	*/
896
897	static int da7213_dai_event(struct snd_soc_dapm_widget *w,
898	struct snd_kcontrol *kcontrol, int event)
899	{
900	struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm);
901	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
902	u8 pll_ctrl, pll_status;
903	int i = 0;
904	bool srm_lock = false;
905
906	switch (event) {
907	case SND_SOC_DAPM_PRE_PMU:
908	/* Enable DAI clks for master mode */
909	if (da7213->master)
910	snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
911	DA7213_DAI_CLK_EN_MASK,
912	DA7213_DAI_CLK_EN_MASK);
913
914	/* PC synchronised to DAI */
915	snd_soc_component_update_bits(component, DA7213_PC_COUNT,
916	DA7213_PC_FREERUN_MASK, val: 0);
917
918	/* If SRM not enabled then nothing more to do */
919	pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
920	if (!(pll_ctrl & DA7213_PLL_SRM_EN))
921	return 0;
922
923	/* Assist 32KHz mode PLL lock */
924	if (pll_ctrl & DA7213_PLL_32K_MODE) {
925	snd_soc_component_write(component, reg: 0xF0, val: 0x8B);
926	snd_soc_component_write(component, reg: 0xF2, val: 0x03);
927	snd_soc_component_write(component, reg: 0xF0, val: 0x00);
928	}
929
930	/* Check SRM has locked */
931	do {
932	pll_status = snd_soc_component_read(component, DA7213_PLL_STATUS);
933	if (pll_status & DA7213_PLL_SRM_LOCK) {
934	srm_lock = true;
935	} else {
936	++i;
937	msleep(msecs: 50);
938	}
939	} while ((i < DA7213_SRM_CHECK_RETRIES) && (!srm_lock));
940
941	if (!srm_lock)
942	dev_warn(component->dev, "SRM failed to lock\n");
943
944	return 0;
945	case SND_SOC_DAPM_POST_PMD:
946	/* Revert 32KHz PLL lock udpates if applied previously */
947	pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
948	if (pll_ctrl & DA7213_PLL_32K_MODE) {
949	snd_soc_component_write(component, reg: 0xF0, val: 0x8B);
950	snd_soc_component_write(component, reg: 0xF2, val: 0x01);
951	snd_soc_component_write(component, reg: 0xF0, val: 0x00);
952	}
953
954	/* PC free-running */
955	snd_soc_component_update_bits(component, DA7213_PC_COUNT,
956	DA7213_PC_FREERUN_MASK,
957	DA7213_PC_FREERUN_MASK);
958
959	/* Disable DAI clks if in master mode */
960	if (da7213->master)
961	snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
962	DA7213_DAI_CLK_EN_MASK, val: 0);
963	return 0;
964	default:
965	return -EINVAL;
966	}
967	}
968
969
970	/*
971	* DAPM widgets
972	*/
973
974	static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = {
975	/*
976	* Power Supply
977	*/
978	SND_SOC_DAPM_REGULATOR_SUPPLY("VDDMIC", 0, 0),
979
980	/*
981	* Input & Output
982	*/
983
984	/* Use a supply here as this controls both input & output DAIs */
985	SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
986	DA7213_NO_INVERT, da7213_dai_event,
987	SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
988
989	/*
990	* Input
991	*/
992
993	/* Input Lines */
994	SND_SOC_DAPM_INPUT("MIC1"),
995	SND_SOC_DAPM_INPUT("MIC2"),
996	SND_SOC_DAPM_INPUT("AUXL"),
997	SND_SOC_DAPM_INPUT("AUXR"),
998
999	/* MUXs for Mic PGA source selection */
1000	SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0,
1001	&da7213_mic_1_amp_in_sel_mux),
1002	SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0,
1003	&da7213_mic_2_amp_in_sel_mux),
1004
1005	/* Input PGAs */
1006	SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT,
1007	DA7213_NO_INVERT, NULL, 0),
1008	SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT,
1009	DA7213_NO_INVERT, NULL, 0),
1010	SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT,
1011	DA7213_NO_INVERT, NULL, 0),
1012	SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL,
1013	DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
1014	SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL,
1015	DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
1016	SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL,
1017	DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
1018
1019	/* Mic Biases */
1020	SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL,
1021	DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT,
1022	NULL, 0),
1023	SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL,
1024	DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT,
1025	NULL, 0),
1026
1027	/* Input Mixers */
1028	SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0,
1029	&da7213_dapm_mixinl_controls[0],
1030	ARRAY_SIZE(da7213_dapm_mixinl_controls)),
1031	SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0,
1032	&da7213_dapm_mixinr_controls[0],
1033	ARRAY_SIZE(da7213_dapm_mixinr_controls)),
1034
1035	/* ADCs */
1036	SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL,
1037	DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
1038	SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL,
1039	DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
1040
1041	/* DAI */
1042	SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0,
1043	&da7213_dai_l_src_mux),
1044	SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0,
1045	&da7213_dai_r_src_mux),
1046	SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
1047	SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
1048
1049	/*
1050	* Output
1051	*/
1052
1053	/* DAI */
1054	SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
1055	SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
1056	SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0,
1057	&da7213_dac_l_src_mux),
1058	SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0,
1059	&da7213_dac_r_src_mux),
1060
1061	/* DACs */
1062	SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL,
1063	DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
1064	SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL,
1065	DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
1066
1067	/* Output Mixers */
1068	SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0,
1069	&da7213_dapm_mixoutl_controls[0],
1070	ARRAY_SIZE(da7213_dapm_mixoutl_controls)),
1071	SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0,
1072	&da7213_dapm_mixoutr_controls[0],
1073	ARRAY_SIZE(da7213_dapm_mixoutr_controls)),
1074
1075	/* Output PGAs */
1076	SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL,
1077	DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
1078	SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL,
1079	DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
1080	SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT,
1081	DA7213_NO_INVERT, NULL, 0),
1082	SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL,
1083	DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
1084	SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL,
1085	DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
1086
1087	/* Charge Pump */
1088	SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT,
1089	DA7213_NO_INVERT, NULL, 0),
1090
1091	/* Output Lines */
1092	SND_SOC_DAPM_OUTPUT("HPL"),
1093	SND_SOC_DAPM_OUTPUT("HPR"),
1094	SND_SOC_DAPM_OUTPUT("LINE"),
1095	};
1096
1097
1098	/*
1099	* DAPM audio route definition
1100	*/
1101
1102	static const struct snd_soc_dapm_route da7213_audio_map[] = {
1103	/* Dest Connecting Widget source */
1104
1105	/* Input path */
1106	{"Mic Bias 1", NULL, "VDDMIC"},
1107	{"Mic Bias 2", NULL, "VDDMIC"},
1108
1109	{"MIC1", NULL, "Mic Bias 1"},
1110	{"MIC2", NULL, "Mic Bias 2"},
1111
1112	{"Mic 1 Amp Source MUX", "Differential", "MIC1"},
1113	{"Mic 1 Amp Source MUX", "MIC_P", "MIC1"},
1114	{"Mic 1 Amp Source MUX", "MIC_N", "MIC1"},
1115
1116	{"Mic 2 Amp Source MUX", "Differential", "MIC2"},
1117	{"Mic 2 Amp Source MUX", "MIC_P", "MIC2"},
1118	{"Mic 2 Amp Source MUX", "MIC_N", "MIC2"},
1119
1120	{"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"},
1121	{"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"},
1122
1123	{"Aux Left PGA", NULL, "AUXL"},
1124	{"Aux Right PGA", NULL, "AUXR"},
1125
1126	{"Mixin Left", "Aux Left Switch", "Aux Left PGA"},
1127	{"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"},
1128	{"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"},
1129	{"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"},
1130
1131	{"Mixin Right", "Aux Right Switch", "Aux Right PGA"},
1132	{"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"},
1133	{"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"},
1134	{"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"},
1135
1136	{"Mixin Left PGA", NULL, "Mixin Left"},
1137	{"ADC Left", NULL, "Mixin Left PGA"},
1138
1139	{"Mixin Right PGA", NULL, "Mixin Right"},
1140	{"ADC Right", NULL, "Mixin Right PGA"},
1141
1142	{"DAI Left Source MUX", "ADC Left", "ADC Left"},
1143	{"DAI Left Source MUX", "ADC Right", "ADC Right"},
1144	{"DAI Left Source MUX", "DAI Input Left", "DAIINL"},
1145	{"DAI Left Source MUX", "DAI Input Right", "DAIINR"},
1146
1147	{"DAI Right Source MUX", "ADC Left", "ADC Left"},
1148	{"DAI Right Source MUX", "ADC Right", "ADC Right"},
1149	{"DAI Right Source MUX", "DAI Input Left", "DAIINL"},
1150	{"DAI Right Source MUX", "DAI Input Right", "DAIINR"},
1151
1152	{"DAIOUTL", NULL, "DAI Left Source MUX"},
1153	{"DAIOUTR", NULL, "DAI Right Source MUX"},
1154
1155	{"DAIOUTL", NULL, "DAI"},
1156	{"DAIOUTR", NULL, "DAI"},
1157
1158	/* Output path */
1159	{"DAIINL", NULL, "DAI"},
1160	{"DAIINR", NULL, "DAI"},
1161
1162	{"DAC Left Source MUX", "ADC Output Left", "ADC Left"},
1163	{"DAC Left Source MUX", "ADC Output Right", "ADC Right"},
1164	{"DAC Left Source MUX", "DAI Input Left", "DAIINL"},
1165	{"DAC Left Source MUX", "DAI Input Right", "DAIINR"},
1166
1167	{"DAC Right Source MUX", "ADC Output Left", "ADC Left"},
1168	{"DAC Right Source MUX", "ADC Output Right", "ADC Right"},
1169	{"DAC Right Source MUX", "DAI Input Left", "DAIINL"},
1170	{"DAC Right Source MUX", "DAI Input Right", "DAIINR"},
1171
1172	{"DAC Left", NULL, "DAC Left Source MUX"},
1173	{"DAC Right", NULL, "DAC Right Source MUX"},
1174
1175	{"Mixout Left", "Aux Left Switch", "Aux Left PGA"},
1176	{"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"},
1177	{"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"},
1178	{"Mixout Left", "DAC Left Switch", "DAC Left"},
1179	{"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"},
1180	{"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"},
1181	{"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"},
1182
1183	{"Mixout Right", "Aux Right Switch", "Aux Right PGA"},
1184	{"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"},
1185	{"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"},
1186	{"Mixout Right", "DAC Right Switch", "DAC Right"},
1187	{"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"},
1188	{"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"},
1189	{"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"},
1190
1191	{"Mixout Left PGA", NULL, "Mixout Left"},
1192	{"Mixout Right PGA", NULL, "Mixout Right"},
1193
1194	{"Headphone Left PGA", NULL, "Mixout Left PGA"},
1195	{"Headphone Left PGA", NULL, "Charge Pump"},
1196	{"HPL", NULL, "Headphone Left PGA"},
1197
1198	{"Headphone Right PGA", NULL, "Mixout Right PGA"},
1199	{"Headphone Right PGA", NULL, "Charge Pump"},
1200	{"HPR", NULL, "Headphone Right PGA"},
1201
1202	{"Lineout PGA", NULL, "Mixout Right PGA"},
1203	{"LINE", NULL, "Lineout PGA"},
1204	};
1205
1206	static const struct reg_default da7213_reg_defaults[] = {
1207	{ DA7213_DIG_ROUTING_DAI, 0x10 },
1208	{ DA7213_SR, 0x0A },
1209	{ DA7213_REFERENCES, 0x80 },
1210	{ DA7213_PLL_FRAC_TOP, 0x00 },
1211	{ DA7213_PLL_FRAC_BOT, 0x00 },
1212	{ DA7213_PLL_INTEGER, 0x20 },
1213	{ DA7213_PLL_CTRL, 0x0C },
1214	{ DA7213_DAI_CLK_MODE, 0x01 },
1215	{ DA7213_DAI_CTRL, 0x08 },
1216	{ DA7213_DIG_ROUTING_DAC, 0x32 },
1217	{ DA7213_AUX_L_GAIN, 0x35 },
1218	{ DA7213_AUX_R_GAIN, 0x35 },
1219	{ DA7213_MIXIN_L_SELECT, 0x00 },
1220	{ DA7213_MIXIN_R_SELECT, 0x00 },
1221	{ DA7213_MIXIN_L_GAIN, 0x03 },
1222	{ DA7213_MIXIN_R_GAIN, 0x03 },
1223	{ DA7213_ADC_L_GAIN, 0x6F },
1224	{ DA7213_ADC_R_GAIN, 0x6F },
1225	{ DA7213_ADC_FILTERS1, 0x80 },
1226	{ DA7213_MIC_1_GAIN, 0x01 },
1227	{ DA7213_MIC_2_GAIN, 0x01 },
1228	{ DA7213_DAC_FILTERS5, 0x00 },
1229	{ DA7213_DAC_FILTERS2, 0x88 },
1230	{ DA7213_DAC_FILTERS3, 0x88 },
1231	{ DA7213_DAC_FILTERS4, 0x08 },
1232	{ DA7213_DAC_FILTERS1, 0x80 },
1233	{ DA7213_DAC_L_GAIN, 0x6F },
1234	{ DA7213_DAC_R_GAIN, 0x6F },
1235	{ DA7213_CP_CTRL, 0x61 },
1236	{ DA7213_HP_L_GAIN, 0x39 },
1237	{ DA7213_HP_R_GAIN, 0x39 },
1238	{ DA7213_LINE_GAIN, 0x30 },
1239	{ DA7213_MIXOUT_L_SELECT, 0x00 },
1240	{ DA7213_MIXOUT_R_SELECT, 0x00 },
1241	{ DA7213_SYSTEM_MODES_INPUT, 0x00 },
1242	{ DA7213_SYSTEM_MODES_OUTPUT, 0x00 },
1243	{ DA7213_AUX_L_CTRL, 0x44 },
1244	{ DA7213_AUX_R_CTRL, 0x44 },
1245	{ DA7213_MICBIAS_CTRL, 0x11 },
1246	{ DA7213_MIC_1_CTRL, 0x40 },
1247	{ DA7213_MIC_2_CTRL, 0x40 },
1248	{ DA7213_MIXIN_L_CTRL, 0x40 },
1249	{ DA7213_MIXIN_R_CTRL, 0x40 },
1250	{ DA7213_ADC_L_CTRL, 0x40 },
1251	{ DA7213_ADC_R_CTRL, 0x40 },
1252	{ DA7213_DAC_L_CTRL, 0x48 },
1253	{ DA7213_DAC_R_CTRL, 0x40 },
1254	{ DA7213_HP_L_CTRL, 0x41 },
1255	{ DA7213_HP_R_CTRL, 0x40 },
1256	{ DA7213_LINE_CTRL, 0x40 },
1257	{ DA7213_MIXOUT_L_CTRL, 0x10 },
1258	{ DA7213_MIXOUT_R_CTRL, 0x10 },
1259	{ DA7213_LDO_CTRL, 0x00 },
1260	{ DA7213_IO_CTRL, 0x00 },
1261	{ DA7213_GAIN_RAMP_CTRL, 0x00},
1262	{ DA7213_MIC_CONFIG, 0x00 },
1263	{ DA7213_PC_COUNT, 0x00 },
1264	{ DA7213_CP_VOL_THRESHOLD1, 0x32 },
1265	{ DA7213_CP_DELAY, 0x95 },
1266	{ DA7213_CP_DETECTOR, 0x00 },
1267	{ DA7213_DAI_OFFSET, 0x00 },
1268	{ DA7213_DIG_CTRL, 0x00 },
1269	{ DA7213_ALC_CTRL2, 0x00 },
1270	{ DA7213_ALC_CTRL3, 0x00 },
1271	{ DA7213_ALC_NOISE, 0x3F },
1272	{ DA7213_ALC_TARGET_MIN, 0x3F },
1273	{ DA7213_ALC_TARGET_MAX, 0x00 },
1274	{ DA7213_ALC_GAIN_LIMITS, 0xFF },
1275	{ DA7213_ALC_ANA_GAIN_LIMITS, 0x71 },
1276	{ DA7213_ALC_ANTICLIP_CTRL, 0x00 },
1277	{ DA7213_ALC_ANTICLIP_LEVEL, 0x00 },
1278	{ DA7213_ALC_OFFSET_MAN_M_L, 0x00 },
1279	{ DA7213_ALC_OFFSET_MAN_U_L, 0x00 },
1280	{ DA7213_ALC_OFFSET_MAN_M_R, 0x00 },
1281	{ DA7213_ALC_OFFSET_MAN_U_R, 0x00 },
1282	{ DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 },
1283	{ DA7213_DAC_NG_SETUP_TIME, 0x00 },
1284	{ DA7213_DAC_NG_OFF_THRESHOLD, 0x00 },
1285	{ DA7213_DAC_NG_ON_THRESHOLD, 0x00 },
1286	{ DA7213_DAC_NG_CTRL, 0x00 },
1287	};
1288
1289	static bool da7213_volatile_register(struct device *dev, unsigned int reg)
1290	{
1291	switch (reg) {
1292	case DA7213_STATUS1:
1293	case DA7213_PLL_STATUS:
1294	case DA7213_AUX_L_GAIN_STATUS:
1295	case DA7213_AUX_R_GAIN_STATUS:
1296	case DA7213_MIC_1_GAIN_STATUS:
1297	case DA7213_MIC_2_GAIN_STATUS:
1298	case DA7213_MIXIN_L_GAIN_STATUS:
1299	case DA7213_MIXIN_R_GAIN_STATUS:
1300	case DA7213_ADC_L_GAIN_STATUS:
1301	case DA7213_ADC_R_GAIN_STATUS:
1302	case DA7213_DAC_L_GAIN_STATUS:
1303	case DA7213_DAC_R_GAIN_STATUS:
1304	case DA7213_HP_L_GAIN_STATUS:
1305	case DA7213_HP_R_GAIN_STATUS:
1306	case DA7213_LINE_GAIN_STATUS:
1307	case DA7213_ALC_CTRL1:
1308	case DA7213_ALC_OFFSET_AUTO_M_L:
1309	case DA7213_ALC_OFFSET_AUTO_U_L:
1310	case DA7213_ALC_OFFSET_AUTO_M_R:
1311	case DA7213_ALC_OFFSET_AUTO_U_R:
1312	case DA7213_ALC_CIC_OP_LVL_DATA:
1313	return true;
1314	default:
1315	return false;
1316	}
1317	}
1318
1319	static int da7213_hw_params(struct snd_pcm_substream *substream,
1320	struct snd_pcm_hw_params *params,
1321	struct snd_soc_dai *dai)
1322	{
1323	struct snd_soc_component *component = dai->component;
1324	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1325	u8 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_64;
1326	u8 dai_ctrl = 0;
1327	u8 fs;
1328
1329	/* Set channels */
1330	switch (params_channels(p: params)) {
1331	case 1:
1332	if (da7213->fmt != DA7213_DAI_FORMAT_DSP) {
1333	dev_err(component->dev, "Mono supported only in DSP mode\n");
1334	return -EINVAL;
1335	}
1336	dai_ctrl |= DA7213_DAI_MONO_MODE_EN;
1337	break;
1338	case 2:
1339	dai_ctrl &= ~(DA7213_DAI_MONO_MODE_EN);
1340	break;
1341	default:
1342	return -EINVAL;
1343	}
1344
1345	/* Set DAI format */
1346	switch (params_width(p: params)) {
1347	case 16:
1348	dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE;
1349	dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_32; /* 32bit for 1ch and 2ch */
1350	break;
1351	case 20:
1352	dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE;
1353	break;
1354	case 24:
1355	dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE;
1356	break;
1357	case 32:
1358	dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE;
1359	break;
1360	default:
1361	return -EINVAL;
1362	}
1363
1364	/* Set sampling rate */
1365	switch (params_rate(p: params)) {
1366	case 8000:
1367	fs = DA7213_SR_8000;
1368	da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
1369	break;
1370	case 11025:
1371	fs = DA7213_SR_11025;
1372	da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
1373	break;
1374	case 12000:
1375	fs = DA7213_SR_12000;
1376	da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
1377	break;
1378	case 16000:
1379	fs = DA7213_SR_16000;
1380	da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
1381	break;
1382	case 22050:
1383	fs = DA7213_SR_22050;
1384	da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
1385	break;
1386	case 32000:
1387	fs = DA7213_SR_32000;
1388	da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
1389	break;
1390	case 44100:
1391	fs = DA7213_SR_44100;
1392	da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
1393	break;
1394	case 48000:
1395	fs = DA7213_SR_48000;
1396	da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
1397	break;
1398	case 88200:
1399	fs = DA7213_SR_88200;
1400	da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
1401	break;
1402	case 96000:
1403	fs = DA7213_SR_96000;
1404	da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
1405	break;
1406	default:
1407	return -EINVAL;
1408	}
1409
1410	snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
1411	DA7213_DAI_BCLKS_PER_WCLK_MASK, val: dai_clk_mode);
1412
1413	snd_soc_component_update_bits(component, DA7213_DAI_CTRL,
1414	DA7213_DAI_WORD_LENGTH_MASK | DA7213_DAI_MONO_MODE_MASK, val: dai_ctrl);
1415	snd_soc_component_write(component, DA7213_SR, val: fs);
1416
1417	return 0;
1418	}
1419
1420	static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1421	{
1422	struct snd_soc_component *component = codec_dai->component;
1423	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1424	u8 dai_clk_mode = 0, dai_ctrl = 0;
1425	u8 dai_offset = 0;
1426
1427	/* Set master/slave mode */
1428	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1429	case SND_SOC_DAIFMT_CBP_CFP:
1430	da7213->master = true;
1431	break;
1432	case SND_SOC_DAIFMT_CBC_CFC:
1433	da7213->master = false;
1434	break;
1435	default:
1436	return -EINVAL;
1437	}
1438
1439	/* Set clock normal/inverted */
1440	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1441	case SND_SOC_DAIFMT_I2S:
1442	case SND_SOC_DAIFMT_LEFT_J:
1443	case SND_SOC_DAIFMT_RIGHT_J:
1444	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1445	case SND_SOC_DAIFMT_NB_NF:
1446	break;
1447	case SND_SOC_DAIFMT_NB_IF:
1448	dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1449	break;
1450	case SND_SOC_DAIFMT_IB_NF:
1451	dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1452	break;
1453	case SND_SOC_DAIFMT_IB_IF:
1454	dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1455	DA7213_DAI_CLK_POL_INV;
1456	break;
1457	default:
1458	return -EINVAL;
1459	}
1460	break;
1461	case SND_SOC_DAIFMT_DSP_A:
1462	case SND_SOC_DAIFMT_DSP_B:
1463	/* The bclk is inverted wrt ASoC conventions */
1464	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1465	case SND_SOC_DAIFMT_NB_NF:
1466	dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1467	break;
1468	case SND_SOC_DAIFMT_NB_IF:
1469	dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1470	DA7213_DAI_CLK_POL_INV;
1471	break;
1472	case SND_SOC_DAIFMT_IB_NF:
1473	break;
1474	case SND_SOC_DAIFMT_IB_IF:
1475	dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1476	break;
1477	default:
1478	return -EINVAL;
1479	}
1480	break;
1481	default:
1482	return -EINVAL;
1483	}
1484
1485	/* Only I2S is supported */
1486	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1487	case SND_SOC_DAIFMT_I2S:
1488	dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE;
1489	da7213->fmt = DA7213_DAI_FORMAT_I2S_MODE;
1490	break;
1491	case SND_SOC_DAIFMT_LEFT_J:
1492	dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J;
1493	da7213->fmt = DA7213_DAI_FORMAT_LEFT_J;
1494	break;
1495	case SND_SOC_DAIFMT_RIGHT_J:
1496	dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J;
1497	da7213->fmt = DA7213_DAI_FORMAT_RIGHT_J;
1498	break;
1499	case SND_SOC_DAIFMT_DSP_A: /* L data MSB after FRM LRC */
1500	dai_ctrl |= DA7213_DAI_FORMAT_DSP;
1501	dai_offset = 1;
1502	da7213->fmt = DA7213_DAI_FORMAT_DSP;
1503	break;
1504	case SND_SOC_DAIFMT_DSP_B: /* L data MSB during FRM LRC */
1505	dai_ctrl |= DA7213_DAI_FORMAT_DSP;
1506	da7213->fmt = DA7213_DAI_FORMAT_DSP;
1507	break;
1508	default:
1509	return -EINVAL;
1510	}
1511
1512	/* By default only 64 BCLK per WCLK is supported */
1513	dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
1514
1515	snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
1516	DA7213_DAI_BCLKS_PER_WCLK_MASK |
1517	DA7213_DAI_CLK_POL_MASK | DA7213_DAI_WCLK_POL_MASK,
1518	val: dai_clk_mode);
1519	snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK,
1520	val: dai_ctrl);
1521	snd_soc_component_write(component, DA7213_DAI_OFFSET, val: dai_offset);
1522
1523	return 0;
1524	}
1525
1526	static int da7213_mute(struct snd_soc_dai *dai, int mute, int direction)
1527	{
1528	struct snd_soc_component *component = dai->component;
1529
1530	if (mute) {
1531	snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
1532	DA7213_MUTE_EN, DA7213_MUTE_EN);
1533	snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
1534	DA7213_MUTE_EN, DA7213_MUTE_EN);
1535	} else {
1536	snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
1537	DA7213_MUTE_EN, val: 0);
1538	snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
1539	DA7213_MUTE_EN, val: 0);
1540	}
1541
1542	return 0;
1543	}
1544
1545	#define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1546	SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1547
1548	static int da7213_set_component_sysclk(struct snd_soc_component *component,
1549	int clk_id, int source,
1550	unsigned int freq, int dir)
1551	{
1552	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1553	int ret = 0;
1554
1555	if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
1556	return 0;
1557
1558	if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) {
1559	dev_err(component->dev, "Unsupported MCLK value %d\n",
1560	freq);
1561	return -EINVAL;
1562	}
1563
1564	switch (clk_id) {
1565	case DA7213_CLKSRC_MCLK:
1566	snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
1567	DA7213_PLL_MCLK_SQR_EN, val: 0);
1568	break;
1569	case DA7213_CLKSRC_MCLK_SQR:
1570	snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
1571	DA7213_PLL_MCLK_SQR_EN,
1572	DA7213_PLL_MCLK_SQR_EN);
1573	break;
1574	default:
1575	dev_err(component->dev, "Unknown clock source %d\n", clk_id);
1576	return -EINVAL;
1577	}
1578
1579	da7213->clk_src = clk_id;
1580
1581	if (da7213->mclk) {
1582	freq = clk_round_rate(clk: da7213->mclk, rate: freq);
1583	ret = clk_set_rate(clk: da7213->mclk, rate: freq);
1584	if (ret) {
1585	dev_err(component->dev, "Failed to set clock rate %d\n",
1586	freq);
1587	return ret;
1588	}
1589	}
1590
1591	da7213->mclk_rate = freq;
1592
1593	return 0;
1594	}
1595
1596	/* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
1597	static int _da7213_set_component_pll(struct snd_soc_component *component,
1598	int pll_id, int source,
1599	unsigned int fref, unsigned int fout)
1600	{
1601	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1602
1603	u8 pll_ctrl, indiv_bits, indiv;
1604	u8 pll_frac_top, pll_frac_bot, pll_integer;
1605	u32 freq_ref;
1606	u64 frac_div;
1607
1608	/* Workout input divider based on MCLK rate */
1609	if (da7213->mclk_rate == 32768) {
1610	if (!da7213->master) {
1611	dev_err(component->dev,
1612	"32KHz only valid if codec is clock master\n");
1613	return -EINVAL;
1614	}
1615
1616	/* 32KHz PLL Mode */
1617	indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1618	indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1619	source = DA7213_SYSCLK_PLL_32KHZ;
1620	freq_ref = 3750000;
1621
1622	} else {
1623	if (da7213->mclk_rate < 5000000) {
1624	dev_err(component->dev,
1625	"PLL input clock %d below valid range\n",
1626	da7213->mclk_rate);
1627	return -EINVAL;
1628	} else if (da7213->mclk_rate <= 9000000) {
1629	indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
1630	indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
1631	} else if (da7213->mclk_rate <= 18000000) {
1632	indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1633	indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1634	} else if (da7213->mclk_rate <= 36000000) {
1635	indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
1636	indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
1637	} else if (da7213->mclk_rate <= 54000000) {
1638	indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
1639	indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
1640	} else {
1641	dev_err(component->dev,
1642	"PLL input clock %d above valid range\n",
1643	da7213->mclk_rate);
1644	return -EINVAL;
1645	}
1646	freq_ref = (da7213->mclk_rate / indiv);
1647	}
1648
1649	pll_ctrl = indiv_bits;
1650
1651	/* Configure PLL */
1652	switch (source) {
1653	case DA7213_SYSCLK_MCLK:
1654	snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
1655	DA7213_PLL_INDIV_MASK |
1656	DA7213_PLL_MODE_MASK, val: pll_ctrl);
1657	return 0;
1658	case DA7213_SYSCLK_PLL:
1659	break;
1660	case DA7213_SYSCLK_PLL_SRM:
1661	pll_ctrl |= DA7213_PLL_SRM_EN;
1662	fout = DA7213_PLL_FREQ_OUT_94310400;
1663	break;
1664	case DA7213_SYSCLK_PLL_32KHZ:
1665	if (da7213->mclk_rate != 32768) {
1666	dev_err(component->dev,
1667	"32KHz mode only valid with 32KHz MCLK\n");
1668	return -EINVAL;
1669	}
1670
1671	pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN;
1672	fout = DA7213_PLL_FREQ_OUT_94310400;
1673	break;
1674	default:
1675	dev_err(component->dev, "Invalid PLL config\n");
1676	return -EINVAL;
1677	}
1678
1679	/* Calculate dividers for PLL */
1680	pll_integer = fout / freq_ref;
1681	frac_div = (u64)(fout % freq_ref) * 8192ULL;
1682	do_div(frac_div, freq_ref);
1683	pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK;
1684	pll_frac_bot = (frac_div) & DA7213_BYTE_MASK;
1685
1686	/* Write PLL dividers */
1687	snd_soc_component_write(component, DA7213_PLL_FRAC_TOP, val: pll_frac_top);
1688	snd_soc_component_write(component, DA7213_PLL_FRAC_BOT, val: pll_frac_bot);
1689	snd_soc_component_write(component, DA7213_PLL_INTEGER, val: pll_integer);
1690
1691	/* Enable PLL */
1692	pll_ctrl |= DA7213_PLL_EN;
1693	snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
1694	DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
1695	val: pll_ctrl);
1696
1697	/* Assist 32KHz mode PLL lock */
1698	if (source == DA7213_SYSCLK_PLL_32KHZ) {
1699	snd_soc_component_write(component, reg: 0xF0, val: 0x8B);
1700	snd_soc_component_write(component, reg: 0xF1, val: 0x03);
1701	snd_soc_component_write(component, reg: 0xF1, val: 0x01);
1702	snd_soc_component_write(component, reg: 0xF0, val: 0x00);
1703	}
1704
1705	return 0;
1706	}
1707
1708	static int da7213_set_component_pll(struct snd_soc_component *component,
1709	int pll_id, int source,
1710	unsigned int fref, unsigned int fout)
1711	{
1712	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1713	da7213->fixed_clk_auto_pll = false;
1714
1715	return _da7213_set_component_pll(component, pll_id, source, fref, fout);
1716	}
1717
1718	/*
1719	* Select below from Sound Card, not Auto
1720	* SND_SOC_DAIFMT_CBC_CFC
1721	* SND_SOC_DAIFMT_CBP_CFP
1722	*/
1723	static u64 da7213_dai_formats =
1724	SND_SOC_POSSIBLE_DAIFMT_I2S |
1725	SND_SOC_POSSIBLE_DAIFMT_LEFT_J |
1726	SND_SOC_POSSIBLE_DAIFMT_RIGHT_J |
1727	SND_SOC_POSSIBLE_DAIFMT_DSP_A |
1728	SND_SOC_POSSIBLE_DAIFMT_DSP_B |
1729	SND_SOC_POSSIBLE_DAIFMT_NB_NF |
1730	SND_SOC_POSSIBLE_DAIFMT_NB_IF |
1731	SND_SOC_POSSIBLE_DAIFMT_IB_NF |
1732	SND_SOC_POSSIBLE_DAIFMT_IB_IF;
1733
1734	/* DAI operations */
1735	static const struct snd_soc_dai_ops da7213_dai_ops = {
1736	.hw_params = da7213_hw_params,
1737	.set_fmt = da7213_set_dai_fmt,
1738	.mute_stream = da7213_mute,
1739	.no_capture_mute = 1,
1740	.auto_selectable_formats = &da7213_dai_formats,
1741	.num_auto_selectable_formats = 1,
1742	};
1743
1744	static struct snd_soc_dai_driver da7213_dai = {
1745	.name = "da7213-hifi",
1746	/* Playback Capabilities */
1747	.playback = {
1748	.stream_name = "Playback",
1749	.channels_min = 1,
1750	.channels_max = 2,
1751	.rates = SNDRV_PCM_RATE_8000_96000,
1752	.formats = DA7213_FORMATS,
1753	},
1754	/* Capture Capabilities */
1755	.capture = {
1756	.stream_name = "Capture",
1757	.channels_min = 1,
1758	.channels_max = 2,
1759	.rates = SNDRV_PCM_RATE_8000_96000,
1760	.formats = DA7213_FORMATS,
1761	},
1762	.ops = &da7213_dai_ops,
1763	.symmetric_rate = 1,
1764	};
1765
1766	static int da7213_set_auto_pll(struct snd_soc_component *component, bool enable)
1767	{
1768	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1769	int mode;
1770
1771	if (!da7213->fixed_clk_auto_pll)
1772	return 0;
1773
1774	da7213->mclk_rate = clk_get_rate(clk: da7213->mclk);
1775
1776	if (enable) {
1777	/* Slave mode needs SRM for non-harmonic frequencies */
1778	if (da7213->master)
1779	mode = DA7213_SYSCLK_PLL;
1780	else
1781	mode = DA7213_SYSCLK_PLL_SRM;
1782
1783	/* PLL is not required for harmonic frequencies */
1784	switch (da7213->out_rate) {
1785	case DA7213_PLL_FREQ_OUT_90316800:
1786	if (da7213->mclk_rate == 11289600 ||
1787	da7213->mclk_rate == 22579200 ||
1788	da7213->mclk_rate == 45158400)
1789	mode = DA7213_SYSCLK_MCLK;
1790	break;
1791	case DA7213_PLL_FREQ_OUT_98304000:
1792	if (da7213->mclk_rate == 12288000 ||
1793	da7213->mclk_rate == 24576000 ||
1794	da7213->mclk_rate == 49152000)
1795	mode = DA7213_SYSCLK_MCLK;
1796
1797	break;
1798	default:
1799	return -1;
1800	}
1801	} else {
1802	/* Disable PLL in standby */
1803	mode = DA7213_SYSCLK_MCLK;
1804	}
1805
1806	return _da7213_set_component_pll(component, pll_id: 0, source: mode,
1807	fref: da7213->mclk_rate, fout: da7213->out_rate);
1808	}
1809
1810	static int da7213_set_bias_level(struct snd_soc_component *component,
1811	enum snd_soc_bias_level level)
1812	{
1813	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1814	int ret;
1815
1816	switch (level) {
1817	case SND_SOC_BIAS_ON:
1818	break;
1819	case SND_SOC_BIAS_PREPARE:
1820	/* Enable MCLK for transition to ON state */
1821	if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
1822	if (da7213->mclk) {
1823	ret = clk_prepare_enable(clk: da7213->mclk);
1824	if (ret) {
1825	dev_err(component->dev,
1826	"Failed to enable mclk\n");
1827	return ret;
1828	}
1829
1830	da7213_set_auto_pll(component, enable: true);
1831	}
1832	}
1833	break;
1834	case SND_SOC_BIAS_STANDBY:
1835	if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1836	/* Enable VMID reference & master bias */
1837	snd_soc_component_update_bits(component, DA7213_REFERENCES,
1838	DA7213_VMID_EN | DA7213_BIAS_EN,
1839	DA7213_VMID_EN | DA7213_BIAS_EN);
1840	} else {
1841	/* Remove MCLK */
1842	if (da7213->mclk) {
1843	da7213_set_auto_pll(component, enable: false);
1844	clk_disable_unprepare(clk: da7213->mclk);
1845	}
1846	}
1847	break;
1848	case SND_SOC_BIAS_OFF:
1849	/* Disable VMID reference & master bias */
1850	snd_soc_component_update_bits(component, DA7213_REFERENCES,
1851	DA7213_VMID_EN | DA7213_BIAS_EN, val: 0);
1852	break;
1853	}
1854	return 0;
1855	}
1856
1857	#if defined(CONFIG_OF)
1858	/* DT */
1859	static const struct of_device_id da7213_of_match[] = {
1860	{ .compatible = "dlg,da7212", },
1861	{ .compatible = "dlg,da7213", },
1862	{ }
1863	};
1864	MODULE_DEVICE_TABLE(of, da7213_of_match);
1865	#endif
1866
1867	#ifdef CONFIG_ACPI
1868	static const struct acpi_device_id da7213_acpi_match[] = {
1869	{ "DLGS7212", 0},
1870	{ "DLGS7213", 0},
1871	{ },
1872	};
1873	MODULE_DEVICE_TABLE(acpi, da7213_acpi_match);
1874	#endif
1875
1876	static enum da7213_micbias_voltage
1877	da7213_of_micbias_lvl(struct snd_soc_component *component, u32 val)
1878	{
1879	switch (val) {
1880	case 1600:
1881	return DA7213_MICBIAS_1_6V;
1882	case 2200:
1883	return DA7213_MICBIAS_2_2V;
1884	case 2500:
1885	return DA7213_MICBIAS_2_5V;
1886	case 3000:
1887	return DA7213_MICBIAS_3_0V;
1888	default:
1889	dev_warn(component->dev, "Invalid micbias level\n");
1890	return DA7213_MICBIAS_2_2V;
1891	}
1892	}
1893
1894	static enum da7213_dmic_data_sel
1895	da7213_of_dmic_data_sel(struct snd_soc_component *component, const char *str)
1896	{
1897	if (!strcmp(str, "lrise_rfall")) {
1898	return DA7213_DMIC_DATA_LRISE_RFALL;
1899	} else if (!strcmp(str, "lfall_rrise")) {
1900	return DA7213_DMIC_DATA_LFALL_RRISE;
1901	} else {
1902	dev_warn(component->dev, "Invalid DMIC data select type\n");
1903	return DA7213_DMIC_DATA_LRISE_RFALL;
1904	}
1905	}
1906
1907	static enum da7213_dmic_samplephase
1908	da7213_of_dmic_samplephase(struct snd_soc_component *component, const char *str)
1909	{
1910	if (!strcmp(str, "on_clkedge")) {
1911	return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1912	} else if (!strcmp(str, "between_clkedge")) {
1913	return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE;
1914	} else {
1915	dev_warn(component->dev, "Invalid DMIC sample phase\n");
1916	return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1917	}
1918	}
1919
1920	static enum da7213_dmic_clk_rate
1921	da7213_of_dmic_clkrate(struct snd_soc_component *component, u32 val)
1922	{
1923	switch (val) {
1924	case 1500000:
1925	return DA7213_DMIC_CLK_1_5MHZ;
1926	case 3000000:
1927	return DA7213_DMIC_CLK_3_0MHZ;
1928	default:
1929	dev_warn(component->dev, "Invalid DMIC clock rate\n");
1930	return DA7213_DMIC_CLK_1_5MHZ;
1931	}
1932	}
1933
1934	static struct da7213_platform_data
1935	*da7213_fw_to_pdata(struct snd_soc_component *component)
1936	{
1937	struct device *dev = component->dev;
1938	struct da7213_platform_data *pdata;
1939	const char *fw_str;
1940	u32 fw_val32;
1941
1942	pdata = devm_kzalloc(dev: component->dev, size: sizeof(*pdata), GFP_KERNEL);
1943	if (!pdata)
1944	return NULL;
1945
1946	if (device_property_read_u32(dev, propname: "dlg,micbias1-lvl", val: &fw_val32) >= 0)
1947	pdata->micbias1_lvl = da7213_of_micbias_lvl(component, val: fw_val32);
1948	else
1949	pdata->micbias1_lvl = DA7213_MICBIAS_2_2V;
1950
1951	if (device_property_read_u32(dev, propname: "dlg,micbias2-lvl", val: &fw_val32) >= 0)
1952	pdata->micbias2_lvl = da7213_of_micbias_lvl(component, val: fw_val32);
1953	else
1954	pdata->micbias2_lvl = DA7213_MICBIAS_2_2V;
1955
1956	if (!device_property_read_string(dev, propname: "dlg,dmic-data-sel", val: &fw_str))
1957	pdata->dmic_data_sel = da7213_of_dmic_data_sel(component, str: fw_str);
1958	else
1959	pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL;
1960
1961	if (!device_property_read_string(dev, propname: "dlg,dmic-samplephase", val: &fw_str))
1962	pdata->dmic_samplephase =
1963	da7213_of_dmic_samplephase(component, str: fw_str);
1964	else
1965	pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1966
1967	if (device_property_read_u32(dev, propname: "dlg,dmic-clkrate", val: &fw_val32) >= 0)
1968	pdata->dmic_clk_rate = da7213_of_dmic_clkrate(component, val: fw_val32);
1969	else
1970	pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ;
1971
1972	return pdata;
1973	}
1974
1975	static int da7213_probe(struct snd_soc_component *component)
1976	{
1977	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(c: component);
1978
1979	pm_runtime_get_sync(dev: component->dev);
1980
1981	/* Default to using ALC auto offset calibration mode. */
1982	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
1983	DA7213_ALC_CALIB_MODE_MAN, val: 0);
1984	da7213->alc_calib_auto = true;
1985
1986	/* Default PC counter to free-running */
1987	snd_soc_component_update_bits(component, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
1988	DA7213_PC_FREERUN_MASK);
1989
1990	/* Enable all Gain Ramps */
1991	snd_soc_component_update_bits(component, DA7213_AUX_L_CTRL,
1992	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1993	snd_soc_component_update_bits(component, DA7213_AUX_R_CTRL,
1994	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1995	snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL,
1996	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1997	snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL,
1998	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1999	snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL,
2000	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
2001	snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL,
2002	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
2003	snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
2004	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
2005	snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
2006	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
2007	snd_soc_component_update_bits(component, DA7213_HP_L_CTRL,
2008	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
2009	snd_soc_component_update_bits(component, DA7213_HP_R_CTRL,
2010	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
2011	snd_soc_component_update_bits(component, DA7213_LINE_CTRL,
2012	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
2013
2014	/*
2015	* There are two separate control bits for input and output mixers as
2016	* well as headphone and line outs.
2017	* One to enable corresponding amplifier and other to enable its
2018	* output. As amplifier bits are related to power control, they are
2019	* being managed by DAPM while other (non power related) bits are
2020	* enabled here
2021	*/
2022	snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL,
2023	DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
2024	snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL,
2025	DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
2026
2027	snd_soc_component_update_bits(component, DA7213_MIXOUT_L_CTRL,
2028	DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
2029	snd_soc_component_update_bits(component, DA7213_MIXOUT_R_CTRL,
2030	DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
2031
2032	snd_soc_component_update_bits(component, DA7213_HP_L_CTRL,
2033	DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
2034	snd_soc_component_update_bits(component, DA7213_HP_R_CTRL,
2035	DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
2036
2037	snd_soc_component_update_bits(component, DA7213_LINE_CTRL,
2038	DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE);
2039
2040	/* Handle DT/Platform data */
2041	da7213->pdata = dev_get_platdata(dev: component->dev);
2042	if (!da7213->pdata)
2043	da7213->pdata = da7213_fw_to_pdata(component);
2044
2045	/* Set platform data values */
2046	if (da7213->pdata) {
2047	struct da7213_platform_data *pdata = da7213->pdata;
2048	u8 micbias_lvl = 0, dmic_cfg = 0;
2049
2050	/* Set Mic Bias voltages */
2051	switch (pdata->micbias1_lvl) {
2052	case DA7213_MICBIAS_1_6V:
2053	case DA7213_MICBIAS_2_2V:
2054	case DA7213_MICBIAS_2_5V:
2055	case DA7213_MICBIAS_3_0V:
2056	micbias_lvl |= (pdata->micbias1_lvl <<
2057	DA7213_MICBIAS1_LEVEL_SHIFT);
2058	break;
2059	}
2060	switch (pdata->micbias2_lvl) {
2061	case DA7213_MICBIAS_1_6V:
2062	case DA7213_MICBIAS_2_2V:
2063	case DA7213_MICBIAS_2_5V:
2064	case DA7213_MICBIAS_3_0V:
2065	micbias_lvl |= (pdata->micbias2_lvl <<
2066	DA7213_MICBIAS2_LEVEL_SHIFT);
2067	break;
2068	}
2069	snd_soc_component_update_bits(component, DA7213_MICBIAS_CTRL,
2070	DA7213_MICBIAS1_LEVEL_MASK |
2071	DA7213_MICBIAS2_LEVEL_MASK, val: micbias_lvl);
2072
2073	/* Set DMIC configuration */
2074	switch (pdata->dmic_data_sel) {
2075	case DA7213_DMIC_DATA_LFALL_RRISE:
2076	case DA7213_DMIC_DATA_LRISE_RFALL:
2077	dmic_cfg |= (pdata->dmic_data_sel <<
2078	DA7213_DMIC_DATA_SEL_SHIFT);
2079	break;
2080	}
2081	switch (pdata->dmic_samplephase) {
2082	case DA7213_DMIC_SAMPLE_ON_CLKEDGE:
2083	case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE:
2084	dmic_cfg |= (pdata->dmic_samplephase <<
2085	DA7213_DMIC_SAMPLEPHASE_SHIFT);
2086	break;
2087	}
2088	switch (pdata->dmic_clk_rate) {
2089	case DA7213_DMIC_CLK_3_0MHZ:
2090	case DA7213_DMIC_CLK_1_5MHZ:
2091	dmic_cfg |= (pdata->dmic_clk_rate <<
2092	DA7213_DMIC_CLK_RATE_SHIFT);
2093	break;
2094	}
2095	snd_soc_component_update_bits(component, DA7213_MIC_CONFIG,
2096	DA7213_DMIC_DATA_SEL_MASK |
2097	DA7213_DMIC_SAMPLEPHASE_MASK |
2098	DA7213_DMIC_CLK_RATE_MASK, val: dmic_cfg);
2099	}
2100
2101	pm_runtime_put_sync(dev: component->dev);
2102
2103	/* Check if MCLK provided */
2104	da7213->mclk = devm_clk_get_optional(dev: component->dev, id: "mclk");
2105	if (IS_ERR(ptr: da7213->mclk))
2106	return PTR_ERR(ptr: da7213->mclk);
2107	if (da7213->mclk)
2108	/* Do automatic PLL handling assuming fixed clock until
2109	* set_pll() has been called. This makes the codec usable
2110	* with the simple-audio-card driver. */
2111	da7213->fixed_clk_auto_pll = true;
2112
2113	/* Default infinite tone gen, start/stop by Kcontrol */
2114	snd_soc_component_write(component, DA7213_TONE_GEN_CYCLES, DA7213_BEEP_CYCLES_MASK);
2115
2116	return 0;
2117	}
2118
2119	static const struct snd_soc_component_driver soc_component_dev_da7213 = {
2120	.probe = da7213_probe,
2121	.set_bias_level = da7213_set_bias_level,
2122	.controls = da7213_snd_controls,
2123	.num_controls = ARRAY_SIZE(da7213_snd_controls),
2124	.dapm_widgets = da7213_dapm_widgets,
2125	.num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets),
2126	.dapm_routes = da7213_audio_map,
2127	.num_dapm_routes = ARRAY_SIZE(da7213_audio_map),
2128	.set_sysclk = da7213_set_component_sysclk,
2129	.set_pll = da7213_set_component_pll,
2130	.idle_bias_on = 1,
2131	.use_pmdown_time = 1,
2132	.endianness = 1,
2133	};
2134
2135	static const struct regmap_config da7213_regmap_config = {
2136	.reg_bits = 8,
2137	.val_bits = 8,
2138
2139	.reg_defaults = da7213_reg_defaults,
2140	.num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults),
2141	.volatile_reg = da7213_volatile_register,
2142	.cache_type = REGCACHE_RBTREE,
2143	};
2144
2145	static void da7213_power_off(void *data)
2146	{
2147	struct da7213_priv *da7213 = data;
2148	regulator_bulk_disable(num_consumers: DA7213_NUM_SUPPLIES, consumers: da7213->supplies);
2149	}
2150
2151	static const char *da7213_supply_names[DA7213_NUM_SUPPLIES] = {
2152	[DA7213_SUPPLY_VDDA] = "VDDA",
2153	[DA7213_SUPPLY_VDDIO] = "VDDIO",
2154	};
2155
2156	static int da7213_i2c_probe(struct i2c_client *i2c)
2157	{
2158	struct da7213_priv *da7213;
2159	int i, ret;
2160
2161	da7213 = devm_kzalloc(dev: &i2c->dev, size: sizeof(*da7213), GFP_KERNEL);
2162	if (!da7213)
2163	return -ENOMEM;
2164
2165	i2c_set_clientdata(client: i2c, data: da7213);
2166
2167	/* Get required supplies */
2168	for (i = 0; i < DA7213_NUM_SUPPLIES; ++i)
2169	da7213->supplies[i].supply = da7213_supply_names[i];
2170
2171	ret = devm_regulator_bulk_get(dev: &i2c->dev, num_consumers: DA7213_NUM_SUPPLIES,
2172	consumers: da7213->supplies);
2173	if (ret) {
2174	dev_err(&i2c->dev, "Failed to get supplies: %d\n", ret);
2175	return ret;
2176	}
2177
2178	ret = regulator_bulk_enable(num_consumers: DA7213_NUM_SUPPLIES, consumers: da7213->supplies);
2179	if (ret < 0)
2180	return ret;
2181
2182	ret = devm_add_action_or_reset(&i2c->dev, da7213_power_off, da7213);
2183	if (ret < 0)
2184	return ret;
2185
2186	da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config);
2187	if (IS_ERR(ptr: da7213->regmap)) {
2188	ret = PTR_ERR(ptr: da7213->regmap);
2189	dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
2190	return ret;
2191	}
2192
2193	pm_runtime_set_autosuspend_delay(dev: &i2c->dev, delay: 100);
2194	pm_runtime_use_autosuspend(dev: &i2c->dev);
2195	pm_runtime_set_active(dev: &i2c->dev);
2196	pm_runtime_enable(dev: &i2c->dev);
2197
2198	ret = devm_snd_soc_register_component(dev: &i2c->dev,
2199	component_driver: &soc_component_dev_da7213, dai_drv: &da7213_dai, num_dai: 1);
2200	if (ret < 0) {
2201	dev_err(&i2c->dev, "Failed to register da7213 component: %d\n",
2202	ret);
2203	}
2204	return ret;
2205	}
2206
2207	static void da7213_i2c_remove(struct i2c_client *i2c)
2208	{
2209	pm_runtime_disable(dev: &i2c->dev);
2210	}
2211
2212	static int __maybe_unused da7213_runtime_suspend(struct device *dev)
2213	{
2214	struct da7213_priv *da7213 = dev_get_drvdata(dev);
2215
2216	regcache_cache_only(map: da7213->regmap, enable: true);
2217	regcache_mark_dirty(map: da7213->regmap);
2218	regulator_bulk_disable(num_consumers: DA7213_NUM_SUPPLIES, consumers: da7213->supplies);
2219
2220	return 0;
2221	}
2222
2223	static int __maybe_unused da7213_runtime_resume(struct device *dev)
2224	{
2225	struct da7213_priv *da7213 = dev_get_drvdata(dev);
2226	int ret;
2227
2228	ret = regulator_bulk_enable(num_consumers: DA7213_NUM_SUPPLIES, consumers: da7213->supplies);
2229	if (ret < 0)
2230	return ret;
2231	regcache_cache_only(map: da7213->regmap, enable: false);
2232	regcache_sync(map: da7213->regmap);
2233	return 0;
2234	}
2235
2236	static const struct dev_pm_ops da7213_pm = {
2237	SET_RUNTIME_PM_OPS(da7213_runtime_suspend, da7213_runtime_resume, NULL)
2238	};
2239
2240	static const struct i2c_device_id da7213_i2c_id[] = {
2241	{ "da7213", 0 },
2242	{ }
2243	};
2244	MODULE_DEVICE_TABLE(i2c, da7213_i2c_id);
2245
2246	/* I2C codec control layer */
2247	static struct i2c_driver da7213_i2c_driver = {
2248	.driver = {
2249	.name = "da7213",
2250	.of_match_table = of_match_ptr(da7213_of_match),
2251	.acpi_match_table = ACPI_PTR(da7213_acpi_match),
2252	.pm = &da7213_pm,
2253	},
2254	.probe = da7213_i2c_probe,
2255	.remove = da7213_i2c_remove,
2256	.id_table = da7213_i2c_id,
2257	};
2258
2259	module_i2c_driver(da7213_i2c_driver);
2260
2261	MODULE_DESCRIPTION("ASoC DA7213 Codec driver");
2262	MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
2263	MODULE_AUTHOR("David Rau <David.Rau.opensource@dm.renesas.com>");
2264	MODULE_LICENSE("GPL");
2265